From 28b89d61a665dc5598e4b5be9647cb7270f5f63c Mon Sep 17 00:00:00 2001 From: Sumanth Gundapaneni Date: Mon, 14 Nov 2016 17:11:00 +0000 Subject: [PATCH] [Hexagon] Remove unsafe load instructions that affect Stack Slot Coloring The Stack slot coloring pass removes a store that is followed by a load that deal with the same stack slot. The function isLoadFromStackSlot is supposed to consider the loads that have no side-effects. This patch fixed the issue by removing the unsafe loads from this function Eg: %vreg0 = L2_loadruh_io , 0 S2_storeri_io , 0, %vreg0 In this case, we load an unsigned extended half word and store this in to the same stack slot. The Stack slot coloring pass considers safe to remove the store. This patch marked all the non-vector byte and half word loads as unsafe. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286843 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Hexagon/HexagonInstrInfo.cpp | 12 --- test/CodeGen/Hexagon/dead-store-stack.ll | 131 +++++++++++++++++++++++ 2 files changed, 131 insertions(+), 12 deletions(-) create mode 100644 test/CodeGen/Hexagon/dead-store-stack.ll diff --git a/lib/Target/Hexagon/HexagonInstrInfo.cpp b/lib/Target/Hexagon/HexagonInstrInfo.cpp index 5c1c22f52f0..65ac1f06916 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.cpp +++ b/lib/Target/Hexagon/HexagonInstrInfo.cpp @@ -240,10 +240,6 @@ unsigned HexagonInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, switch (MI.getOpcode()) { default: break; - case Hexagon::L2_loadrb_io: - case Hexagon::L2_loadrub_io: - case Hexagon::L2_loadrh_io: - case Hexagon::L2_loadruh_io: case Hexagon::L2_loadri_io: case Hexagon::L2_loadrd_io: case Hexagon::V6_vL32b_ai: @@ -266,14 +262,6 @@ unsigned HexagonInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, return MI.getOperand(0).getReg(); } - case Hexagon::L2_ploadrbt_io: - case Hexagon::L2_ploadrbf_io: - case Hexagon::L2_ploadrubt_io: - case Hexagon::L2_ploadrubf_io: - case Hexagon::L2_ploadrht_io: - case Hexagon::L2_ploadrhf_io: - case Hexagon::L2_ploadruht_io: - case Hexagon::L2_ploadruhf_io: case Hexagon::L2_ploadrit_io: case Hexagon::L2_ploadrif_io: case Hexagon::L2_ploadrdt_io: diff --git a/test/CodeGen/Hexagon/dead-store-stack.ll b/test/CodeGen/Hexagon/dead-store-stack.ll new file mode 100644 index 00000000000..93d324baad9 --- /dev/null +++ b/test/CodeGen/Hexagon/dead-store-stack.ll @@ -0,0 +1,131 @@ +; RUN: llc -O2 -march=hexagon < %s | FileCheck %s +; CHECK: ParseFunc: +; CHECK: r[[ARG0:[0-9]+]] = memuh(r[[ARG1:[0-9]+]] + #[[OFFSET:[0-9]+]]) +; CHECK: memw(r[[ARG1]]+#[[OFFSET]]) = r[[ARG0]] + +@.str.3 = external unnamed_addr constant [8 x i8], align 1 +; Function Attrs: nounwind +define void @ParseFunc() local_unnamed_addr #0 { +entry: + %dataVar = alloca i32, align 4 + %0 = load i32, i32* %dataVar, align 4 + %and = and i32 %0, 65535 + store i32 %and, i32* %dataVar, align 4 + %.pr = load i32, i32* %dataVar, align 4 + switch i32 %.pr, label %sw.epilog [ + i32 4, label %sw.bb + i32 5, label %sw.bb + i32 1, label %sw.bb39 + i32 2, label %sw.bb40 + i32 3, label %sw.bb41 + i32 6, label %sw.bb42 + i32 7, label %sw.bb43 + i32 13, label %sw.bb44 + i32 0, label %sw.bb44 + i32 14, label %sw.bb45 + i32 15, label %sw.bb46 + ] + +sw.bb: + %cmp1.i = icmp eq i32 %.pr, 4 + br label %land.rhs.i + +land.rhs.i: + br label %ParseFuncNext.exit.i + +ParseFuncNext.exit.i: + br i1 %cmp1.i, label %if.then.i, label %if.else10.i + +if.then.i: + call void (i8*, i32, i8*, ...) @snprintf(i8* undef, i32 undef, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.3, i32 0, i32 0), i32 undef) #2 + br label %if.end27.i + +if.else10.i: + unreachable + +if.end27.i: + br label %land.rhs.i + +sw.bb39: + unreachable + +sw.bb40: + unreachable + +sw.bb41: + unreachable + +sw.bb42: + %1 = load i32, i32* undef, align 4 + %shr.i = lshr i32 %1, 16 + br label %while.cond.i.i + +while.cond.i.i: + %2 = load i8, i8* undef, align 1 + switch i8 %2, label %if.then4.i [ + i8 48, label %land.end.i.i + i8 120, label %land.end.i.i + i8 37, label %do.body.i.i + ] + +land.end.i.i: + unreachable + +do.body.i.i: + switch i8 undef, label %if.then4.i [ + i8 117, label %if.end40.i.i + i8 120, label %if.end40.i.i + i8 88, label %if.end40.i.i + i8 100, label %if.end40.i.i + i8 105, label %if.end40.i.i + ] + +if.end40.i.i: + %trunc.i = trunc i32 %shr.i to i16 + br label %land.rhs.i126 + +if.then4.i: + unreachable + +land.rhs.i126: + switch i16 %trunc.i, label %sw.epilog.i [ + i16 1, label %sw.bb.i + i16 2, label %sw.bb12.i + i16 4, label %sw.bb16.i + ] + +sw.bb.i: + unreachable + +sw.bb12.i: + unreachable + +sw.bb16.i: + unreachable + +sw.epilog.i: + call void (i8*, i32, i8*, ...) @snprintf(i8* undef, i32 undef, i8* nonnull undef, i32 undef) #2 + br label %land.rhs.i126 + +sw.bb43: + unreachable + +sw.bb44: + unreachable + +sw.bb45: + unreachable + +sw.bb46: + unreachable + +sw.epilog: + ret void +} + +; Function Attrs: nounwind +declare void @snprintf(i8* nocapture, i32, i8* nocapture readonly, ...) local_unnamed_addr #1 + +attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "stack-protector-buffer-size"="8" "target-features"="+hvx" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "stack-protector-buffer-size"="8" "target-features"="+hvx" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { nounwind } -- 2.50.1