From 25c80fbd2a0bc7aba72ae59f18d96f168a0ae56e Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Thu, 1 Dec 2016 16:00:14 +0000 Subject: [PATCH] [X86][SSE] Classify AND bitmasks as variable shuffle masks They are loading the bitmasks from the constant pool so the cost is similar to loading a shuffle mask. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288367 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 4 ++++ test/CodeGen/X86/vector-shuffle-128-v2.ll | 6 ------ 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 85766c9f0cc..926d3456764 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4061,6 +4061,7 @@ static bool isTargetShuffle(unsigned Opcode) { static bool isTargetShuffleVariableMask(unsigned Opcode) { switch (Opcode) { default: return false; + // Target Shuffles. case X86ISD::PSHUFB: case X86ISD::VPERMILPV: case X86ISD::VPERMIL2: @@ -4069,6 +4070,9 @@ static bool isTargetShuffleVariableMask(unsigned Opcode) { case X86ISD::VPERMV3: case X86ISD::VPERMIV3: return true; + // 'Faux' Target Shuffles. + case ISD::AND: + return true; } } diff --git a/test/CodeGen/X86/vector-shuffle-128-v2.ll b/test/CodeGen/X86/vector-shuffle-128-v2.ll index 71bee75507c..056de2c418f 100644 --- a/test/CodeGen/X86/vector-shuffle-128-v2.ll +++ b/test/CodeGen/X86/vector-shuffle-128-v2.ll @@ -940,22 +940,16 @@ define <2 x double> @shuffle_v2f64_bitcast_1z(<2 x double> %a) { define <2 x i64> @shuffle_v2i64_bitcast_z123(<2 x i64> %x) { ; SSE2-LABEL: shuffle_v2i64_bitcast_z123: ; SSE2: # BB#0: -; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero -; SSE2-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0 ; SSE2-NEXT: retq ; ; SSE3-LABEL: shuffle_v2i64_bitcast_z123: ; SSE3: # BB#0: -; SSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero -; SSE3-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0 ; SSE3-NEXT: retq ; ; SSSE3-LABEL: shuffle_v2i64_bitcast_z123: ; SSSE3: # BB#0: -; SSSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero -; SSSE3-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0 ; SSSE3-NEXT: retq ; -- 2.50.1