From 20ee395d3bf118865f8cc617e38f0df3b695e5ef Mon Sep 17 00:00:00 2001 From: Jessica Paquette Date: Wed, 30 Jan 2019 20:49:50 +0000 Subject: [PATCH] [GlobalISel] Introduce a G_FSQRT generic instruction This introduces a generic instruction for computing the floating point square root of a value. Right now, we can't select @llvm.sqrt, so this is working towards fixing that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352668 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Support/TargetOpcodes.def | 3 +++ include/llvm/Target/GenericOpcodes.td | 10 ++++++++++ include/llvm/Target/GlobalISel/SelectionDAGCompat.td | 1 + .../AArch64/GlobalISel/legalizer-info-validation.mir | 3 +++ 4 files changed, 17 insertions(+) diff --git a/include/llvm/Support/TargetOpcodes.def b/include/llvm/Support/TargetOpcodes.def index 553db2e4c20..23d008a0147 100644 --- a/include/llvm/Support/TargetOpcodes.def +++ b/include/llvm/Support/TargetOpcodes.def @@ -526,6 +526,9 @@ HANDLE_TARGET_OPCODE(G_FCOS) /// Floating point sine. HANDLE_TARGET_OPCODE(G_FSIN) +/// Floating point square root. +HANDLE_TARGET_OPCODE(G_FSQRT) + /// Generic AddressSpaceCast. HANDLE_TARGET_OPCODE(G_ADDRSPACE_CAST) diff --git a/include/llvm/Target/GenericOpcodes.td b/include/llvm/Target/GenericOpcodes.td index 639ca1b8a09..24ea886c2d9 100644 --- a/include/llvm/Target/GenericOpcodes.td +++ b/include/llvm/Target/GenericOpcodes.td @@ -569,6 +569,16 @@ def G_FSIN : GenericInstruction { let hasSideEffects = 0; } +// Floating point square root of a value. +// This returns NaN for negative nonzero values. +// NOTE: Unlike libm sqrt(), this never sets errno. In all other respects it's +// libm-conformant. +def G_FSQRT : GenericInstruction { + let OutOperandList = (outs type0:$dst); + let InOperandList = (ins type0:$src1); + let hasSideEffects = 0; +} + //------------------------------------------------------------------------------ // Opcodes for LLVM Intrinsics //------------------------------------------------------------------------------ diff --git a/include/llvm/Target/GlobalISel/SelectionDAGCompat.td b/include/llvm/Target/GlobalISel/SelectionDAGCompat.td index f5179b6c915..64915da4e91 100644 --- a/include/llvm/Target/GlobalISel/SelectionDAGCompat.td +++ b/include/llvm/Target/GlobalISel/SelectionDAGCompat.td @@ -91,6 +91,7 @@ def : GINodeEquiv; def : GINodeEquiv; def : GINodeEquiv; def : GINodeEquiv; +def : GINodeEquiv; // Broadly speaking G_LOAD is equivalent to ISD::LOAD but there are some // complications that tablegen must take care of. For example, Predicates such diff --git a/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir index cf4842caeb2..aea743ba611 100644 --- a/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir +++ b/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir @@ -338,6 +338,9 @@ # # DEBUG-NEXT: G_FSIN (opcode {{[0-9]+}}): 1 type index # DEBUG: .. the first uncovered type index: 1, OK +# +# DEBUG-NEXT: G_FSQRT (opcode {{[0-9]+}}): 1 type index +# DEBUG: .. the first uncovered type index: 1, OK # CHECK-NOT: ill-defined -- 2.40.0