From 1c1a8893a99601406dd120f02cfb4b8c035a6b43 Mon Sep 17 00:00:00 2001 From: Martin Storsjo Date: Wed, 27 Sep 2017 06:08:16 +0000 Subject: [PATCH] [X86] Remove erroneous callsite offsetting in SJLJ landing pads The callsite value is already stored indexed from 0 in the _Unwind_Context struct. When accessed via the functions _Unwind_GetIP and _Unwind_SetIP, the value is indexed from 1, but those functions handle the offseting. When reading directly from the struct here, we shouldn't subtract 1. This matches the code generated by the ARM target, where SJLJ exception handling is used by default on iOS. This makes clang-built object files for 32 bit x86 mingw work when linked with libgcc/libstdc++. Differential Revision: https://reviews.llvm.org/D38251 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314276 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 8 ++------ test/CodeGen/X86/sjlj-eh.ll | 7 +++---- 2 files changed, 5 insertions(+), 10 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 5c9534c6fd2..31c2b63c099 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -26576,17 +26576,13 @@ X86TargetLowering::EmitSjLjDispatchBlock(MachineInstr &MI, BuildMI(DispatchBB, DL, TII->get(X86::CMP32ri)) .addReg(IReg) .addImm(LPadList.size()); - BuildMI(DispatchBB, DL, TII->get(X86::JA_1)).addMBB(TrapBB); + BuildMI(DispatchBB, DL, TII->get(X86::JAE_1)).addMBB(TrapBB); - unsigned JReg = MRI->createVirtualRegister(&X86::GR32RegClass); - BuildMI(DispContBB, DL, TII->get(X86::SUB32ri), JReg) - .addReg(IReg) - .addImm(1); BuildMI(DispContBB, DL, TII->get(Subtarget.is64Bit() ? X86::JMP64m : X86::JMP32m)) .addReg(0) .addImm(Subtarget.is64Bit() ? 8 : 4) - .addReg(JReg) + .addReg(IReg) .addJumpTableIndex(MJTI) .addReg(0); diff --git a/test/CodeGen/X86/sjlj-eh.ll b/test/CodeGen/X86/sjlj-eh.ll index 79bd450dcfb..35a11da7f4c 100644 --- a/test/CodeGen/X86/sjlj-eh.ll +++ b/test/CodeGen/X86/sjlj-eh.ll @@ -60,13 +60,12 @@ try.cont: ; ; CHECK: [[RESUME]]: ; CHECK: leal -64(%ebp), %esi -; assert(UFC.__callsite <= 1); +; assert(UFC.__callsite < 1); ; CHECK: movl -60(%ebp), %eax ; CHECK: cmpl $1, %eax -; CHECK: jbe [[CONT:LBB[0-9]+_[0-9]+]] +; CHECK: jb [[CONT:LBB[0-9]+_[0-9]+]] ; CHECK: ud2 ; CHECK: [[CONT]]: -; *Handlers[--UFC.__callsite] -; CHECK: subl $1, %eax +; *Handlers[UFC.__callsite] ; CHECK: jmpl *LJTI -- 2.40.0