From 1b87b65ace6cb0c4a325292763801d3742743565 Mon Sep 17 00:00:00 2001 From: Roman Lebedev Date: Sat, 20 Jul 2019 21:34:00 +0000 Subject: [PATCH] [NFC][InstCombine] Autogenerate a few tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366643 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../InstCombine/2008-12-17-SRemNegConstVec.ll | 7 +++- .../2009-06-16-SRemDemandedBits.ll | 15 ++++++--- .../InstCombine/2010-01-28-NegativeSRem.ll | 15 +++++++-- test/Transforms/InstCombine/add4.ll | 33 ++++++++++++++----- 4 files changed, 53 insertions(+), 17 deletions(-) diff --git a/test/Transforms/InstCombine/2008-12-17-SRemNegConstVec.ll b/test/Transforms/InstCombine/2008-12-17-SRemNegConstVec.ll index 75bd5e0175f..cc8737dbd03 100644 --- a/test/Transforms/InstCombine/2008-12-17-SRemNegConstVec.ll +++ b/test/Transforms/InstCombine/2008-12-17-SRemNegConstVec.ll @@ -1,7 +1,12 @@ -; RUN: opt < %s -instcombine -S | grep "i8 2, i8 2" +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -S | FileCheck %s ; PR2756 define <2 x i8> @foo(<2 x i8> %x) { +; CHECK-LABEL: @foo( +; CHECK-NEXT: [[A:%.*]] = srem <2 x i8> [[X:%.*]], +; CHECK-NEXT: ret <2 x i8> [[A]] +; %A = srem <2 x i8> %x, ret <2 x i8> %A } diff --git a/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll b/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll index 6beedf83cd6..8730b4e08e6 100644 --- a/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll +++ b/test/Transforms/InstCombine/2009-06-16-SRemDemandedBits.ll @@ -1,9 +1,16 @@ -; RUN: opt < %s -instcombine -S | grep srem +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -S | FileCheck %s ; PR3439 define i32 @a(i32 %x) nounwind { +; CHECK-LABEL: @a( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[REM:%.*]] = srem i32 [[X:%.*]], 2 +; CHECK-NEXT: [[AND:%.*]] = and i32 [[REM]], 2 +; CHECK-NEXT: ret i32 [[AND]] +; entry: - %rem = srem i32 %x, 2 - %and = and i32 %rem, 2 - ret i32 %and + %rem = srem i32 %x, 2 + %and = and i32 %rem, 2 + ret i32 %and } diff --git a/test/Transforms/InstCombine/2010-01-28-NegativeSRem.ll b/test/Transforms/InstCombine/2010-01-28-NegativeSRem.ll index 4ab9bf0c3f5..077419027c1 100644 --- a/test/Transforms/InstCombine/2010-01-28-NegativeSRem.ll +++ b/test/Transforms/InstCombine/2010-01-28-NegativeSRem.ll @@ -1,19 +1,28 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -instcombine -S | FileCheck %s ; PR6165 define i32 @f() { +; CHECK-LABEL: @f( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[BB1:%.*]] +; CHECK: BB1: +; CHECK-NEXT: [[X:%.*]] = phi i32 [ -29, [[ENTRY:%.*]] ], [ 0, [[BB1]] ] +; CHECK-NEXT: [[REM:%.*]] = srem i32 [[X]], 2 +; CHECK-NEXT: [[T:%.*]] = icmp eq i32 [[REM]], -1 +; CHECK-NEXT: br i1 [[T]], label [[BB2:%.*]], label [[BB1]] +; CHECK: BB2: +; CHECK-NEXT: ret i32 [[X]] +; entry: br label %BB1 BB1: ; preds = %BB1, %entry -; CHECK: BB1: %x = phi i32 [ -29, %entry ], [ 0, %BB1 ] ; [#uses=2] %rem = srem i32 %x, 2 ; [#uses=1] %t = icmp eq i32 %rem, -1 ; [#uses=1] br i1 %t, label %BB2, label %BB1 -; CHECK-NOT: br i1 false BB2: ; preds = %BB1 -; CHECK: BB2: ret i32 %x } diff --git a/test/Transforms/InstCombine/add4.ll b/test/Transforms/InstCombine/add4.ll index 79f3fa08fda..a61f579c801 100644 --- a/test/Transforms/InstCombine/add4.ll +++ b/test/Transforms/InstCombine/add4.ll @@ -1,10 +1,11 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -instcombine -S | FileCheck %s ; ModuleID = 'test/Transforms/InstCombine/add4.ll' source_filename = "test/Transforms/InstCombine/add4.ll" define i64 @match_unsigned(i64 %x) { ; CHECK-LABEL: @match_unsigned( -; CHECK-NEXT: bb: +; CHECK-NEXT: bb: ; CHECK-NEXT: [[UREM:%.*]] = urem i64 [[X:%.*]], 19136 ; CHECK-NEXT: ret i64 [[UREM]] ; @@ -19,7 +20,7 @@ bb: define i64 @match_andAsRem_lshrAsDiv_shlAsMul(i64 %x) { ; CHECK-LABEL: @match_andAsRem_lshrAsDiv_shlAsMul( -; CHECK-NEXT: bb: +; CHECK-NEXT: bb: ; CHECK-NEXT: [[UREM:%.*]] = urem i64 [[X:%.*]], 576 ; CHECK-NEXT: ret i64 [[UREM]] ; @@ -34,7 +35,7 @@ bb: define i64 @match_signed(i64 %x) { ; CHECK-LABEL: @match_signed( -; CHECK-NEXT: bb: +; CHECK-NEXT: bb: ; CHECK-NEXT: [[SREM1:%.*]] = srem i64 [[X:%.*]], 172224 ; CHECK-NEXT: ret i64 [[SREM1]] ; @@ -53,8 +54,13 @@ bb: define i64 @not_match_inconsistent_signs(i64 %x) { ; CHECK-LABEL: @not_match_inconsistent_signs( -; CHECK: [[TMP:%.*]] = add -; CHECK-NEXT: ret i64 [[TMP]] +; CHECK-NEXT: bb: +; CHECK-NEXT: [[TMP:%.*]] = urem i64 [[X:%.*]], 299 +; CHECK-NEXT: [[TMP1:%.*]] = sdiv i64 [[X]], 299 +; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], 63 +; CHECK-NEXT: [[TMP3:%.*]] = mul nuw nsw i64 [[TMP2]], 299 +; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP]], [[TMP3]] +; CHECK-NEXT: ret i64 [[TMP4]] ; bb: %tmp = urem i64 %x, 299 @@ -67,8 +73,13 @@ bb: define i64 @not_match_inconsistent_values(i64 %x) { ; CHECK-LABEL: @not_match_inconsistent_values( -; CHECK: [[TMP:%.*]] = add -; CHECK-NEXT: ret i64 [[TMP]] +; CHECK-NEXT: bb: +; CHECK-NEXT: [[TMP:%.*]] = urem i64 [[X:%.*]], 299 +; CHECK-NEXT: [[TMP1:%.*]] = udiv i64 [[X]], 29 +; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], 63 +; CHECK-NEXT: [[TMP3:%.*]] = mul nuw nsw i64 [[TMP2]], 299 +; CHECK-NEXT: [[TMP4:%.*]] = add nuw nsw i64 [[TMP]], [[TMP3]] +; CHECK-NEXT: ret i64 [[TMP4]] ; bb: %tmp = urem i64 %x, 299 @@ -81,8 +92,12 @@ bb: define i32 @not_match_overflow(i32 %x) { ; CHECK-LABEL: @not_match_overflow( -; CHECK: [[TMP:%.*]] = add -; CHECK-NEXT: ret i32 [[TMP]] +; CHECK-NEXT: bb: +; CHECK-NEXT: [[TMP:%.*]] = urem i32 [[X:%.*]], 299 +; CHECK-NEXT: [[TMP0:%.*]] = urem i32 [[X]], 299 +; CHECK-NEXT: [[TMP3:%.*]] = sub i32 [[X]], [[TMP0]] +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP]], [[TMP3]] +; CHECK-NEXT: ret i32 [[TMP4]] ; bb: %tmp = urem i32 %x, 299 -- 2.40.0