From 1b593317d1711a629ba342b17734c85694bdd42b Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sat, 11 Feb 2017 13:00:32 +0000 Subject: [PATCH] [X86][3DNow!] Add tests showing missed commutation opportunities. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294845 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/commute-3dnow.ll | 222 ++++++++++++++++++++++++++++++ 1 file changed, 222 insertions(+) create mode 100644 test/CodeGen/X86/commute-3dnow.ll diff --git a/test/CodeGen/X86/commute-3dnow.ll b/test/CodeGen/X86/commute-3dnow.ll new file mode 100644 index 00000000000..a121a586988 --- /dev/null +++ b/test/CodeGen/X86/commute-3dnow.ll @@ -0,0 +1,222 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+3dnow | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+3dnow | FileCheck %s --check-prefix=X64 + +; FIXME - missed commutation opportunities. + +define void @commute_m_pfadd(x86_mmx *%a0, x86_mmx *%a1, x86_mmx *%a2) nounwind { +; X32-LABEL: commute_m_pfadd: +; X32: # BB#0: +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: movq (%edx), %mm0 +; X32-NEXT: movq (%ecx), %mm1 +; X32-NEXT: pfadd (%eax), %mm0 +; X32-NEXT: pfadd %mm0, %mm1 +; X32-NEXT: movq %mm1, (%ecx) +; X32-NEXT: retl +; +; X64-LABEL: commute_m_pfadd: +; X64: # BB#0: +; X64-NEXT: movq (%rdi), %mm0 +; X64-NEXT: movq (%rdx), %mm1 +; X64-NEXT: pfadd (%rsi), %mm0 +; X64-NEXT: pfadd %mm0, %mm1 +; X64-NEXT: movq %mm1, (%rdx) +; X64-NEXT: retq + %1 = load x86_mmx, x86_mmx* %a0 + %2 = load x86_mmx, x86_mmx* %a1 + %3 = load x86_mmx, x86_mmx* %a2 + %4 = tail call x86_mmx @llvm.x86.3dnow.pfadd(x86_mmx %1, x86_mmx %2) + %5 = tail call x86_mmx @llvm.x86.3dnow.pfadd(x86_mmx %3, x86_mmx %4) + store x86_mmx %5, x86_mmx* %a2 + ret void +} +declare x86_mmx @llvm.x86.3dnow.pfadd(x86_mmx, x86_mmx) + +define void @commute_m_pfsub(x86_mmx *%a0, x86_mmx *%a1, x86_mmx *%a2) nounwind { +; X32-LABEL: commute_m_pfsub: +; X32: # BB#0: +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: movq (%edx), %mm0 +; X32-NEXT: movq (%ecx), %mm1 +; X32-NEXT: pfsub (%eax), %mm0 +; X32-NEXT: pfsub %mm0, %mm1 +; X32-NEXT: movq %mm1, (%ecx) +; X32-NEXT: retl +; +; X64-LABEL: commute_m_pfsub: +; X64: # BB#0: +; X64-NEXT: movq (%rdi), %mm0 +; X64-NEXT: movq (%rdx), %mm1 +; X64-NEXT: pfsub (%rsi), %mm0 +; X64-NEXT: pfsub %mm0, %mm1 +; X64-NEXT: movq %mm1, (%rdx) +; X64-NEXT: retq + %1 = load x86_mmx, x86_mmx* %a0 + %2 = load x86_mmx, x86_mmx* %a1 + %3 = load x86_mmx, x86_mmx* %a2 + %4 = tail call x86_mmx @llvm.x86.3dnow.pfsub(x86_mmx %1, x86_mmx %2) + %5 = tail call x86_mmx @llvm.x86.3dnow.pfsub(x86_mmx %3, x86_mmx %4) + store x86_mmx %5, x86_mmx* %a2 + ret void +} +declare x86_mmx @llvm.x86.3dnow.pfsub(x86_mmx, x86_mmx) + +define void @commute_m_pfsubr(x86_mmx *%a0, x86_mmx *%a1, x86_mmx *%a2) nounwind { +; X32-LABEL: commute_m_pfsubr: +; X32: # BB#0: +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: movq (%edx), %mm0 +; X32-NEXT: movq (%ecx), %mm1 +; X32-NEXT: pfsubr (%eax), %mm0 +; X32-NEXT: pfsubr %mm0, %mm1 +; X32-NEXT: movq %mm1, (%ecx) +; X32-NEXT: retl +; +; X64-LABEL: commute_m_pfsubr: +; X64: # BB#0: +; X64-NEXT: movq (%rdi), %mm0 +; X64-NEXT: movq (%rdx), %mm1 +; X64-NEXT: pfsubr (%rsi), %mm0 +; X64-NEXT: pfsubr %mm0, %mm1 +; X64-NEXT: movq %mm1, (%rdx) +; X64-NEXT: retq + %1 = load x86_mmx, x86_mmx* %a0 + %2 = load x86_mmx, x86_mmx* %a1 + %3 = load x86_mmx, x86_mmx* %a2 + %4 = tail call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %1, x86_mmx %2) + %5 = tail call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %3, x86_mmx %4) + store x86_mmx %5, x86_mmx* %a2 + ret void +} +declare x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx, x86_mmx) + +define void @commute_m_pfmul(x86_mmx *%a0, x86_mmx *%a1, x86_mmx *%a2) nounwind { +; X32-LABEL: commute_m_pfmul: +; X32: # BB#0: +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: movq (%edx), %mm0 +; X32-NEXT: movq (%ecx), %mm1 +; X32-NEXT: pfmul (%eax), %mm0 +; X32-NEXT: pfmul %mm0, %mm1 +; X32-NEXT: movq %mm1, (%ecx) +; X32-NEXT: retl +; +; X64-LABEL: commute_m_pfmul: +; X64: # BB#0: +; X64-NEXT: movq (%rdi), %mm0 +; X64-NEXT: movq (%rdx), %mm1 +; X64-NEXT: pfmul (%rsi), %mm0 +; X64-NEXT: pfmul %mm0, %mm1 +; X64-NEXT: movq %mm1, (%rdx) +; X64-NEXT: retq + %1 = load x86_mmx, x86_mmx* %a0 + %2 = load x86_mmx, x86_mmx* %a1 + %3 = load x86_mmx, x86_mmx* %a2 + %4 = tail call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %1, x86_mmx %2) + %5 = tail call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %3, x86_mmx %4) + store x86_mmx %5, x86_mmx* %a2 + ret void +} +declare x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx, x86_mmx) + +define void @commute_m_pfcmpeq(x86_mmx *%a0, x86_mmx *%a1, x86_mmx *%a2) nounwind { +; X32-LABEL: commute_m_pfcmpeq: +; X32: # BB#0: +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: movq (%edx), %mm0 +; X32-NEXT: movq (%ecx), %mm1 +; X32-NEXT: pfcmpeq (%eax), %mm0 +; X32-NEXT: pfcmpeq %mm0, %mm1 +; X32-NEXT: movq %mm1, (%ecx) +; X32-NEXT: retl +; +; X64-LABEL: commute_m_pfcmpeq: +; X64: # BB#0: +; X64-NEXT: movq (%rdi), %mm0 +; X64-NEXT: movq (%rdx), %mm1 +; X64-NEXT: pfcmpeq (%rsi), %mm0 +; X64-NEXT: pfcmpeq %mm0, %mm1 +; X64-NEXT: movq %mm1, (%rdx) +; X64-NEXT: retq + %1 = load x86_mmx, x86_mmx* %a0 + %2 = load x86_mmx, x86_mmx* %a1 + %3 = load x86_mmx, x86_mmx* %a2 + %4 = tail call x86_mmx @llvm.x86.3dnow.pfcmpeq(x86_mmx %1, x86_mmx %2) + %5 = tail call x86_mmx @llvm.x86.3dnow.pfcmpeq(x86_mmx %3, x86_mmx %4) + store x86_mmx %5, x86_mmx* %a2 + ret void +} +declare x86_mmx @llvm.x86.3dnow.pfcmpeq(x86_mmx, x86_mmx) + +define void @commute_m_pavgusb(x86_mmx *%a0, x86_mmx *%a1, x86_mmx *%a2) nounwind { +; X32-LABEL: commute_m_pavgusb: +; X32: # BB#0: +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: movq (%edx), %mm0 +; X32-NEXT: movq (%ecx), %mm1 +; X32-NEXT: pavgusb (%eax), %mm0 +; X32-NEXT: pavgusb %mm0, %mm1 +; X32-NEXT: movq %mm1, (%ecx) +; X32-NEXT: retl +; +; X64-LABEL: commute_m_pavgusb: +; X64: # BB#0: +; X64-NEXT: movq (%rdi), %mm0 +; X64-NEXT: movq (%rdx), %mm1 +; X64-NEXT: pavgusb (%rsi), %mm0 +; X64-NEXT: pavgusb %mm0, %mm1 +; X64-NEXT: movq %mm1, (%rdx) +; X64-NEXT: retq + %1 = load x86_mmx, x86_mmx* %a0 + %2 = load x86_mmx, x86_mmx* %a1 + %3 = load x86_mmx, x86_mmx* %a2 + %4 = tail call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %1, x86_mmx %2) + %5 = tail call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %3, x86_mmx %4) + store x86_mmx %5, x86_mmx* %a2 + ret void +} +declare x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx, x86_mmx) + +define void @commute_m_pmulhrw(x86_mmx *%a0, x86_mmx *%a1, x86_mmx *%a2) nounwind { +; X32-LABEL: commute_m_pmulhrw: +; X32: # BB#0: +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: movq (%edx), %mm0 +; X32-NEXT: movq (%ecx), %mm1 +; X32-NEXT: pmulhrw (%eax), %mm0 +; X32-NEXT: pmulhrw %mm0, %mm1 +; X32-NEXT: movq %mm1, (%ecx) +; X32-NEXT: retl +; +; X64-LABEL: commute_m_pmulhrw: +; X64: # BB#0: +; X64-NEXT: movq (%rdi), %mm0 +; X64-NEXT: movq (%rdx), %mm1 +; X64-NEXT: pmulhrw (%rsi), %mm0 +; X64-NEXT: pmulhrw %mm0, %mm1 +; X64-NEXT: movq %mm1, (%rdx) +; X64-NEXT: retq + %1 = load x86_mmx, x86_mmx* %a0 + %2 = load x86_mmx, x86_mmx* %a1 + %3 = load x86_mmx, x86_mmx* %a2 + %4 = tail call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %1, x86_mmx %2) + %5 = tail call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %3, x86_mmx %4) + store x86_mmx %5, x86_mmx* %a2 + ret void +} +declare x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx, x86_mmx) -- 2.50.1