From 1a69f7be23c3818fddb0680cb28d66d1b080f8f9 Mon Sep 17 00:00:00 2001 From: Yi-Hong Lyu Date: Fri, 11 Oct 2019 05:32:29 +0000 Subject: [PATCH] [PowerPC] Remove assertion "Shouldn't overwrite a register before it is killed" The assertion is everzealous and fail tests like: renamable $x3 = LI8 0 STD renamable $x3, 16, $x1 renamable $x3 = LI8 0 Remove the assertion since killed flag of $x3 is not mandentory. Differential Revision: https://reviews.llvm.org/D68344 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@374515 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 17 +++++++------- .../PowerPC/remove-redundant-load-imm.mir | 22 +++++++++++++++++++ 2 files changed, 31 insertions(+), 8 deletions(-) diff --git a/lib/Target/PowerPC/PPCPreEmitPeephole.cpp b/lib/Target/PowerPC/PPCPreEmitPeephole.cpp index 1de01f9bcbc..b1c0433641d 100644 --- a/lib/Target/PowerPC/PPCPreEmitPeephole.cpp +++ b/lib/Target/PowerPC/PPCPreEmitPeephole.cpp @@ -117,8 +117,6 @@ namespace { if (!AfterBBI->modifiesRegister(Reg, TRI)) continue; - assert(DeadOrKillToUnset && - "Shouldn't overwrite a register before it is killed"); // Finish scanning because Reg is overwritten by a non-load // instruction. if (AfterBBI->getOpcode() != Opc) @@ -134,12 +132,15 @@ namespace { // It loads same immediate value to the same Reg, which is redundant. // We would unset kill flag in previous Reg usage to extend live range // of Reg first, then remove the redundancy. - LLVM_DEBUG(dbgs() << " Unset dead/kill flag of " << *DeadOrKillToUnset - << " from " << *DeadOrKillToUnset->getParent()); - if (DeadOrKillToUnset->isDef()) - DeadOrKillToUnset->setIsDead(false); - else - DeadOrKillToUnset->setIsKill(false); + if (DeadOrKillToUnset) { + LLVM_DEBUG(dbgs() + << " Unset dead/kill flag of " << *DeadOrKillToUnset + << " from " << *DeadOrKillToUnset->getParent()); + if (DeadOrKillToUnset->isDef()) + DeadOrKillToUnset->setIsDead(false); + else + DeadOrKillToUnset->setIsKill(false); + } DeadOrKillToUnset = AfterBBI->findRegisterDefOperand(Reg, true, true, TRI); if (DeadOrKillToUnset) diff --git a/test/CodeGen/PowerPC/remove-redundant-load-imm.mir b/test/CodeGen/PowerPC/remove-redundant-load-imm.mir index 02db2caa1e7..1dd37955452 100644 --- a/test/CodeGen/PowerPC/remove-redundant-load-imm.mir +++ b/test/CodeGen/PowerPC/remove-redundant-load-imm.mir @@ -346,3 +346,25 @@ body: | BLR8 implicit $lr8, implicit $rm ... +--- +name: overwrite_reg_before_killed +alignment: 16 +tracksRegLiveness: true +machineFunctionInfo: {} +body: | + bb.0.entry: + liveins: $x1 + + ; CHECK-LABEL: name: overwrite_reg_before_killed + ; CHECK: liveins: $x1 + ; CHECK: renamable $x3 = LI8 0 + ; CHECK: STD renamable $x3, 16, $x1 + ; CHECK: STD killed renamable $x3, 8, $x1 + ; CHECK: BLR8 implicit $lr8, implicit $rm + renamable $x3 = LI8 0 + STD renamable $x3, 16, $x1 + renamable $x3 = LI8 0 + STD killed renamable $x3, 8, $x1 + BLR8 implicit $lr8, implicit $rm + +... -- 2.40.0