From 1a1cf956cce436e692fa30bf49e8f3f41f76f927 Mon Sep 17 00:00:00 2001 From: James Molloy Date: Fri, 19 Apr 2019 09:00:55 +0000 Subject: [PATCH] [PATCH] [MachineScheduler] Check pending instructions when an instruction is scheduled Pending instructions that may have been blocked from being available by the HazardRecognizer may no longer may not be blocked any more when an instruction is scheduled; pending instructions should be re-checked in this case. This is primarily aimed at VLIW targets with large parallelism and esoteric constraints. No testcase as no in-tree targets have this behavior. Differential revision: https://reviews.llvm.org/D60861 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358743 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MachineScheduler.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/CodeGen/MachineScheduler.cpp b/lib/CodeGen/MachineScheduler.cpp index dc2e1f94a24..d56ea43437b 100644 --- a/lib/CodeGen/MachineScheduler.cpp +++ b/lib/CodeGen/MachineScheduler.cpp @@ -2159,6 +2159,8 @@ void SchedBoundary::bumpNode(SUnit *SU) { HazardRec->Reset(); } HazardRec->EmitInstruction(SU); + // Scheduling an instruction may have made pending instructions available. + CheckPending = true; } // checkHazard should prevent scheduling multiple instructions per cycle that // exceed the issue width. -- 2.50.1