From 11ca8fd3241f027b95ec021c41b9ed8bc779259c Mon Sep 17 00:00:00 2001 From: Peter Johnson Date: Fri, 22 Feb 2008 04:48:56 +0000 Subject: [PATCH] Add support for Nehalem XSAVE instructions and CPU feature. svn path=/trunk/yasm/; revision=2042 --- modules/arch/x86/gen_x86_insn.py | 12 ++++++++++++ modules/arch/x86/tests/Makefile.inc | 2 ++ modules/arch/x86/tests/xsave.asm | 4 ++++ modules/arch/x86/tests/xsave.hex | 16 ++++++++++++++++ modules/arch/x86/x86arch.h | 1 + modules/arch/x86/x86cpu.gperf | 6 +++++- 6 files changed, 40 insertions(+), 1 deletion(-) create mode 100644 modules/arch/x86/tests/xsave.asm create mode 100644 modules/arch/x86/tests/xsave.hex diff --git a/modules/arch/x86/gen_x86_insn.py b/modules/arch/x86/gen_x86_insn.py index fd923d4f..d850feed 100755 --- a/modules/arch/x86/gen_x86_insn.py +++ b/modules/arch/x86/gen_x86_insn.py @@ -5323,6 +5323,18 @@ add_insn("pshaq", "sse5psh", modifiers=[0x07]) # roundps, roundpd, roundss, roundsd, ptest are in SSE4.1 +##################################################################### +# Intel XSAVE instructions +##################################################################### +add_insn("xgetbv", "threebyte", modifiers=[0x0F, 0x01, 0xD0], + cpu=["XSAVE", "386"]) +add_insn("xsetbv", "threebyte", modifiers=[0x0F, 0x01, 0xD1], + cpu=["XSAVE", "386", "Priv"]) +add_insn("xsave", "twobytemem", modifiers=[4, 0x0F, 0xAE], + cpu=["XSAVE", "386"]) +add_insn("xrstor", "twobytemem", modifiers=[5, 0x0F, 0xAE], + cpu=["XSAVE", "386"]) + ##################################################################### # AMD 3DNow! instructions ##################################################################### diff --git a/modules/arch/x86/tests/Makefile.inc b/modules/arch/x86/tests/Makefile.inc index b9f35d2b..b500f419 100644 --- a/modules/arch/x86/tests/Makefile.inc +++ b/modules/arch/x86/tests/Makefile.inc @@ -204,6 +204,8 @@ EXTRA_DIST += modules/arch/x86/tests/xchg64.asm EXTRA_DIST += modules/arch/x86/tests/xchg64.hex EXTRA_DIST += modules/arch/x86/tests/xmm64.asm EXTRA_DIST += modules/arch/x86/tests/xmm64.hex +EXTRA_DIST += modules/arch/x86/tests/xsave.asm +EXTRA_DIST += modules/arch/x86/tests/xsave.hex EXTRA_DIST += modules/arch/x86/tests/gas32/Makefile.inc EXTRA_DIST += modules/arch/x86/tests/gas64/Makefile.inc diff --git a/modules/arch/x86/tests/xsave.asm b/modules/arch/x86/tests/xsave.asm new file mode 100644 index 00000000..6105879d --- /dev/null +++ b/modules/arch/x86/tests/xsave.asm @@ -0,0 +1,4 @@ +xsave [0] +xrstor [0] +xgetbv +xsetbv diff --git a/modules/arch/x86/tests/xsave.hex b/modules/arch/x86/tests/xsave.hex new file mode 100644 index 00000000..2b6d09a0 --- /dev/null +++ b/modules/arch/x86/tests/xsave.hex @@ -0,0 +1,16 @@ +0f +ae +26 +00 +00 +0f +ae +2e +00 +00 +0f +01 +d0 +0f +01 +d1 diff --git a/modules/arch/x86/x86arch.h b/modules/arch/x86/x86arch.h index b5c0f091..bd53e373 100644 --- a/modules/arch/x86/x86arch.h +++ b/modules/arch/x86/x86arch.h @@ -65,6 +65,7 @@ #define CPU_SSE42 31 /* Streaming SIMD extensions 4.2 required */ #define CPU_SSE4a 32 /* AMD Streaming SIMD extensions 4a required */ #define CPU_SSE5 33 /* AMD Streaming SIMD extensions 5 required */ +#define CPU_XSAVE 33 /* Intel XSAVE instruction */ /* Technically not CPU capabilities, they do affect what instructions are * available. These are tested against BITS==64. diff --git a/modules/arch/x86/x86cpu.gperf b/modules/arch/x86/x86cpu.gperf index 5487d320..c3f27e5b 100644 --- a/modules/arch/x86/x86cpu.gperf +++ b/modules/arch/x86/x86cpu.gperf @@ -58,8 +58,10 @@ x86_cpu_intel(wordptr cpu, unsigned int data) BitVector_Bit_On(cpu, CPU_Prot); if (data >= PROC_386) BitVector_Bit_On(cpu, CPU_SMM); - if (data >= PROC_nehalem) + if (data >= PROC_nehalem) { BitVector_Bit_On(cpu, CPU_SSE42); + BitVector_Bit_On(cpu, CPU_XSAVE); + } if (data >= PROC_penryn) BitVector_Bit_On(cpu, CPU_SSE41); if (data >= PROC_conroe) @@ -326,6 +328,8 @@ sse4, x86_cpu_set_sse4, 0 nosse4, x86_cpu_clear_sse4, 0 sse5, x86_cpu_set, CPU_SSE5 nosse5, x86_cpu_clear, CPU_SSE5 +xsave, x86_cpu_set, CPU_XSAVE +noxsave, x86_cpu_clear, CPU_XSAVE %% void -- 2.40.0