From 0f26277b542af98ae3a32dd633b3aa504b7a3c4f Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Thu, 23 Apr 2015 19:14:40 +0000 Subject: [PATCH] Merging r229225: ------------------------------------------------------------------------ r229225 | Matthew.Arsenault | 2015-02-13 21:55:54 -0500 (Fri, 13 Feb 2015) | 4 lines R600/SI: Add hack to copy from a VGPR to VCC This hopefully should be fixed when VReg_1 is removed. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@235622 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/SIInstrInfo.cpp | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp index bf8d589b36d..513c716dcb8 100644 --- a/lib/Target/R600/SIInstrInfo.cpp +++ b/lib/Target/R600/SIInstrInfo.cpp @@ -333,6 +333,16 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, return; } else if (AMDGPU::SReg_64RegClass.contains(DestReg)) { + if (DestReg == AMDGPU::VCC) { + // FIXME: Hack until VReg_1 removed. + + assert(AMDGPU::VGPR_32RegClass.contains(SrcReg)); + BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32), AMDGPU::VCC) + .addImm(0) + .addReg(SrcReg, getKillRegState(KillSrc)); + return; + } + assert(AMDGPU::SReg_64RegClass.contains(SrcReg)); BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg) .addReg(SrcReg, getKillRegState(KillSrc)); -- 2.40.0