From 0b6e684a2e6f8e2e13b009fe6350628847ee0578 Mon Sep 17 00:00:00 2001 From: Haicheng Wu Date: Thu, 1 Jun 2017 19:06:07 +0000 Subject: [PATCH] [InlineCost] Add a test case for GEP cost The added test case is to check whether the simplified value is passed to getGEPCost(). Differential Revision: https://reviews.llvm.org/D33779 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304454 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/Transforms/Inline/AArch64/gep-cost.ll | 25 ++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/test/Transforms/Inline/AArch64/gep-cost.ll b/test/Transforms/Inline/AArch64/gep-cost.ll index 204958f082d..7d191d37f1f 100644 --- a/test/Transforms/Inline/AArch64/gep-cost.ll +++ b/test/Transforms/Inline/AArch64/gep-cost.ll @@ -4,11 +4,21 @@ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target triple = "aarch64--linux-gnu" -define void @outer([4 x i32]* %ptr, i32 %i) { +define void @outer1([4 x i32]* %ptr, i32 %i) { call void @inner1([4 x i32]* %ptr, i32 %i) + ret void +} + +define void @outer2([4 x i32]* %ptr, i32 %i) { call void @inner2([4 x i32]* %ptr, i32 %i) ret void } + +define void @outer3([4 x i32]* %ptr, i32 %j) { + call void @inner3([4 x i32]* %ptr, i32 0, i32 %j) + ret void +} + ; The gep in inner1() is reg+reg, which is a legal addressing mode for AArch64. ; Thus, both the gep and ret can be simplified. ; CHECK: Analyzing call of inner1 @@ -19,7 +29,7 @@ define void @inner1([4 x i32]* %ptr, i32 %i) { ret void } -; The gep in inner2() is reg+imm+reg, which is not a legal addressing mode for +; The gep in inner2() is reg+imm+reg, which is not a legal addressing mode for ; AArch64. Thus, only the ret can be simplified and not the gep. ; CHECK: Analyzing call of inner2 ; CHECK: NumInstructionsSimplified: 1 @@ -28,3 +38,14 @@ define void @inner2([4 x i32]* %ptr, i32 %i) { %G = getelementptr inbounds [4 x i32], [4 x i32]* %ptr, i32 1, i32 %i ret void } + +; The gep in inner3() is reg+reg because %i is a known constant from the +; callsite. This case is a legal addressing mode for AArch64. Thus, both the +; gep and ret can be simplified. +; CHECK: Analyzing call of inner3 +; CHECK: NumInstructionsSimplified: 2 +; CHECK: NumInstructions: 2 +define void @inner3([4 x i32]* %ptr, i32 %i, i32 %j) { + %G = getelementptr inbounds [4 x i32], [4 x i32]* %ptr, i32 %i, i32 %j + ret void +} -- 2.40.0