From 08804a7b3694e04a44ed78ee1014622dc29dc134 Mon Sep 17 00:00:00 2001 From: Nirav Dave Date: Thu, 14 Feb 2019 18:06:21 +0000 Subject: [PATCH] [X86] cleanup inline asm register generation. NFCI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354042 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 680aa438a84..0ecead8b583 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -43209,20 +43209,20 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, if (Size == 64 && !is64Bit) { // Model GCC's behavior here and select a fixed pair of 32-bit // registers. - switch (Res.first) { - case X86::EAX: + switch (DestReg) { + case X86::RAX: return std::make_pair(X86::EAX, &X86::GR32_ADRegClass); - case X86::EDX: + case X86::RDX: return std::make_pair(X86::EDX, &X86::GR32_DCRegClass); - case X86::ECX: + case X86::RCX: return std::make_pair(X86::ECX, &X86::GR32_CBRegClass); - case X86::EBX: + case X86::RBX: return std::make_pair(X86::EBX, &X86::GR32_BSIRegClass); - case X86::ESI: + case X86::RSI: return std::make_pair(X86::ESI, &X86::GR32_SIDIRegClass); - case X86::EDI: + case X86::RDI: return std::make_pair(X86::EDI, &X86::GR32_DIBPRegClass); - case X86::EBP: + case X86::RBP: return std::make_pair(X86::EBP, &X86::GR32_BPSPRegClass); default: return std::make_pair(0, nullptr); -- 2.50.1