From 066bfdcdb8ae335ea2d8a492f07d2cdacc2dade0 Mon Sep 17 00:00:00 2001
From: Jonas Paulsson <paulsson@linux.vnet.ibm.com>
Date: Tue, 18 Jun 2019 12:10:02 +0000
Subject: [PATCH] [SystemZ]  Fix AHIMuxK pseudo expansion.

Do not emit a copy if the source and destination registers are the same.

Review: Ulrich Weigand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363665 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/SystemZ/SystemZInstrInfo.cpp | 10 ++++++----
 test/CodeGen/SystemZ/int-add-18.mir     | 20 ++++++++++++++++++++
 2 files changed, 26 insertions(+), 4 deletions(-)
 create mode 100644 test/CodeGen/SystemZ/int-add-18.mir

diff --git a/lib/Target/SystemZ/SystemZInstrInfo.cpp b/lib/Target/SystemZ/SystemZInstrInfo.cpp
index 865ce0320e5..adb96fa15cb 100644
--- a/lib/Target/SystemZ/SystemZInstrInfo.cpp
+++ b/lib/Target/SystemZ/SystemZInstrInfo.cpp
@@ -168,11 +168,13 @@ void SystemZInstrInfo::expandRIEPseudo(MachineInstr &MI, unsigned LowOpcode,
   if (!DestIsHigh && !SrcIsHigh)
     MI.setDesc(get(LowOpcodeK));
   else {
-    emitGRX32Move(*MI.getParent(), MI, MI.getDebugLoc(), DestReg, SrcReg,
-                  SystemZ::LR, 32, MI.getOperand(1).isKill(),
-                  MI.getOperand(1).isUndef());
+    if (DestReg != SrcReg) {
+      emitGRX32Move(*MI.getParent(), MI, MI.getDebugLoc(), DestReg, SrcReg,
+                    SystemZ::LR, 32, MI.getOperand(1).isKill(),
+                    MI.getOperand(1).isUndef());
+      MI.getOperand(1).setReg(DestReg);
+    }
     MI.setDesc(get(DestIsHigh ? HighOpcode : LowOpcode));
-    MI.getOperand(1).setReg(DestReg);
     MI.tieOperands(0, 1);
   }
 }
diff --git a/test/CodeGen/SystemZ/int-add-18.mir b/test/CodeGen/SystemZ/int-add-18.mir
new file mode 100644
index 00000000000..0137be95c51
--- /dev/null
+++ b/test/CodeGen/SystemZ/int-add-18.mir
@@ -0,0 +1,20 @@
+# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -start-before=postrapseudos \
+# RUN:   %s -o - | FileCheck %s
+#
+# Test that an AHIMuxK pseudo does not result in a COPY (risbhg) if the
+# source and destination registers are the same.
+
+---
+name:             fun
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    $r1h = IIHF 0
+    renamable $r1h = nuw nsw AHIMuxK killed renamable $r1h, 4, implicit-def dead $cc
+
+    ; CHECK-LABEL: fun
+    ; CHECK-NOT: risbhg
+    ; CHECK: aih %r1, 4
+...
+
+
-- 
2.50.1