From 02d3f8d3f5131ca9203909193893e0a63fd3e0c6 Mon Sep 17 00:00:00 2001 From: Kai Luo Date: Thu, 25 Jul 2019 08:36:44 +0000 Subject: [PATCH] [PowerPC][NFC] Make `getDefMIPostRA` public git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366995 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCInstrInfo.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/lib/Target/PowerPC/PPCInstrInfo.h b/lib/Target/PowerPC/PPCInstrInfo.h index 55047ade1c9..5150650439b 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.h +++ b/lib/Target/PowerPC/PPCInstrInfo.h @@ -140,11 +140,6 @@ class PPCInstrInfo : public PPCGenInstrInfo { unsigned &OpNoForForwarding, bool &SeenIntermediateUse) const; - // In PostRA phase, try to find instruction defines \p Reg before \p MI. - // \p SeenIntermediate is set to true if uses between DefMI and \p MI exist. - MachineInstr *getDefMIPostRA(unsigned Reg, MachineInstr &MI, - bool &SeenIntermediateUse) const; - // Can the user MI have it's source at index \p OpNoForForwarding // forwarded from an add-immediate that feeds it? bool isUseMIElgibleForForwarding(MachineInstr &MI, const ImmInstrInfo &III, @@ -447,6 +442,11 @@ public: bool instrHasImmForm(unsigned Opc, bool IsVFReg, ImmInstrInfo &III, bool PostRA) const; + // In PostRA phase, try to find instruction defines \p Reg before \p MI. + // \p SeenIntermediate is set to true if uses between DefMI and \p MI exist. + MachineInstr *getDefMIPostRA(unsigned Reg, MachineInstr &MI, + bool &SeenIntermediateUse) const; + /// getRegNumForOperand - some operands use different numbering schemes /// for the same registers. For example, a VSX instruction may have any of /// vs0-vs63 allocated whereas an Altivec instruction could only have -- 2.40.0