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[mips][microMIPSr6] Implement BEQZALC, BGEZALC, BGTZALC, BLEZALC, BLTZALC and BNEZALC...
authorJozef Kolek <jozef.kolek@imgtec.com>
Wed, 27 May 2015 14:19:22 +0000 (14:19 +0000)
committerJozef Kolek <jozef.kolek@imgtec.com>
Wed, 27 May 2015 14:19:22 +0000 (14:19 +0000)
commitb8124ac882206a4736eb290fa6dd1f8ee4e91430
tree64748d9c26a674d205d25743b15fe5275c1d5f1ftree | snapshot
parentd56dcc424359ae65baedfb067c90359e0ccef1a3commit | diff
[mips][microMIPSr6] Implement BEQZALC, BGEZALC, BGTZALC, BLEZALC, BLTZALC and BNEZALC instructions

This patch implements microMIPS32r6 BEQZALC, BGEZALC, BGTZALC, BLEZALC, BLTZALC
and BNEZALC instructions using mapping.

Differential Revision: http://reviews.llvm.org/D10031

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238325 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MicroMips32r6InstrFormats.td diff | blob | history
lib/Target/Mips/MicroMips32r6InstrInfo.td diff | blob | history
lib/Target/Mips/Mips32r6InstrInfo.td diff | blob | history
test/MC/Disassembler/Mips/micromips32r6.txt diff | blob | history
test/MC/Mips/micromips32r6/valid.s diff | blob | history
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