[DAGCombiner] Make DAGCombiner smarter about overflow

Summary: Leverage it to transform addc into add.

Reviewers: mkuper, spatel, RKSimon, zvi

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294187 91177308-0d34-0410-b5e6-96231b3b80d8

[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)

Summary: This is extracted from D29443 .

Reviewers: mkuper, spatel, RKSimon, zvi, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29564

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294186 91177308-0d34-0410-b5e6-96231b3b80d8

Add DAGCombiner load combine tests with non-zero offset

This is separated from https://reviews.llvm.org/D29394 review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294185 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add add/addc known-bits tests (D29521)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294184 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Combine shuffle nodes with multiple uses if all the users are being combined.

Currently we only combine shuffle nodes if they have a single user to prevent us from causing code bloat by splitting the shuffles into several different combines.

We don't take into account that in some cases we will already have combined all the users during recursively calling up the shuffle tree.

This patch keeps a list of all the shuffle nodes that have been combined so far and permits combining of further shuffle nodes if all its users are in that list.

Differential Revision: https://reviews.llvm.org/D29399

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294183 91177308-0d34-0410-b5e6-96231b3b80d8

[mips] dla expansion without the at register

Previously only the superscalar scheduled expansion of the dla macro for
MIPS64 was implemented. If assembler temporary register is not available
and the optional source register is not the destination register, synthesize
the address using the naive solution of adds and shifts.

This partially resolves PR/30383.

Thanks to Sean Bruno for reporting the issue!

Reviewers: slthakur, seanbruno

Differential Revision: https://reviews.llvm.org/D29328

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294182 91177308-0d34-0410-b5e6-96231b3b80d8

[SCEV] limit recursion depth and operands number in getAddExpr

for a quite big function with source like

%add = add nsw i32 %mul, %conv
%mul1 = mul nsw i32 %add, %conv
%add2 = add nsw i32 %mul1, %add
%mul3 = mul nsw i32 %add2, %add
; repeat couple of thousands times
that can be produced by loop unroll, getAddExpr() tries to recursively construct SCEV and runs almost infinite time.

Added recursion depth restriction (with new parameter to set it)

Reviewers: sanjoy

Subscribers: hfinkel, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D28158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294181 91177308-0d34-0410-b5e6-96231b3b80d8

[AVR] Use 'print' instead of 'dump'

This should fix an undefined reference on the AVR buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294175 91177308-0d34-0410-b5e6-96231b3b80d8

[ArgPromote] Replace all the grep-based testing with precise FileCheck
tests.

This also removes the use of instcombine as we can max the patterns
produced by argument promotion directly with the more powerful tools in
FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294174 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][GlobalISel] Add limited ret lowering support to the IRTranslator.

Summary:
Support return lowering for i8/i16/i32/i64/float/double, vector type supported for 64bit platform only.
Support argument lowering for float/double types.

Reviewers: t.p.northover, zvi, ab, rovka

Reviewed By: zvi

Subscribers: dberris, kristof.beyls, delena, llvm-commits

Differential Revision: https://reviews.llvm.org/D29261

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294173 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX-512] Add VPSLLDQ/VPSRLDQ to load folding tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294170 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX-512] Add VPABSB/D/Q/W to load folding tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294169 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX-512] Add VSHUFPS/PD to load folding tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294168 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX-512] Add VPMULLD/Q/W instructions to load folding tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294164 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX-512] Add all masked and unmasked versions of VPMULDQ and VPMULUDQ to load folding tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294163 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Replace insert_vector_elt(vec, -1, idx) with shuffle

Similar to what we already do for zero elt insertion, we can quickly rematerialize 'allbits' vectors so to avoid a unnecessary gpr value and insertion into a vector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294162 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX-512] Add scalar masked max/min intrinsic instructions to the load folding tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294153 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX-512] Add scalar masked add/sub/mul/div intrinsic instructions to the load folding tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294152 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX-512] Add masked scalar FMA intrinsics to isNonFoldablePartialRegisterLoad to improve load folding of scalar loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294151 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX-512] Add test cases that show failure to fold scalar loads into masked scalar FMA intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294150 91177308-0d34-0410-b5e6-96231b3b80d8

[AVX-512] Move 128/256-bit intrinsic tests from avx512bwvl test file to avx512vl test file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294149 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][AVX] Add 8i32 -> 8f32 sitofp tests with constant insertion

Some elements are constant inserted into the source integer vector before conversion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294147 91177308-0d34-0410-b5e6-96231b3b80d8

[AVR] Implement stacksave/stackrestore by expanding (PR31342)

Summary:
Authored by Florian Zeitz.

This implements the missing stacksave/stackrestore intrinsics via expansion.

Output of `llc -O0 -march=avr ~/devel/llvm/test/CodeGen/Generic/stacksave-restore.ll` for sanity checking (comments mine):

```
.text
.file ".../llvm/test/CodeGen/Generic/stacksave-restore.ll"
.globl test
.p2align 1
.type test,@function
test:                                   ; @test
; BB#0:
push r28
push r29

in r28, 61
in r29, 62
sbiw r28, 4
in r0, 63
cli
out 62, r29
out 63, r0
out 61, r28

in r18, 61
in r19, 62

mov r20, r22
mov r21, r23

in r30, 61
in r31, 62

lsl r22
rol r23
lsl r22
rol r23
in r26, 61
in r27, 62
sub r26, r22
sbc r27, r23
andi r26, 252
in r0, 63
cli
out 62, r27
out 63, r0
out 61, r26

in r0, 63
cli
out 62, r31
out 63, r0
out 61, r30

in r30, 61
in r31, 62
sub r30, r22
sbc r31, r23
andi r30, 252
in r0, 63
cli
out 62, r31
out 63, r0
out 61, r30

std Y+3, r24                ; 2-byte Folded Spill
std Y+4, r25                ; 2-byte Folded Spill

mov r24, r26
mov r25, r27

in r0, 63
cli
out 62, r19
out 63, r0
out 61, r18

std Y+1, r20                ; 2-byte Folded Spill
std Y+2, r21                ; 2-byte Folded Spill

adiw r28, 4
in r0, 63
cli
out 62, r29
out 63, r0
out 61, r28

pop r29
pop r28
ret
.Lfunc_end0:
.size test, .Lfunc_end0-test
```

Reviewers: dylanmckay

Reviewed By: dylanmckay

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29553

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294146 91177308-0d34-0410-b5e6-96231b3b80d8

[docs] Document the staging buildbot

Summary:
This also adds docs to suggest that maintainers of buildbots for
experimental backends should use this buildmaster.

Reviewers: dsanders, grosser, asb, mehdi_amini

Reviewed By: grosser

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29560

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294144 91177308-0d34-0410-b5e6-96231b3b80d8

Revamp llvm::once_flag to be closer to std::once_flag

Summary:
Make this interface reusable similarly to std::call_once and std::once_flag interface.

This makes porting LLDB to NetBSD easier as there was in the original approach a portable way to specify a non-static once_flag. With this change translating std::once_flag to llvm::once_flag is mechanical.

Sponsored by <The NetBSD Foundation>

Reviewers: mehdi_amini, labath, joerg

Reviewed By: mehdi_amini

Subscribers: emaste, clayborg

Differential Revision: https://reviews.llvm.org/D29566

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294143 91177308-0d34-0410-b5e6-96231b3b80d8

[AVR] Marm MIR test functions as tracking liveness information

This fixes an assertion error that broke three tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294140 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-cov] Don't show function summaries when filtering by filename (fixes PR31395)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294137 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-cov] Demangle symbols in function summaries (fixes PR31394)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294136 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-cov] Refactor logic for storing demangled symbols, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294135 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm-cov] Fix a comment, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294134 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Fix printing of sha256rnds2 to include the implicit %xmm0 argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294132 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Fix printing of blendvpd/blendvps/pblendvb to include the implicit %xmm0 argument. This makes codegen output more obvious about the %xmm0 usage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294131 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] In LowerTRUNCATE, create an ISD::VECTOR_SHUFFLE instead of explicitly creating a PSHUFB. This will be lowered by regular shuffle lowering to a PSHUFB later.

Similar was already done for several other shuffles in this function.

The test changes are because the old code used explicity zeroing for elements that could have been undef.

While I was here I also changed other shuffle vectors in the same function to use the same input twice instead of creating UNDEF nodes. getVectorShuffle can create the UNDEF for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294130 91177308-0d34-0410-b5e6-96231b3b80d8

[SelectionDAG] In InstrEmitter, handle EXTRACT_SUBREG of a physical register.

Summary:
Without this change, the getVR() call would hit an assert since it was
being passed a physical register.

Update the AArch64/ldst-opt.ll test with a case that triggers this
behavior by adding a run with strict-align, which causes an unaligned
STR XZR instruction to be split into byte stores, creating an
EXTRACT_SUBREG of XZR that triggers the original problem.

Reviewers: bogner, qcolombet, MatzeB, atrick

Subscribers: aemerson, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D29495

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294129 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Add target cpu specific reciprocal tests

As discussed on D26855, check individual cpu targets as part of the investigation into moving more combines to MachineCombiner

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294128 91177308-0d34-0410-b5e6-96231b3b80d8

[DAGCombiner] Leverage add's commutativity

Summary: This avoid the need to duplicate all pattern and actually end up exposing some opportunity to optimize existing pattern that did not exists in both directions on an existing test case.

Reviewers: mkuper, spatel, bkramer, RKSimon, zvi

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29541

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294125 91177308-0d34-0410-b5e6-96231b3b80d8

[globalisel][arm] Tablegen-erate current Register Bank Information.

Summary:
This patch tablegen-erates the ARM register bank information so that the
static tables added in D27807 no longer need to be maintained.

Depends on D27338

Reviewers: t.p.northover, rovka, ab, qcolombet, aditya_nandakumar

Reviewed By: rovka

Subscribers: aemerson, rengolin, mgorny, dberris, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D28567

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294124 91177308-0d34-0410-b5e6-96231b3b80d8

[AVR] Fix a bug where asm operands are printed twice

We would unconditionally call printOperand, even if PrintAsmOperand
already printed the immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294121 91177308-0d34-0410-b5e6-96231b3b80d8

[AVR] Support zero-sized arguments in defined methods

It is sufficient to skip emission of these arguments as we have nothing
to actually pass through the function call.

The AVR-GCC reference has nothing to say about zero-sized arguments,
presumably because C/C++ doesn't support them. This means we don't have
to worry about ABI differences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294119 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor SampleProfile.cpp to make it cleaner. (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294118 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add support for folding (insert_subvector vec1, (extract_subvector vec2, idx1), idx1) -> (blendi vec2, vec1).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294112 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Simplify the code that turns INSERT_SUBVECTOR into BLENDI. NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294111 91177308-0d34-0410-b5e6-96231b3b80d8

[DAGCombiner] Canonicalize the order of a chain of INSERT_SUBVECTORs.

Based on similar code for INSERT_VECTOR_ELT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294110 91177308-0d34-0410-b5e6-96231b3b80d8

[DAGCombiner] Use DAG.getAnyExtOrTrunc to simplify some code. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294109 91177308-0d34-0410-b5e6-96231b3b80d8

[DAGCombiner] In visitINSERT_VECTOR_ELT, move check for BUILD_VECTOR being legal below code that just canonicalizes INSERT_VECTOR_ELT without creating BUILD_VECTORS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294108 91177308-0d34-0410-b5e6-96231b3b80d8

Add test cases for (trunc adde) DAGCombiner patterns. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294105 91177308-0d34-0410-b5e6-96231b3b80d8

TripleTest.FileFormat: check non-default value

Triple::objectFormat defaults to an Elf format.
Changing objectFormat to Elf doesn't make any difference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294104 91177308-0d34-0410-b5e6-96231b3b80d8

Add lld to the test-release.sh script

Building lld is enabled by default, but it can be disabled using the
-no-lld option.

Reviewers: tstellarAMD, rengolin, hans

Reviewed By: hans

Subscribers: grosser, wdng, emaste, llvm-commits

Differential Revision: https://reviews.llvm.org/D29539

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294102 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Add target shuffle combine buildvec style tests

Extra tests for D29399

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294101 91177308-0d34-0410-b5e6-96231b3b80d8

[IPCP] Don't propagate return value for naked functions.

This is pretty much the same change made in SCCP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294098 91177308-0d34-0410-b5e6-96231b3b80d8

TripleTest.BitWidthArchVariants: add missing arch types (thumb, arm, le, ...)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294096 91177308-0d34-0410-b5e6-96231b3b80d8

TripleTest.EndianArchVariants: add missing arch types (tce, le)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294095 91177308-0d34-0410-b5e6-96231b3b80d8

Formatting in DAGCombiner. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294091 91177308-0d34-0410-b5e6-96231b3b80d8

Fix variable name /NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294090 91177308-0d34-0410-b5e6-96231b3b80d8

[CodeGen] Add v32i1 to is32BitVector and v64i1 to is64BitVector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294089 91177308-0d34-0410-b5e6-96231b3b80d8

MachineCopyPropagation: Respect implicit operands of COPY

The code missed to check implicit operands of COPY instructions for
defs/uses.

Differential Revision: https://reviews.llvm.org/D29522

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294088 91177308-0d34-0410-b5e6-96231b3b80d8

MachineCopyPropagation: Do not consider undef operands as clobbers

This was originally introduced in r278321 to work around correctness
problems in the ExecutionDepsFix pass; Probably also to keep the
performance benefits of breaking the false dependencies which of course
also affect undef operands.

ExecutionDepsFix has been improved here recently (see for example
r278321) so we should not need this exception any longer.

Differential Revision: https://reviews.llvm.org/D29525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294087 91177308-0d34-0410-b5e6-96231b3b80d8

[CodeGen]: BlockPlacement: Skip extraneous logging.

Move a check for blocks that are not candidates for tail duplication up before
the logging. Reduces logging noise. No non-logging changes intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294086 91177308-0d34-0410-b5e6-96231b3b80d8

[CodeGen]: BlockPlacement: Apply const liberally. NFC

Anything that needs to be passed to AnalyzeBranch unfortunately can't be const,
or more would be const. Added const_iterator to BlockChain to allow
BlockChain to be const when we don't expect to change it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294085 91177308-0d34-0410-b5e6-96231b3b80d8

[CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

This is preparation to reduce TargetInstrInfo.h dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294084 91177308-0d34-0410-b5e6-96231b3b80d8

[TwoAddressInstruction] Fix typo in comment. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294083 91177308-0d34-0410-b5e6-96231b3b80d8

[NVPTX] Add tests that invariant vector loads get lowered to ld.global.nc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294082 91177308-0d34-0410-b5e6-96231b3b80d8

Remove a bunch of unnecessary casts to a target specific version of TII and TRI as we're working from a target specific STI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294081 91177308-0d34-0410-b5e6-96231b3b80d8

Add test cases for bug 31719. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294080 91177308-0d34-0410-b5e6-96231b3b80d8

fix nullptr Mangler in LTOModule

Reviewers: kcc, pcc

Subscribers: mehdi_amini

Differential Revision: https://reviews.llvm.org/D29523

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294079 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalISel] Add a few comments to the tablegen backend. NFC.

Based on a review of D29478 by Kristof Beyls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294077 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalISel] Print the matched patterns using an action.

This lets us split out PatternToMatch from the top-level RuleMatcher,
where it doesn't really belong.  That, in turn, lets us eventually
generate RuleMatchers from non-SelectionDAG sources.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294076 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalISel] Add a test for the tablegen selector emitter backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294075 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalISel] Separate matchers with newlines in emitted selector. NFC.

We don't try very hard to format the emitted code, but newlines
are an easy way to make it more readable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294074 91177308-0d34-0410-b5e6-96231b3b80d8

[Support] Simplify triple check in Host CPU test. NFC.

Cleanup the check added in r293990 using the Triple helpers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294073 91177308-0d34-0410-b5e6-96231b3b80d8

[Sparc] Fix some Include What You Use warnings; other minor fixes (NFC).

This is preparation to reduce MCExpr.h dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294072 91177308-0d34-0410-b5e6-96231b3b80d8

[RegisterCoalescer] Do not call getInstructionIndex with DBG_VALUE

An assert occurs when calling SlotIndexes::getInstructionIndex with
a DBG_VALUE instruction because the function expects an instruction
with a slot index. However, there is no slot index for a DBG_VALUE
instruction.

Differential Revision: https://reviews.llvm.org/D29048

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294070 91177308-0d34-0410-b5e6-96231b3b80d8

[Mips] Fix some Include What You Use warnings; other minor fixes (NFC).

This is preparation to reduce MCExpr.h dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294069 91177308-0d34-0410-b5e6-96231b3b80d8

[SystemZ] Fix some Include What You Use warnings; other minor fixes (NFC).

This is preparation to reduce MCExpr.h dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294068 91177308-0d34-0410-b5e6-96231b3b80d8

[AMDGPU] Fix some Include What You Use warnings; other minor fixes (NFC).

This is preparation to reduce MCExpr.h dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294067 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] treat i1 as a special type in shouldChangeType()

This patch is based on the llvm-dev discussion here:
http://lists.llvm.org/pipermail/llvm-dev/2017-January/109631.html

Folding to i1 should always be desirable because that's better for value tracking
and we have special folds for i1 types.

I checked for other users of shouldChangeType() where this might have an effect,
but we already handle the i1 case differently than other types in all of those cases.

Side note: the default datalayout includes i1, so it seems we only find this gap in
shouldChangeType + phi folding for the case when there is (1) an explicit datalayout
without i1, (2) casting to i1 from a legal type, and (3) a phi with exactly 2 incoming
casted operands (as Björn mentioned).

Differential Revision: https://reviews.llvm.org/D29336

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294066 91177308-0d34-0410-b5e6-96231b3b80d8

[APInt] Add integer API bor bitwise operations.

Summary: As per title. I ran into that limitation of the API doing some other work, so I though that'd be a nice addition.

Reviewers: jroelofs, compnerd, majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29503

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294063 91177308-0d34-0410-b5e6-96231b3b80d8

[libFuzzer] properly hide the memcmp interceptor from msan

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294061 91177308-0d34-0410-b5e6-96231b3b80d8

[PGO] Add select instr profile in graph dump

Differential Revision: http://reviews.llvm.org/D29474

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294055 91177308-0d34-0410-b5e6-96231b3b80d8

[AArch64] Fix some Include What You Use warnings; other minor fixes (NFC).

This is preparation to reduce MCExpr.h dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294053 91177308-0d34-0410-b5e6-96231b3b80d8

[ARM] Fix some Include What You Use warnings; other minor fixes (NFC).

This is preparation to reduce MCExpr.h dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294052 91177308-0d34-0410-b5e6-96231b3b80d8

[XCore] Fix some Include What You Use warnings; other minor fixes (NFC).

This is preparation to reduce MCExpr.h dependencies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294051 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] fix operand-complexity-based canonicalization (PR28296)

The code comments didn't match the code logic, and we didn't actually distinguish the fake unary (not/neg/fneg)
operators from arguments. Adding another level to the weighting scheme provides more structure and can help
simplify the pattern matching in InstCombine and other places.

I fixed regressions that would have shown up from this change in:
rL290067
rL290127

But that doesn't mean there are no pattern-matching logic holes left; some combines may just be missing regression tests.

Should fix:
https://llvm.org/bugs/show_bug.cgi?id=28296

Differential Revision: https://reviews.llvm.org/D27933

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294049 91177308-0d34-0410-b5e6-96231b3b80d8

[AMDGPU][mc][tests][NFC] Add coverage/smoke Gfx7 asm test (3rd attempt)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294047 91177308-0d34-0410-b5e6-96231b3b80d8

Properly parse the TypeServer2 record.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294046 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] auto-generate better test checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294040 91177308-0d34-0410-b5e6-96231b3b80d8

AMDGPU: AsmParser cleanups

Use typedef, remove unnecessary enum, line wraps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294039 91177308-0d34-0410-b5e6-96231b3b80d8

AMDGPU: Cleanup scalar_to_vector test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294038 91177308-0d34-0410-b5e6-96231b3b80d8

[libfuzzer] chromium-related compilation fixes

Reviewers: kcc

Differential Revision: https://reviews.llvm.org/D29502

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294035 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] auto-generate better test checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294034 91177308-0d34-0410-b5e6-96231b3b80d8

[AMDGPU] Bump -amdgpu-unroll-threshold-private to 2000

This has quite positive performance impact according to measurements.
Before previous fixes to limit the optimization that was too high
and blowed compile time and scratch usage, but now this is gone and
we can bump the threshold.

Differential Revision: https://reviews.llvm.org/D29505

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294032 91177308-0d34-0410-b5e6-96231b3b80d8

AMDGPU: Set MCAsmInfo::PointerSize

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294031 91177308-0d34-0410-b5e6-96231b3b80d8

AMDGPU: Don't unroll for private with dynamic allocas

This won't be elimnated, so this will just bloat code
if/when these are ever used/supported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294030 91177308-0d34-0410-b5e6-96231b3b80d8

[SLP] Make sortMemAccesses explicitly return an error. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294029 91177308-0d34-0410-b5e6-96231b3b80d8

[TLI] Robustize SDAG LibFunc proto checking by merging it into TLI.

This re-applies commit r292189, reverted in r292191.

SelectionDAGBuilder recognizes libfuncs using some homegrown
parameter type-checking.

Use TLI instead, removing another heap of redundant code.

This isn't strictly NFC, as the SDAG code was too lax.
Concretely, this means changes are required to a few tests:
- calling a non-variadic function via a variadic prototype isn't OK;
  it just happens to work on x86_64 (but not on, e.g., aarch64).
- mempcpy has a size_t parameter;  the SDAG code accepts any integer
  type, which meant using i32 on x86_64 worked.
- a handful of SystemZ tests check the SDAG support for lax prototype
  checking: Ulrich agrees on removing them.

I don't think it's worth supporting any of these (IMO) invalid
testcases.  Instead, fix them to be more meaningful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294028 91177308-0d34-0410-b5e6-96231b3b80d8

[SLP] Use SCEV to sort memory accesses.

This generalizes memory access sorting to use differences between SCEVs,
instead of relying on constant offsets. That allows us to properly do
SLP vectorization of non-sequentially ordered loads within loops bodies.

Differential Revision: https://reviews.llvm.org/D29425

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294027 91177308-0d34-0410-b5e6-96231b3b80d8

GlobalISel: translate dynamic alloca instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294022 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug in llvm-obdump(1) with the -objc-meta-data flag with -macho
which caused a hang on a malformed binary with bad bind info.

rdar://29672108

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294021 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Add support for combining scalar_to_vector(extract_vector_elt) into a target shuffle.

Correctly flagging upper elements as undef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294020 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Renamed all_of/any_of reduction patterns tests

Make it clear these tests sign-extend the comparison result. Some patterns zero-extend to a bool result that we still need to handle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294018 91177308-0d34-0410-b5e6-96231b3b80d8