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6 years ago[TEST] Add failing test that shows problems with MSSA update in LoopSimplifyCFG
Max Kazantsev [Thu, 21 Feb 2019 09:40:24 +0000 (09:40 +0000)]
[TEST] Add failing test that shows problems with MSSA update in LoopSimplifyCFG

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354559 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] Negative constants mishandled in ARM CGP
Sam Parker [Thu, 21 Feb 2019 09:33:18 +0000 (09:33 +0000)]
[ARM] Negative constants mishandled in ARM CGP

During type promotion, sometimes we convert negative an add with a
negative constant into a sub with a positive constant. The loop that
performs this transformation has two issues:
- it iterates over a set, causing non-determinism.
- it breaks, instead of continuing, when it finds the first
  non-negative operand.

Differential Revision: https://reviews.llvm.org/D58452

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354557 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo] Prep llvm-dwarfdump for typed DW5 ops.
Markus Lavin [Thu, 21 Feb 2019 08:20:24 +0000 (08:20 +0000)]
[DebugInfo] Prep llvm-dwarfdump for typed DW5 ops.

Adds llvm-dwarfdump support for pretty printing Dwarf5 expressions ops
that reference a base type (right now only DW_OP_convert is added).
Includes verification to verify that the ops operand is actually a
DW_TAG_base_type DIE.

Differential Revision: https://reviews.llvm.org/D58442

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354552 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix file header issues in fuzzers. NFC
Fangrui Song [Thu, 21 Feb 2019 07:57:14 +0000 (07:57 +0000)]
Fix file header issues in fuzzers. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354551 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix some include order and file headers issues. NFC
Fangrui Song [Thu, 21 Feb 2019 07:42:31 +0000 (07:42 +0000)]
Fix some include order and file headers issues. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354550 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LoopSimplifyCFG] Add missing MSSA edge deletion
Max Kazantsev [Thu, 21 Feb 2019 05:51:29 +0000 (05:51 +0000)]
[LoopSimplifyCFG] Add missing MSSA edge deletion

When we create fictive switch in preheader, we should take
care about MSSA and delete edge between old preheader and
header.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354547 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Default to something reasonable in WebAssemblyAddMissingPrototypes
Sam Clegg [Thu, 21 Feb 2019 03:27:00 +0000 (03:27 +0000)]
[WebAssembly] Default to something reasonable in WebAssemblyAddMissingPrototypes

Previously if we couldn't derive a prototype for a "no-prototype"
function from C we would leave it as is:

  void foo(...)

With this change we instead give is an empty signature and remove
the "no-prototype" attribute.

This fixes the current wasm waterfall test failure.

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58488

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354544 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] fix commuted case of sub combine
Stanislav Mekhanoshin [Thu, 21 Feb 2019 02:58:00 +0000 (02:58 +0000)]
[AMDGPU] fix commuted case of sub combine

Differential Revision: https://reviews.llvm.org/D58481

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354543 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Inliner] Pass nullptr for the ORE param of getInlineCost if RemarkEnabled
Wei Mi [Thu, 21 Feb 2019 02:57:52 +0000 (02:57 +0000)]
[Inliner] Pass nullptr for the ORE param of getInlineCost if RemarkEnabled
is false.

Right now for inliner and partial inliner, we always pass the address of a
valid ORE object to getInlineCost even if RemarkEnabled is false because of
no -Rpass is specified. Since ComputeFullInlineCost will be set to true if
ORE is non-null in getInlineCost, this introduces the problem that in
getInlineCost we cannot return early even if we already know the cost is
definitely higher than the threshold. It is a general problem for compile
time.

This patch fixes that by pass nullptr as the ORE argument if RemarkEnabled is
false.

Differential Revision: https://reviews.llvm.org/D58399

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354542 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd skipFunction to PostRA machine sinking pass.
Xin Tong [Thu, 21 Feb 2019 02:11:06 +0000 (02:11 +0000)]
Add skipFunction to PostRA machine sinking pass.

Summary: Add skipFunction to PostRA machine sinking pass.

Reviewers: junbuml

Subscribers: arsenm, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57847

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354541 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[libFuzzer] fix the docs
Kostya Serebryany [Thu, 21 Feb 2019 00:43:46 +0000 (00:43 +0000)]
[libFuzzer] fix the docs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354536 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[libFuzzer] document -fork=N
Kostya Serebryany [Thu, 21 Feb 2019 00:32:30 +0000 (00:32 +0000)]
[libFuzzer] document -fork=N

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354533 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR"
Amara Emerson [Thu, 21 Feb 2019 00:31:13 +0000 (00:31 +0000)]
Revert "[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR"

This reverts r354521 because it broke the bots, but passes on Darwin somehow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354532 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel] Add -O0 to some tests to see if it fixes them. I can't reproduce the...
Amara Emerson [Wed, 20 Feb 2019 23:22:15 +0000 (23:22 +0000)]
[GlobalISel] Add -O0 to some tests to see if it fixes them. I can't reproduce the failures locally,
and greendragon also passes, but some other bots fail for reasons I don't understand.
The only difference I can see between these tests is it's missing an -O0
If this doesn't work I'll revert and continue investigating.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354529 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CMake][runtimes] Set clang-header dependency for builtins
Petr Hosek [Wed, 20 Feb 2019 23:06:10 +0000 (23:06 +0000)]
[CMake][runtimes] Set clang-header dependency for builtins

compiler-rt builtins depend on clang headers, but that dependency
wasn't explicitly stated in the build system and we were relying
on the transitive depenendecy via clang. However, when we're
cross-compiling clang, we'll be using host compiler instead and
that depenendecy is missing, breaking the build.

Differential Revision: https://reviews.llvm.org/D58471

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354524 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Don't error on conflicting uses of prototype-less functions
Sam Clegg [Wed, 20 Feb 2019 22:40:57 +0000 (22:40 +0000)]
[WebAssembly] Don't error on conflicting uses of prototype-less functions

When we can't determine with certainty the signature of a function
import we pick the fist signature we find rather than error'ing out.

The resulting program might not do what is expected since we might pick
the wrong signature.  However since undefined behavior in C to use the
same function with different signatures this seems better than refusing
to compile such programs.

Fixes PR40472

Differential Revision: https://reviews.llvm.org/D58304

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354523 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR
Amara Emerson [Wed, 20 Feb 2019 22:11:39 +0000 (22:11 +0000)]
[AArch64][GlobalISel] Implement partial support for G_SHUFFLE_VECTOR

This change makes some basic type combinations for G_SHUFFLE_VECTOR legal, and
implements them with a very pessimistic TBL2 instruction in the selector.

For TBL2, support is also needed to generate constant pool entries and load from
them in order to materialize the mask register.

Currently supports <2 x s64> and <4 x s32> result types.

Differential Revision: https://reviews.llvm.org/D58466

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354521 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add test cases to show missed opportunities to remove AND mask from BTC/BTS...
Craig Topper [Wed, 20 Feb 2019 21:35:05 +0000 (21:35 +0000)]
[X86] Add test cases to show missed opportunities to remove AND mask from BTC/BTS/BTR instructions when LHS of AND has known zeros.

We can currently remove the mask if the immediate has all ones in the LSBs, but if the LHS of the AND is known zero, then the immediate might have had bits removed.

A similar issue also occurs with shifts and rotates. I'm preparing a common fix for all of them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354520 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CGP] match a special-case of unsigned subtract overflow
Sanjay Patel [Wed, 20 Feb 2019 21:23:04 +0000 (21:23 +0000)]
[CGP] match a special-case of unsigned subtract overflow

This is the 'sub0' (negate) pattern from PR31754:
https://bugs.llvm.org/show_bug.cgi?id=31754

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354519 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAGCombine] Generalize Dead Store to overlapping stores.
Nirav Dave [Wed, 20 Feb 2019 21:07:50 +0000 (21:07 +0000)]
[DAGCombine] Generalize Dead Store to overlapping stores.

Summary:
Remove stores that are immediately overwritten by larger
stores.

Reviewers: courbet, rnk

Reviewed By: rnk

Subscribers: javed.absar, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58467

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354518 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU/GlobalISel: Move SMRD selection logic to TableGen
Tom Stellard [Wed, 20 Feb 2019 21:02:37 +0000 (21:02 +0000)]
AMDGPU/GlobalISel: Move SMRD selection logic to TableGen

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: volkan, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D52922

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354516 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SelectionDAG] Teach GetDemandedBits to look at the known zeros of the LHS when handl...
Craig Topper [Wed, 20 Feb 2019 20:52:26 +0000 (20:52 +0000)]
[SelectionDAG] Teach GetDemandedBits to look at the known zeros of the LHS when handling ISD::AND

If the LHS has known zeros, then the RHS immediate mask might have been simplified to remove those bits.

This patch adds a call to computeKnownBits to get the known zeroes to handle that possibility. I left an early out to skip the call if all of the demanded bits are set in the mask.

Differential Revision: https://reviews.llvm.org/D58464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354514 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SDAG] Support vector UMULO/SMULO
Nikita Popov [Wed, 20 Feb 2019 20:41:44 +0000 (20:41 +0000)]
[SDAG] Support vector UMULO/SMULO

Second part of https://bugs.llvm.org/show_bug.cgi?id=40442.

This adds an extra UnrollVectorOverflowOp() method to SDAG, because
the general UnrollOverflowOp() method can't deal with multiple results.

Additionally we need to expand UMULO/SMULO during vector op
legalization, as it may result in unrolling, which may need additional
type legalization.

Differential Revision: https://reviews.llvm.org/D57997

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354513 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add more load folding patterns for blend instructions as a follow up to r354363.
Craig Topper [Wed, 20 Feb 2019 20:18:20 +0000 (20:18 +0000)]
[X86] Add more load folding patterns for blend instructions as a follow up to r354363.

This avoids depending on the peephole pass to do load folding.

Also adds some load folding for some insert_subvector patterns that use blend.

All of this was found by temporarily adding TB_NO_FORWARD to the blend immediate entries in the load folding tables.

I've added -disable-peephole to some of the affected tests from that experiment to ensure we're testing isel patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354511 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd support for pointer types in patterns
Tom Stellard [Wed, 20 Feb 2019 19:43:47 +0000 (19:43 +0000)]
Add support for pointer types in patterns

Summary:
This adds support for defining patterns for global isel using pointer
types, for example:

def : Pat<(load GPR32:$src),
          (p1 (LOAD GPR32:$src))>;

DAGISelEmitter will ignore the pointer information and treat these
types as integers with the same bit-width as the pointer type.

Reviewers: dsanders, rtereshin, arsenm

Reviewed By: arsenm

Subscribers: Petar.Avramovic, wdng, rovka, kristof.beyls, jfb, volkan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57065

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354510 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix testcase.
Nirav Dave [Wed, 20 Feb 2019 19:26:47 +0000 (19:26 +0000)]
Fix testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354508 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[clangd] Store index in '.clangd/index' instead of '.clangd-index'
Ilya Biryukov [Wed, 20 Feb 2019 19:08:06 +0000 (19:08 +0000)]
[clangd] Store index in '.clangd/index' instead of '.clangd-index'

Summary: To take up the .clangd folder for other potential uses in the future.

Reviewers: kadircet, sammccall

Reviewed By: kadircet

Subscribers: ioeric, MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D58440

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354505 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd test case.
Nirav Dave [Wed, 20 Feb 2019 19:07:55 +0000 (19:07 +0000)]
Add test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354504 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add test case to show missed opportunity to remove an explicit AND on the bit...
Craig Topper [Wed, 20 Feb 2019 19:02:01 +0000 (19:02 +0000)]
[X86] Add test case to show missed opportunity to remove an explicit AND on the bit position from BT when it has known zeros. NFC

If the bit position has known zeros in it, then the AND immediate will likely be optimized to remove bits.

This can prevent GetDemandedBits from recognizing that the AND is unnecessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354501 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r354498 "[X86] Add test case to show missed opportunity to remove an explicit...
Craig Topper [Wed, 20 Feb 2019 18:47:26 +0000 (18:47 +0000)]
Revert r354498 "[X86] Add test case to show missed opportunity to remove an explicit AND on the bit position from BT when it has known zeros."

I accidentally committed more than just the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354499 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add test case to show missed opportunity to remove an explicit AND on the bit...
Craig Topper [Wed, 20 Feb 2019 18:45:38 +0000 (18:45 +0000)]
[X86] Add test case to show missed opportunity to remove an explicit AND on the bit position from BT when it has known zeros.

If the bit position has known zeros in it, then the AND immediate will likely be optimized to remove bits.

This can prevent GetDemandedBits from recognizing that the AND is unnecessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354498 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAArch64/test: Add check for function name to machine-outliner-bad-adrp.mir
Tom Stellard [Wed, 20 Feb 2019 18:43:45 +0000 (18:43 +0000)]
AArch64/test: Add check for function name to machine-outliner-bad-adrp.mir

Summary:
This test was failing in one of our setups because the generated ModuleID
had the full path of the test file and that path contained the string
BL.

Reviewers: t.p.northover, jpaquette, paquette

Reviewed By: paquette

Subscribers: javed.absar, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354497 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFixing NDEBUG typo in include/llvm/Support/raw_ostream.h
Puyan Lotfi [Wed, 20 Feb 2019 18:30:44 +0000 (18:30 +0000)]
Fixing NDEBUG typo in include/llvm/Support/raw_ostream.h

NDEBUG is misspelled as NDBEBUG in include/llvm/Support/raw_ostream.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354495 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MCA][Scheduler] Correctly initialize field NumDispatchedToThePendingSet.
Andrea Di Biagio [Wed, 20 Feb 2019 18:23:19 +0000 (18:23 +0000)]
[MCA][Scheduler] Correctly initialize field NumDispatchedToThePendingSet.

This should have been part of r354490.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354493 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd partial implementation of std::to_address() as llvm::to_address()
Daniel Sanders [Wed, 20 Feb 2019 18:08:48 +0000 (18:08 +0000)]
Add partial implementation of std::to_address() as llvm::to_address()

Summary:
Following on from the review for D58088, this patch provides the
prerequisite to_address() implementation that's needed to have
pointer_iterator support unique_ptr.

The late bound return should be removed once we move to C++14 to better
align with the C++20 declaration. Also, this implementation can be removed
once we move to C++20 where it's defined as std::to_addres()

The std::pointer_traits<>::to_address(p) variations of these overloads has
not been implemented.

Reviewers: dblaikie, paquette

Reviewed By: dblaikie

Subscribers: dexonsmith, kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58421

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354491 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MCA][Scheduler] Collect resource pressure and memory dependency bottlenecks.
Andrea Di Biagio [Wed, 20 Feb 2019 18:01:49 +0000 (18:01 +0000)]
[MCA][Scheduler] Collect resource pressure and memory dependency bottlenecks.

Every cycle, the Scheduler checks if instructions in the ReadySet can be issued
to the underlying pipelines. If an instruction cannot be issued because one or
more pipeline resources are unavailable, then field
Instruction::CriticalResourceMask is updated with the resource identifier of the
unavailable resources.

If an instruction cannot be promoted from the PendingSet to the ReadySet because
of a memory dependency, then field Instruction::CriticalMemDep is updated with
the identifier of the dependending memory instruction.

Bottleneck information is collected after every cycle for instructions that are
waiting to execute. The idea is to help identify causes of bottlenecks; this
information can be used in future to implement a bottleneck analysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354490 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] combineX86ShufflesRecursively - begin generalizing the number of shuffle...
Simon Pilgrim [Wed, 20 Feb 2019 17:58:29 +0000 (17:58 +0000)]
[X86][SSE] combineX86ShufflesRecursively - begin generalizing the number of shuffle inputs. NFCI.

We currently bail if the target shuffle decodes to more than 2 input vectors, this is some initial cleanup that still has the limit but generalizes the opindices to an array that will be necessary when we drop the limit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354489 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-readelf]Test a couple of corner-cases for --section-mapping
James Henderson [Wed, 20 Feb 2019 17:21:38 +0000 (17:21 +0000)]
[llvm-readelf]Test a couple of corner-cases for --section-mapping

This patch adds two new tests for edge-case behaviour for --section-
mapping, namely when there are no program headers, and when there are no
section headers.

Reviewed by: mattd

Differential Revision: https://reviews.llvm.org/D58456

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354484 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoGlobalISel: Fix fewerElementsVector for ctlz with different result type
Matt Arsenault [Wed, 20 Feb 2019 16:42:52 +0000 (16:42 +0000)]
GlobalISel: Fix fewerElementsVector for ctlz with different result type

Also complete the set of related operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354480 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoGlobalISel: Implement moreElementsVector for g_insert results
Matt Arsenault [Wed, 20 Feb 2019 16:11:22 +0000 (16:11 +0000)]
GlobalISel: Implement moreElementsVector for g_insert results

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354477 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRe-land the refactoring part of r354244 "[DAGCombiner] Eliminate dead stores to stack."
Clement Courbet [Wed, 20 Feb 2019 15:45:58 +0000 (15:45 +0000)]
Re-land the refactoring part of r354244 "[DAGCombiner] Eliminate dead stores to stack."

This is an NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354476 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CGP][x86] add tests for usubo special-case; NFC
Sanjay Patel [Wed, 20 Feb 2019 15:40:58 +0000 (15:40 +0000)]
[CGP][x86] add tests for usubo special-case; NFC

This is another example from PR31754:
https://bugs.llvm.org/show_bug.cgi?id=31754

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354475 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[obj2yaml][yaml2obj]Locate all .yaml and .test tests
James Henderson [Wed, 20 Feb 2019 15:13:44 +0000 (15:13 +0000)]
[obj2yaml][yaml2obj]Locate all .yaml and .test tests

A number of the obj2yaml tests end in .yaml, but .yaml is not a default
file type picked up by lit, so these tests weren't being run when
running the testsuite as a whole (they could be run explicitly still).
This change adds a lit local config file to specify the known file types
for obj2yaml tests (.yaml and .test). Additionally, it fixes the
yaml2obj config file to allow both .test and .yaml suffixed tests
(previously, the two tests ending in '.test' were not being run).

Reviewed by: grimar

Differential Revision: https://reviews.llvm.org/D58439

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354474 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Split vector pairs for ISD::SIGN_EXTEND and ISD::ZERO_EXTEND
Krzysztof Parzyszek [Wed, 20 Feb 2019 15:05:19 +0000 (15:05 +0000)]
[Hexagon] Split vector pairs for ISD::SIGN_EXTEND and ISD::ZERO_EXTEND

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354473 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSpeculative buildfix for Mac
Hans Wennborg [Wed, 20 Feb 2019 14:56:31 +0000 (14:56 +0000)]
Speculative buildfix for Mac

Our builds were failing with

FAILED: lib/Support/CMakeFiles/LLVMSupport.dir/ARMBuildAttrs.cpp.o
[..]
In file included from /b/c/b/ToTMac/src/third_party/llvm/lib/Support/ARMBuildAttrs.cpp:9:
In file included from /b/c/b/ToTMac/src/third_party/llvm/include/llvm/ADT/StringRef.h:12:
In file included from /b/c/b/ToTMac/src/third_party/llvm/include/llvm/ADT/STLExtras.h:19:
/b/c/b/ToTMac/src/third_party/llvm/include/llvm/ADT/Optional.h:88:25: error: no member named 'addressof' in namespace 'std'
    ::new ((void *)std::addressof(value)) T(std::forward<Args>(args)...);
                   ~~~~~^

Try to fix by including <memory>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354472 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MCA][ResourceManager] Add a table that maps processor resource indices to processor...
Andrea Di Biagio [Wed, 20 Feb 2019 14:53:18 +0000 (14:53 +0000)]
[MCA][ResourceManager] Add a table that maps processor resource indices to processor resource identifiers.

This patch adds a lookup table to speed up resource queries in the ResourceManager.
This patch also moves helper function 'getResourceStateIndex()' from
ResourceManager.cpp to Support.h, so that we can reuse that logic in the
SummaryView (and potentially other views in llvm-mca).
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354470 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix the build with gcc/libstdc++ 4.8.2 after r354441
Hans Wennborg [Wed, 20 Feb 2019 14:50:08 +0000 (14:50 +0000)]
Fix the build with gcc/libstdc++ 4.8.2 after r354441

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354469 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstSimplify] use any-zero matcher for fcmp folds
Sanjay Patel [Wed, 20 Feb 2019 14:34:00 +0000 (14:34 +0000)]
[InstSimplify] use any-zero matcher for fcmp folds

The m_APFloat matcher does not work with anything but strict
splat vector constants, so we could miss these folds and then
trigger an assertion in instcombine:
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=13201

The previous attempt at this in rL354406 had a logic bug that
actually triggered a regression test failure, but I failed to
notice it the first time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354467 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[yaml2elf] - Rename a variable. NFC.
George Rimar [Wed, 20 Feb 2019 14:01:02 +0000 (14:01 +0000)]
[yaml2elf] - Rename a variable. NFC.

Was suggested during review of D58441.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354463 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[yaml2obj] - Simplify implementation. NFCI.
George Rimar [Wed, 20 Feb 2019 13:58:43 +0000 (13:58 +0000)]
[yaml2obj] - Simplify implementation. NFCI.

Knowing about how types are declared for 32/64 bit platforms:
https://github.com/llvm-mirror/llvm/blob/master/include/llvm/BinaryFormat/ELF.h#L28

it is possible to simplify code that writes a binary a bit.
The patch does that.

Differential revision: https://reviews.llvm.org/D58441

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354462 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MIPS MSA] Avoid some DAG combines for vector shifts
Petar Avramovic [Wed, 20 Feb 2019 13:42:44 +0000 (13:42 +0000)]
[MIPS MSA] Avoid some DAG combines for vector shifts

DAG combiner combines two shifts into shift + and with bitmask.
Avoid such combines for vectors since leaving two vector shifts
as they are produces better end results.

Differential Revision: https://reviews.llvm.org/D58225

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354461 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MIPS MSA] Add test for vector shift combines
Petar Avramovic [Wed, 20 Feb 2019 12:13:11 +0000 (12:13 +0000)]
[MIPS MSA] Add test for vector shift combines

Add test for vector shift combines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354455 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SLPVectorizer][X86] Add add/sub/mul overflow tests
Simon Pilgrim [Wed, 20 Feb 2019 12:04:54 +0000 (12:04 +0000)]
[SLPVectorizer][X86] Add add/sub/mul overflow tests

Baseline tests - overflow intrinsics aren't flagged as vectorizable yet

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354454 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Codegen] Remove dead flags on Physical Defs in machine cse
David Green [Wed, 20 Feb 2019 10:22:18 +0000 (10:22 +0000)]
[Codegen] Remove dead flags on Physical Defs in machine cse

We may leave behind incorrect dead flags on instructions that are CSE'd. Make
sure we remove the dead flags on physical registers to prevent other incorrect
code motion.

Differential Revision: https://reviews.llvm.org/D58115

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354443 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-exegesis] Opcode stabilization / reclusterization (PR40715)
Roman Lebedev [Wed, 20 Feb 2019 09:14:04 +0000 (09:14 +0000)]
[llvm-exegesis] Opcode stabilization / reclusterization (PR40715)

Summary:
Given an instruction `Opcode`, we can make benchmarks (measurements) of the
instruction characteristics/performance. Then, to facilitate further analysis
we group the benchmarks with *similar* characteristics into clusters.
Now, this is all not entirely deterministic. Some instructions have variable
characteristics, depending on their arguments. And thus, if we do several
benchmarks of the same instruction `Opcode`, we may end up with *different*
performance characteristics measurements. And when we then do clustering,
these several benchmarks of the same instruction `Opcode` may end up being
clustered into *different* clusters. This is not great for further analysis.

We shall find every `Opcode` with benchmarks not in just one cluster, and move
*all* the benchmarks of said `Opcode` into one new unstable cluster per `Opcode`.

I have solved this by making `ClusterId` a bit field, adding a `IsUnstable` bit,
and introducing `-analysis-display-unstable-clusters` switch to toggle between
displaying stable-only clusters and unstable-only clusters.

The reclusterization is deterministically stable, produces identical reports
between runs. (Or at least that is what i'm seeing, maybe it isn't)

Timings/comparisons:
old (current trunk/head) {F8303582}
```
$ perf stat -r 25 ./bin/llvm-exegesis -mode=analysis -analysis-epsilon=0.5 -benchmarks-file=/home/lebedevri/PileDriver-Sched/benchmarks-inverse_throughput.yaml -analysis-inconsistencies-output-file=/tmp/clusters-old.html
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 43970 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-old.html'
...
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 43970 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-old.html'

 Performance counter stats for './bin/llvm-exegesis -mode=analysis -analysis-epsilon=0.5 -benchmarks-file=/home/lebedevri/PileDriver-Sched/benchmarks-inverse_throughput.yaml -analysis-inconsistencies-output-file=/tmp/clusters-old.html' (25 runs):

           6624.73 msec task-clock                #    0.999 CPUs utilized            ( +-  0.53% )
               172      context-switches          #   25.965 M/sec                    ( +- 29.89% )
                 0      cpu-migrations            #    0.042 M/sec                    ( +- 56.54% )
             31073      page-faults               # 4690.754 M/sec                    ( +-  0.08% )
       26538711696      cycles                    # 4006230.292 GHz                   ( +-  0.53% )  (83.31%)
        2017496807      stalled-cycles-frontend   #    7.60% frontend cycles idle     ( +-  0.93% )  (83.32%)
       13403650062      stalled-cycles-backend    #   50.51% backend cycles idle      ( +-  0.33% )  (33.37%)
       19770706799      instructions              #    0.74  insn per cycle
                                                  #    0.68  stalled cycles per insn  ( +-  0.04% )  (50.04%)
        4419821812      branches                  # 667207369.714 M/sec               ( +-  0.03% )  (66.69%)
         121741669      branch-misses             #    2.75% of all branches          ( +-  0.28% )  (83.34%)

            6.6283 +- 0.0358 seconds time elapsed  ( +-  0.54% )
```

patch, with reclustering but without filtering (i.e. outputting all the stable *and* unstable clusters) {F8303586}
```
$ perf stat -r 25 ./bin/llvm-exegesis -mode=analysis -analysis-epsilon=0.5 -benchmarks-file=/home/lebedevri/PileDriver-Sched/benchmarks-inverse_throughput.yaml -analysis-inconsistencies-output-file=/tmp/clusters-new-all.html
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 43970 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-new-all.html'
...
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 43970 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-new-all.html'

 Performance counter stats for './bin/llvm-exegesis -mode=analysis -analysis-epsilon=0.5 -benchmarks-file=/home/lebedevri/PileDriver-Sched/benchmarks-inverse_throughput.yaml -analysis-inconsistencies-output-file=/tmp/clusters-new-all.html' (25 runs):

           6475.29 msec task-clock                #    0.999 CPUs utilized            ( +-  0.31% )
               213      context-switches          #   32.952 M/sec                    ( +- 23.81% )
                 1      cpu-migrations            #    0.130 M/sec                    ( +- 43.84% )
             31287      page-faults               # 4832.057 M/sec                    ( +-  0.08% )
       25939086577      cycles                    # 4006160.279 GHz                   ( +-  0.31% )  (83.31%)
        1958812858      stalled-cycles-frontend   #    7.55% frontend cycles idle     ( +-  0.68% )  (83.32%)
       13218961512      stalled-cycles-backend    #   50.96% backend cycles idle      ( +-  0.29% )  (33.37%)
       19752995402      instructions              #    0.76  insn per cycle
                                                  #    0.67  stalled cycles per insn  ( +-  0.04% )  (50.04%)
        4417079244      branches                  # 682195472.305 M/sec               ( +-  0.03% )  (66.70%)
         121510065      branch-misses             #    2.75% of all branches          ( +-  0.19% )  (83.34%)

            6.4832 +- 0.0229 seconds time elapsed  ( +-  0.35% )
```
Funnily, *this* measurement shows that said reclustering actually improved performance.

patch, with reclustering, only the stable clusters {F8303594}
```
$ perf stat -r 25 ./bin/llvm-exegesis -mode=analysis -analysis-epsilon=0.5 -benchmarks-file=/home/lebedevri/PileDriver-Sched/benchmarks-inverse_throughput.yaml -analysis-inconsistencies-output-file=/tmp/clusters-new-stable.html
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 43970 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-new-stable.html'
...
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 43970 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-new-stable.html'

 Performance counter stats for './bin/llvm-exegesis -mode=analysis -analysis-epsilon=0.5 -benchmarks-file=/home/lebedevri/PileDriver-Sched/benchmarks-inverse_throughput.yaml -analysis-inconsistencies-output-file=/tmp/clusters-new-stable.html' (25 runs):

           6387.71 msec task-clock                #    0.999 CPUs utilized            ( +-  0.13% )
               133      context-switches          #   20.792 M/sec                    ( +- 23.39% )
                 0      cpu-migrations            #    0.063 M/sec                    ( +- 61.24% )
             31318      page-faults               # 4903.256 M/sec                    ( +-  0.08% )
       25591984967      cycles                    # 4006786.266 GHz                   ( +-  0.13% )  (83.31%)
        1881234904      stalled-cycles-frontend   #    7.35% frontend cycles idle     ( +-  0.25% )  (83.33%)
       13209749965      stalled-cycles-backend    #   51.62% backend cycles idle      ( +-  0.16% )  (33.36%)
       19767554347      instructions              #    0.77  insn per cycle
                                                  #    0.67  stalled cycles per insn  ( +-  0.04% )  (50.03%)
        4417480305      branches                  # 691618858.046 M/sec               ( +-  0.03% )  (66.68%)
         118676358      branch-misses             #    2.69% of all branches          ( +-  0.07% )  (83.33%)

            6.3954 +- 0.0118 seconds time elapsed  ( +-  0.18% )
```
Performance improved even further?! Makes sense i guess, less clusters to print.

patch, with reclustering, only the unstable clusters {F8303601}
```
$ perf stat -r 25 ./bin/llvm-exegesis -mode=analysis -analysis-epsilon=0.5 -benchmarks-file=/home/lebedevri/PileDriver-Sched/benchmarks-inverse_throughput.yaml -analysis-inconsistencies-output-file=/tmp/clusters-new-unstable.html -analysis-display-unstable-clusters
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 43970 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-new-unstable.html'
...
no exegesis target for x86_64-unknown-linux-gnu, using default
Parsed 43970 benchmark points
Printing sched class consistency analysis results to file '/tmp/clusters-new-unstable.html'

 Performance counter stats for './bin/llvm-exegesis -mode=analysis -analysis-epsilon=0.5 -benchmarks-file=/home/lebedevri/PileDriver-Sched/benchmarks-inverse_throughput.yaml -analysis-inconsistencies-output-file=/tmp/clusters-new-unstable.html -analysis-display-unstable-clusters' (25 runs):

           6124.96 msec task-clock                #    1.000 CPUs utilized            ( +-  0.20% )
               194      context-switches          #   31.709 M/sec                    ( +- 20.46% )
                 0      cpu-migrations            #    0.039 M/sec                    ( +- 49.77% )
             31413      page-faults               # 5129.261 M/sec                    ( +-  0.06% )
       24536794267      cycles                    # 4006425.858 GHz                   ( +-  0.19% )  (83.31%)
        1676085087      stalled-cycles-frontend   #    6.83% frontend cycles idle     ( +-  0.46% )  (83.32%)
       13035595603      stalled-cycles-backend    #   53.13% backend cycles idle      ( +-  0.16% )  (33.36%)
       18260877653      instructions              #    0.74  insn per cycle
                                                  #    0.71  stalled cycles per insn  ( +-  0.05% )  (50.03%)
        4112411983      branches                  # 671484364.603 M/sec               ( +-  0.03% )  (66.68%)
         114066929      branch-misses             #    2.77% of all branches          ( +-  0.11% )  (83.32%)

            6.1278 +- 0.0121 seconds time elapsed  ( +-  0.20% )
```
This tells us that the actual `-analysis-inconsistencies-output-file=` outputting only takes ~0.4 sec for 43970 benchmark points (3 whole sweeps)
(Also, wow this is fast, it used to take several minutes originally)

Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=40715 | PR40715 ]].

Reviewers: courbet, gchatelet

Reviewed By: courbet

Subscribers: tschuett, jdoerfert, llvm-commits, RKSimon

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58355

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354441 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[RegAllocGreedy] Take last chance recoloring into account in split and assign
Mikael Holmen [Wed, 20 Feb 2019 07:14:39 +0000 (07:14 +0000)]
[RegAllocGreedy] Take last chance recoloring into account in split and assign

Summary:
This is a follow-up to r353988 where tryEvict was extended to take last
chance recoloring into account. Now we do the same thing for trySplit and
tryAssign.

Now we always pass a "FixedRegisters" argument to canEvictInterference and
tryEvict so it doesn't need to have a default value anymore.

The need for this was found long ago in an out-of-tree target.
Unfortunately I don't have a reproducer for an in-tree target.

Reviewers: qcolombet, rudkx

Reviewed By: qcolombet, rudkx

Subscribers: rudkx, MatzeB, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58376

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354439 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC] add/modify wrapper function for findRegisterDefOperand().
Chen Zheng [Wed, 20 Feb 2019 07:01:04 +0000 (07:01 +0000)]
[NFC] add/modify wrapper function for findRegisterDefOperand().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354438 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DTU] Refine the document of mutation APIs [NFC] (PR40528)
Chijun Sima [Wed, 20 Feb 2019 05:49:01 +0000 (05:49 +0000)]
[DTU] Refine the document of mutation APIs [NFC] (PR40528)

Summary:
It was pointed out in [[ https://bugs.llvm.org/show_bug.cgi?id=40528 | Bug 40528 ]] that it is not clear whether insert/deleteEdge can be used to perform multiple updates and [[ https://reviews.llvm.org/D57316#1388344 | a comment in D57316 ]] reveals that the difference between several ways to update the DominatorTree is confusing.

This patch tries to address issues above.

Reviewers: mkazantsev, kuhar, asbirlea, chandlerc, brzycki

Reviewed By: mkazantsev, kuhar, brzycki

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57881

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354437 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove FeatureSlowIncDec from Sandy Bridge and later Intel Core CPUs
Craig Topper [Wed, 20 Feb 2019 05:39:11 +0000 (05:39 +0000)]
[X86] Remove FeatureSlowIncDec from Sandy Bridge and later Intel Core CPUs

Summary:
Inc and Dec were at one point slow on Intel CPUs due to their tendency to cause partial flag stalls on P6 derived CPU cores. This is because these instructions are defined to preserve the carry flag. This partial flag stall issue persisted until Sandy Bridge when flag merging was changed to be handled as a data dependency instead of as a stall until retirement. Sandy Bridge and later CPUs rename the C flag separately from OSPAZ so there is no flag merge needed on INC/DEC to preserve the C flag.

Given these improvements I don't know why INC/DEC was ever considered slow on Sandy Bridge. If anything they should have been disabled on the earlier CPUs instead.

Note after this patch, INC/DEC are still considered slow on Silvermont, Goldmont, Knights Landing and our generic "x86-64" CPU.

Reviewers: spatel, RKSimon, chandlerc

Reviewed By: chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D58412

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354436 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTemporarily Revert "[X86][SLP] Enable SLP vectorization for 128-bit horizontal X86...
Eric Christopher [Wed, 20 Feb 2019 04:42:07 +0000 (04:42 +0000)]
Temporarily Revert "[X86][SLP] Enable SLP vectorization for 128-bit horizontal X86 instructions (add, sub)"

As this has broken the lto bootstrap build for 3 days and is
showing a significant regression on the Dither_benchmark results (from
the LLVM benchmark suite) -- specifically, on the
BENCHMARK_FLOYD_DITHER_128, BENCHMARK_FLOYD_DITHER_256, and
BENCHMARK_FLOYD_DITHER_512; the others are unchanged.  These have
regressed by about 28% on Skylake, 34% on Haswell, and over 40% on
Sandybridge.

This reverts commit r353923.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354434 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Dominators] Simplify and optimize path compression used in link-eval forest.
Fangrui Song [Wed, 20 Feb 2019 04:39:42 +0000 (04:39 +0000)]
[Dominators] Simplify and optimize path compression used in link-eval forest.

Summary:
* NodeToInfo[*] have been allocated so the addresses are stable. We can store them instead of NodePtr to save NumToNode lookups.
* Nodes are traversed twice. Using `Visited` to check the traversal number is expensive and obscure. Just split the two traversals into two loops explicitly.
* The check `VInInfo.DFSNum < LastLinked` is redundant as it is implied by `VInInfo->Parent < LastLinked`
* VLabelInfo PLabelInfo are used to save a NodeToInfo lookup in the second traversal.

Also add some comments explaining eval().

This shows a ~4.5% improvement (9.8444s -> 9.3996s) on

    perf stat -r 10 taskset -c 0 opt -passes=$(printf '%.0srequire<domtree>,invalidate<domtree>,' {1..1000})'require<domtree>' -disable-output sqlite-autoconf-3270100/sqlite3.bc

Reviewers: kuhar, sanjoy, asbirlea

Reviewed By: kuhar

Subscribers: brzycki, NutshellySima, kristina, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354433 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[RISCV] Implement pseudo instructions for load/store from a symbol address.
Kito Cheng [Wed, 20 Feb 2019 03:31:32 +0000 (03:31 +0000)]
[RISCV] Implement pseudo instructions for load/store from a symbol address.

Summary:
Those pseudo-instructions are making load/store instructions able to
load/store from/to a symbol, and its always using PC-relative addressing
to generating a symbol address.

Reviewers: asb, apazos, rogfer01, jrtc27

Differential Revision: https://reviews.llvm.org/D50496

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354430 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Dominators] Delete UpdateLevelsAfterInsertion in edge insertion of depth-based searc...
Fangrui Song [Wed, 20 Feb 2019 02:35:24 +0000 (02:35 +0000)]
[Dominators] Delete UpdateLevelsAfterInsertion in edge insertion of depth-based search for release builds

Summary:
After insertion of (From, To), v is affected iff
depth(NCD)+1 < depth(v) && path P from To to v exists where every w on P s.t. depth(v) <= depth(w)

All affected vertices change their idom to NCD.

If a vertex u has changed its depth, it must be a descendant of an
affected vertex v. Its depth must have been updated by UpdateLevel()
called by setIDom() of the first affected ancestor.

So UpdateLevelsAfterInsertion and its bookkeeping variable VisitedNotAffectedQueue are redundant.
Run them only in debug builds as a sanity check.

Reviewers: kuhar

Reviewed By: kuhar

Subscribers: kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58369

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354429 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] exploit P9 instruction maddld.
Chen Zheng [Wed, 20 Feb 2019 02:30:06 +0000 (02:30 +0000)]
[PowerPC] exploit P9 instruction maddld.
Differential Revision: https://reviews.llvm.org/D58364

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354427 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Generalize section ordering constraints
Thomas Lively [Wed, 20 Feb 2019 02:22:36 +0000 (02:22 +0000)]
[WebAssembly] Generalize section ordering constraints

Summary:
Changes from using a total ordering of known sections to using a
dependency graph approach. This allows our tools to accept and process
binaries that are compliant with the spec and tool conventions that
would have been previously rejected. It also means our own tools can
do less work to enforce an artificially imposed ordering. Using a
general mechanism means fewer special cases and exceptions in the
ordering logic.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58312

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354426 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Refactor atomic operation definitions (NFC)
Heejin Ahn [Wed, 20 Feb 2019 01:29:34 +0000 (01:29 +0000)]
[WebAssembly] Refactor atomic operation definitions (NFC)

Summary:
- Make `ATOMIC_I`, `ATOMIC_NRI`, `AtomicLoad`, `AtomicStore` classes and
  make other operations inherit from them
- Factor the common opcode prefix '0xfe' out from the opcodes into the
  common class
- Reorder instructions in the order of increasing opcodes

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354421 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] regenerate test checks; NFC
Sanjay Patel [Wed, 20 Feb 2019 01:24:59 +0000 (01:24 +0000)]
[InstCombine] regenerate test checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354420 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Fix load/store name detection for atomic instructions
Heejin Ahn [Wed, 20 Feb 2019 01:14:36 +0000 (01:14 +0000)]
[WebAssembly] Fix load/store name detection for atomic instructions

Summary:
Fixed a bug in the routine in AsmParser that determines whether the
current instruction is a load or a store. Atomic instructions' prefixes
are not `atomic_` but `atomic.`, and all atomic instructions are also
memory instructions. Also fixed the printing format of atomic
instructions to match other memory instructions and added encoding tests
for atomic instructions.

Reviewers: aardappel, tlively

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58337

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354419 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCMake: Fix stand-alone clang builds since r353268
Tom Stellard [Wed, 20 Feb 2019 01:11:05 +0000 (01:11 +0000)]
CMake: Fix stand-alone clang builds since r353268

Summary:
Handle the case where LLVM_MAIN_SRC_DIR is not set and also use
LLVM_CMAKE_DIR for locating installed cmake files rather than
LLVM_CMAKE_PATH.

Reviewers: phosek, andrewrk, smeenai

Reviewed By: phosek, andrewrk, smeenai

Subscribers: mgorny, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D58204

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354417 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Fixed disassembler not knowing about OPERAND_EVENT
Wouter van Oortmerssen [Wed, 20 Feb 2019 00:55:59 +0000 (00:55 +0000)]
[WebAssembly] Fixed disassembler not knowing about OPERAND_EVENT

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58414

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354416 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agogn build: Merge r354365 more
Nico Weber [Wed, 20 Feb 2019 00:34:19 +0000 (00:34 +0000)]
gn build: Merge r354365 more

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354413 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GVN] Small tweaks to comments, style, and missed vector handling
Philip Reames [Wed, 20 Feb 2019 00:31:28 +0000 (00:31 +0000)]
[GVN] Small tweaks to comments, style, and missed vector handling

Noticed these while doing a final sweep of the code to make sure I hadn't missed anything in my last couple of patches.  The (minor) missed optimization was noticed because of the stylistic fix to avoid an overly specific cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354412 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agogn build: Merge r354365
Nico Weber [Wed, 20 Feb 2019 00:30:08 +0000 (00:30 +0000)]
gn build: Merge r354365

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354411 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lld-link] preserve @llvm.used symbols in LTO
Bob Haarman [Wed, 20 Feb 2019 00:26:01 +0000 (00:26 +0000)]
[lld-link] preserve @llvm.used symbols in LTO

Summary:
We translate @llvm.used to COFF by generating /include directives
in the .drectve section. However, in LTO links, this happens after
directives have already been processed, so the new directives do
not take effect. This change marks @llvm.used symbols as GCRoots
so that they are preserved as intended.

Fixes PR40733.

Reviewers: rnk, pcc, ruiu

Reviewed By: ruiu

Subscribers: mehdi_amini, steven_wu, dexonsmith, dang, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58255

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354410 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[BPF] make test case reloc-btf.ll tolerable for old compilers
Yonghong Song [Wed, 20 Feb 2019 00:22:19 +0000 (00:22 +0000)]
[BPF] make test case reloc-btf.ll tolerable for old compilers

The test case reloc-btf.ll is generated with an IR containing
spFlags introduced by https://reviews.llvm.org/rL347806.
In the case of BTF backporting, the old compiler may not
have this patch, so this test will fail during
validation.

This patch removed spFlags from IR in the test case
and used the old way for various flags.

Acked-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354409 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[InstSimplify] use any-zero matcher for fcmp folds"
Sanjay Patel [Wed, 20 Feb 2019 00:20:38 +0000 (00:20 +0000)]
Revert "[InstSimplify] use any-zero matcher for fcmp folds"

This reverts commit 058bb8351351d56d2a4e8a772570231f9e5305e5.
Forgot to update another test affected by this change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354408 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GVN] Fix last crasher w/non-integral pointers
Philip Reames [Wed, 20 Feb 2019 00:15:54 +0000 (00:15 +0000)]
[GVN] Fix last crasher w/non-integral pointers

Same case as for memset and memcpy, but this time for clobbering stores and loads.  We still can't allow coercion to or from non-integrals, regardless of the transform.

Now that I'm done the whole little sequence, it seems apparent that we'd entirely missed reasoning about clobbers in the original GVN support for non-integral pointers.

My appologies, I thought we'd upstreamed all of this, but it turns out we were still carrying a downstream hack which hid all of these issues.  My chanks to Cherry Zhang for helping debug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354407 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstSimplify] use any-zero matcher for fcmp folds
Sanjay Patel [Wed, 20 Feb 2019 00:09:50 +0000 (00:09 +0000)]
[InstSimplify] use any-zero matcher for fcmp folds

The m_APFloat matcher does not work with anything but strict
splat vector constants, so we could miss these folds and then
trigger an assertion in instcombine:
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=13201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354406 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstSimplify] add vector tests for fcmp+fabs; NFC
Sanjay Patel [Tue, 19 Feb 2019 23:58:02 +0000 (23:58 +0000)]
[InstSimplify] add vector tests for fcmp+fabs; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354404 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GVN] Fix a crash bug w/non-integral pointers and memtransfers
Philip Reames [Tue, 19 Feb 2019 23:49:38 +0000 (23:49 +0000)]
[GVN] Fix a crash bug w/non-integral pointers and memtransfers

Problem is very similiar to the one fixed for memsets in r354399, we try to coerce a value to non-integral type, and then crash while try to do so.  Since we shouldn't be doing such coercions to start with, easy fix.  From inspection, I see two other cases which look to be similiar and will follow up with most test cases and fixes if confirmed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354403 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GVN] Fix a non-integral pointer bug w/vector types
Philip Reames [Tue, 19 Feb 2019 23:19:51 +0000 (23:19 +0000)]
[GVN] Fix a non-integral pointer bug w/vector types

GVN generally doesn't forward structs or array types, but it *will* forward vector types to non-vectors and vice versa.  As demonstrated in tests, we need to inhibit the same set of transforms for vector of non-integral pointers as for non-integral pointers themselves.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354401 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GVN] Fix a crash bug around non-integral pointers
Philip Reames [Tue, 19 Feb 2019 23:07:15 +0000 (23:07 +0000)]
[GVN] Fix a crash bug around non-integral pointers

If we encountered a location where we tried to forward the value of a memset to a load of a non-integral pointer, we crashed.  Such a forward is not legal in general, but we can forward null pointers.  Test for both cases are included.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354399 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Test] Autogenerate existing tests before adding more
Philip Reames [Tue, 19 Feb 2019 22:57:30 +0000 (22:57 +0000)]
[Test] Autogenerate existing tests before adding more

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354398 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Update MC for bulk memory
Thomas Lively [Tue, 19 Feb 2019 22:56:19 +0000 (22:56 +0000)]
[WebAssembly] Update MC for bulk memory

Summary:
Rename MemoryIndex to InitFlags and implement logic for determining
data segment layout in ObjectYAML and MC. Also adds a "passive" flag
for the .section assembler directive although this cannot be assembled
yet because the assembler does not support data sections.

Reviewers: sbc100, aardappel, aheejin, dschuff

Subscribers: jgravelle-google, hiraditya, sunfish, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354397 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Mark FP32_TO_INT16_IN_MEM/FP32_TO_INT32_IN_MEM/FP32_TO_INT64_IN_MEM as clobberi...
Craig Topper [Tue, 19 Feb 2019 22:37:00 +0000 (22:37 +0000)]
[X86] Mark FP32_TO_INT16_IN_MEM/FP32_TO_INT32_IN_MEM/FP32_TO_INT64_IN_MEM as clobbering EFLAGS to prevent mis-scheduling during conversion from SelectionDAG to MIR.

After r354178, these instruction expand to a sequence that uses an OR instruction. That OR clobbers EFLAGS so we need to state that to avoid accidentally using the clobbered flags.

Our tests show the bug, but I didn't notice because the SETcc instructions didn't move after r354178 since it used to be safe to do the fp->int conversion first.

We should probably convert this whole sequence to SelectionDAG instead of a custom inserter to avoid mistakes like this.

Fixes PR40779

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354395 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LangRef] add to description of alloca instruction
Sanjay Patel [Tue, 19 Feb 2019 22:35:12 +0000 (22:35 +0000)]
[LangRef] add to description of alloca instruction

As mentioned in D58359, we can explicitly state that the
memory allocated is uninitialized and reading that memory
produces undef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354394 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] reduce even more unsigned saturated add with 'not' op
Sanjay Patel [Tue, 19 Feb 2019 22:14:21 +0000 (22:14 +0000)]
[InstCombine] reduce even more unsigned saturated add with 'not' op

We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613

  Name: uaddsat, -1 fval
  %notx = xor i32 %x, -1
  %a = add i32 %x, %y
  %c = icmp ugt i32 %notx, %y
  %r = select i1 %c, i32 %a, i32 -1
  =>
  %a = add i32 %x, %y
  %c2 = icmp ugt i32 %y, %a
  %r = select i1 %c2, i32 -1, i32 %a

  Name: uaddsat, -1 fval + ult
  %notx = xor i32 %x, -1
  %a = add i32 %x, %y
  %c = icmp ult i32 %y, %notx
  %r = select i1 %c, i32 %a, i32 -1
  =>
  %a = add i32 %x, %y
  %c2 = icmp ugt i32 %y, %a
  %r = select i1 %c2, i32 -1, i32 %a

https://rise4fun.com/Alive/nTp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354393 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[libFuzzer] docs: add a FAQ entry about dlclose
Kostya Serebryany [Tue, 19 Feb 2019 22:11:50 +0000 (22:11 +0000)]
[libFuzzer] docs: add a FAQ entry about dlclose

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354392 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agosecond test on git-llvm-push
Renato Golin [Tue, 19 Feb 2019 22:06:27 +0000 (22:06 +0000)]
second test on git-llvm-push

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354390 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix builds with llvm/runtimes/compiler-rt after r354365
Daniel Sanders [Tue, 19 Feb 2019 22:02:38 +0000 (22:02 +0000)]
Fix builds with llvm/runtimes/compiler-rt after r354365

Compiler-rt doesn't include config-ix which was providing CheckSymbolExists to
the LLVM build. Add it to HandleLLVMOptions to fix this

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354389 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ArgumentPromotion] Add a lit.local.cfg to disable X86 specific tests if the X86...
Craig Topper [Tue, 19 Feb 2019 21:58:23 +0000 (21:58 +0000)]
[ArgumentPromotion] Add a lit.local.cfg to disable X86 specific tests if the X86 target doesn't exist.

Hopefully this fixes some buildbot failure after r354376

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354388 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] rearrange saturated add folds; NFC
Sanjay Patel [Tue, 19 Feb 2019 21:46:13 +0000 (21:46 +0000)]
[InstCombine] rearrange saturated add folds; NFC

This is no-functional-change-intended, but that was also
true when it was part of rL354276, and I managed to lose
2 predicates for the fold with constant...causing much bot
distress. So this time I'm adding a couple of negative tests
to avoid that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354384 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTesting git-llvm-push script
Renato Golin [Tue, 19 Feb 2019 21:32:05 +0000 (21:32 +0000)]
Testing git-llvm-push script

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354383 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoPowerPC: Fix typos in comments
Jinsong Ji [Tue, 19 Feb 2019 21:25:13 +0000 (21:25 +0000)]
PowerPC: Fix typos in comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354382 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ConstantFold] Fix misfolding fcmp of a ConstantExpr NaN with itself.
Andrew Scheidecker [Tue, 19 Feb 2019 21:21:54 +0000 (21:21 +0000)]
[ConstantFold] Fix misfolding fcmp of a ConstantExpr NaN with itself.

The code incorrectly inferred that the relationship of a constant expression
to itself is FCMP_OEQ (ordered and equal), when it's actually FCMP_UEQ
(unordered *or* equal). This change corrects that, and adds some more limited
folds that can be done in this case.

Differential revision: https://reviews.llvm.org/D51216

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354381 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ConstantFold] Fix misfolding of icmp with a bitcast FP second operand.
Andrew Scheidecker [Tue, 19 Feb 2019 21:03:20 +0000 (21:03 +0000)]
[ConstantFold] Fix misfolding of icmp with a bitcast FP second operand.

In the process of trying to eliminate the bitcast, this was producing a
malformed icmp with FP operands.

Differential revision: https://reviews.llvm.org/D51215

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354380 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-cov] Add support for gcov --hash-filenames option
Vedant Kumar [Tue, 19 Feb 2019 20:45:00 +0000 (20:45 +0000)]
[llvm-cov] Add support for gcov --hash-filenames option

The patch adds support for --hash-filenames to llvm-cov. This option adds md5
hash of the source path to the name of the generated .gcov file. The option is
crucial for cases where you have multiple files with the same name but can't
use --preserve-paths as resulting filenames exceed the limit.

from gcov(1):

```
-x
--hash-filenames
    By default, gcov uses the full pathname of the source files to to
    create an output filename.  This can lead to long filenames that
    can overflow filesystem limits.  This option creates names of the
    form source-file##md5.gcov, where the source-file component is
    the final filename part and the md5 component is calculated from
    the full mangled name that would have been used otherwise.
```

Patch by Igor Ignatev!

Differential Revision: https://reviews.llvm.org/D58370

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354379 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTesting commit access
Andrew Scheidecker [Tue, 19 Feb 2019 20:38:51 +0000 (20:38 +0000)]
Testing commit access

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354378 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Don't consider functions ABI compatible for ArgumentPromotion pass if they...
Craig Topper [Tue, 19 Feb 2019 20:12:20 +0000 (20:12 +0000)]
[X86] Don't consider functions ABI compatible for ArgumentPromotion pass if they view 512-bit vectors differently.

The use of the -mprefer-vector-width=256 command line option mixed with functions
using vector intrinsics can create situations where one function thinks 512 vectors
are legal, but another fucntion does not.

If a 512 bit vector is passed between them via a pointer, its possible ArgumentPromotion
might try to pass by value instead. This will result in type legalization for the two
functions handling the 512 bit vector differently leading to runtime failures.

Had the 512 bit vector been passed by value from clang codegen, both functions would
have been tagged with a min-legal-vector-width=512 function attribute. That would
make them be legalized the same way.

I observed this issue in 32-bit mode where a union containing a 512 bit vector was
being passed by a function that used intrinsics to one that did not. The caller
ended up passing in zmm0 and the callee tried to read it from ymm0 and ymm1.

The fix implemented here is just to consider it a mismatch if two functions
would handle 512 bit differently without looking at the types that are being
considered. This is the easist and safest fix, but it can be improved in the future.

Differential Revision: https://reviews.llvm.org/D58390

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354376 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "Revert "[llvm-objdump] Allow short options without arguments to be grouped""
Matthew Voss [Tue, 19 Feb 2019 19:46:08 +0000 (19:46 +0000)]
Revert "Revert "[llvm-objdump] Allow short options without arguments to be grouped""

  - Tests that use multiple short switches now test them grouped and ungrouped.

  - Ensure the output of ungrouped and grouped variants is identical

Differential Revision: https://reviews.llvm.org/D57904

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354375 91177308-0d34-0410-b5e6-96231b3b80d8