Hal Finkel [Mon, 23 Mar 2015 08:22:43 +0000 (08:22 +0000)]
[SDAG] Don't widen VSETCC during type legalization for split operands
Because the operands of a vector SETCC node can be of a different type from the
result (and often are), it can happen that even if we'd prefer to widen the
result type of the SETCC, the operands have been split instead. In this case,
the SETCC result also must be split. This mirrors what is done in
WidenVecRes_SELECT, and should be NFC elsewhere because if the operands are not
widened the following calls to GetWidenedVector will assert (which is what was
happening in the test case).
Benjamin Kramer [Sat, 21 Mar 2015 21:09:33 +0000 (21:09 +0000)]
[SimplifyLibCalls] Turn memchr(const, C, const) into a bitfield check.
strchr("123!", C) != nullptr is a common pattern to check if C is one
of 1, 2, 3 or !. If the largest element of the string is smaller than
the target's register size we can easily create a bitfield and just
do a simple test for set membership.
int foo(char C) { return strchr("123!", C) != nullptr; } now becomes
cmpl $64, %edi ## range check
sbbb %al, %al
movabsq $0xE000200000001, %rcx
btq %rdi, %rcx ## bit test
sbbb %cl, %cl
andb %al, %cl ## and the two conditions
andb $1, %cl
movzbl %cl, %eax ## returning an int
ret
(imho the backend should expand this into a series of branches, but
that's a different story)
The code is currently limited to bit fields that fit in a register, so
usually 64 or 32 bits. Sadly, this misses anything using alpha chars
or {}. This could be fixed by just emitting a i128 bit field, but that
can generate really ugly code so we have to find a better way. To some
degree this is also recreating switch lowering logic, but we can't
simply emit a switch instruction and thus change the CFG within
instcombine.
Benjamin Kramer [Sat, 21 Mar 2015 16:42:35 +0000 (16:42 +0000)]
StringRef: Just forward StringRef::find to libc's memchr.
Modern libc's have an SSE version of memchr which is a lot faster than our
hand-rolled version. In the past I was reluctant to use it because Darwin's
memchr used a naive ridiculously slow implementation, but that has been fixed
some versions ago.
Benjamin Kramer [Sat, 21 Mar 2015 15:36:06 +0000 (15:36 +0000)]
ValueTracking: Forward getConstantStringInfo's TrimAtNul param into recursive invocation
Currently this is only used to tweak the backend's memcpy inlining
heuristics, testing that isn't very helpful. A real test case will
follow in the next commit, where this behavior would cause a real
miscompilation.
r216771 introduced a change to MemoryDependenceAnalysis that allowed it
to reason about acquire/release operations. However, this change does
not ensure that the acquire/release operations pair. Unfortunately,
this leads to miscompiles as we won't see an acquire load as properly
memory effecting. This largely reverts r216771.
Eric Christopher [Sat, 21 Mar 2015 04:22:23 +0000 (04:22 +0000)]
Remove the target independent TargetMachine::getSubtarget and
TargetMachine::getSubtargetImpl routines.
This keeps the target independent code free of bare subtarget
calls while the remainder of the backends are migrated, or not
if they don't wish to support per-function subtargets as would
be needed for function multiversioning or LTO of disparate
cpu subarchitecture types, e.g.
Eric Christopher [Sat, 21 Mar 2015 04:04:50 +0000 (04:04 +0000)]
Remove the bare getSubtargetImpl call from the AArch64 port. As part
of this add a test that shows we can generate code for functions
that specifically enable a subtarget feature.
Eric Christopher [Sat, 21 Mar 2015 03:36:02 +0000 (03:36 +0000)]
Remove the bare getSubtargetImpl call from the PPC port. As part
of this add a test that shows we can generate code with
for functions that differ by subtarget feature.
Eric Christopher [Sat, 21 Mar 2015 03:17:25 +0000 (03:17 +0000)]
Grab a subtarget off of an AMDGPUTargetMachine rather than a
bare target machine in preparation for the TargetMachine bare
getSubtarget/getSubtargetImpl calls going away.
Eric Christopher [Sat, 21 Mar 2015 03:13:10 +0000 (03:13 +0000)]
Cache the Function dependent subtarget on the MachineFunction.
As preparation for removing the getSubtargetImpl() call from
TargetMachine go ahead and flip the switch on caching the function
dependent subtarget and remove the bare getSubtargetImpl call
from the X86 port. As part of this add a few tests that show we
can generate code and assemble on X86 based on features/cpu on
the Function.
Eric Christopher [Sat, 21 Mar 2015 03:13:05 +0000 (03:13 +0000)]
Grab a subtarget off of a MipsTargetMachine rather than a
bare target machine in preparation for the TargetMachine bare
getSubtarget/getSubtargetImpl calls going away.
Eric Christopher [Sat, 21 Mar 2015 03:13:01 +0000 (03:13 +0000)]
Change getISAEncoding to use the target triple to determine
thumb-ness similar to the rest of the Module level asm printing
infrastructure as debug info finalization happens after the function
may be missing.
Ahmed Bougacha [Sat, 21 Mar 2015 01:23:15 +0000 (01:23 +0000)]
[CodeGen][IfCvt] Don't re-ifcvt blocks with unanalyzable terminators.
If we couldn't analyze its terminator (i.e., it's an indirectbr, or some
other weirdness), we can't safely re-if-convert a predicated block,
because we can't tell whether the predicated terminator can
fallthrough (it does).
Currently, we would completely ignore the fallthrough successor. In
the added testcase, this means we used to generate:
As part of PR22777, switch from `dyn_cast_or_null<>` to `cast<>` in most
`DIDescriptor` accessors. These classes are lightweight wrappers around
pointers, so the users should check for valid pointers before using
them.
This survives a Darwin clang -g bootstrap (after fixing testcases), but
it's possible the bots will complain about other configurations. I'll
fix any fallout as quickly as I can! Once this bakes for a bit I'll
remove the macros.
Note that `DebugLoc` implicitly gets stricter with this change as well,
since it forward to `DILocation`. Any code that's using `DebugLoc`
accessors should check `DebugLoc::isUnknown()` first. (BTW, I'm also
partway through a cleanup of the `DebugLoc` API to make it more obvious
what it is (a glorified pointer wrapper) and remove cruft from before
the Metadata/Value split. I'll commit soon.)
Rafael Espindola [Fri, 20 Mar 2015 20:00:01 +0000 (20:00 +0000)]
Don't declare all text sections at the start of the .s
The code this patch removes was there to make sure the text sections went
before the dwarf sections. That is necessary because MachO uses offsets
relative to the start of the file, so adding a section can change relaxations.
The dwarf sections were being printed at the start just to produce symbols
pointing at the start of those sections.
The underlying issue was fixed in r231898. The dwarf sections are now printed
when they are about to be used, which is after we printed the text sections.
To make sure we don't regress, the patch makes the MachO streamer assert
if CodeGen puts anything unexpected after the DWARF sections.
Rafael Espindola [Fri, 20 Mar 2015 19:48:54 +0000 (19:48 +0000)]
Reorganize the x86 ELF relocation selection logic.
The main differences are:
* Split in 32 and 64 bit functions.
* First switch on the Modifier so that we have only one non fully covered
switch.
* Map the fixup kind first to a x86_64 (or i386) specific enum, to make
it easy to handle cases like X86::reloc_riprel_4byte_movq_load.
* Switch on IsPCRel last, which reduces code duplication.
Verifier: Check that !dbg attachments have the right type
A WIP patch makes `DIDescriptor` accessors more strict, which in turn
causes the `DebugInfoFinder` to crash on wrongly typed `!dbg`
attachments. Catch that error up front in
`Verifier::visitInstruction()`.
Also remove a test that we "handle" invalid `!dbg` attachments, added
back in r99938. We don't want to handle those anymore.
Note: I'm *not* recursing and verifying the debug info graph reachable
from this node; that work is already done by `verifyDebugInfo()`.
This test is supposed to be testing whether metadata attachments to
instructions work, but it was using invalid debug info to do so. (This
was causing assertion failures in the `DebugInfoFinder` with a WIP patch
to be more strict about `DIDescriptor` accessors.)
Rather than fix the debug info -- which is better tested elsewhere --
just test the IR feature directly.
Wei Mi [Fri, 20 Mar 2015 18:33:12 +0000 (18:33 +0000)]
Correctly estimate SROA savings for store operands in inline cost analysis.
When estimating SROA savings, we want to see if an address is derived
off an alloca in the caller. For store instructions, operand 1 is the
address operand, but the current code uses operand 0. Use
getPointerOperand for loads and stores to fix this.
Patch by Easwaran Raman.
http://reviews.llvm.org/D8425
John Brawn [Fri, 20 Mar 2015 17:20:07 +0000 (17:20 +0000)]
[ARM] Fix handling of thumb1 out-of-range frame offsets
LocalStackSlotPass assumes that isFrameOffsetLegal doesn't change its
answer when the base register changes. Unfortunately this isn't true
in thumb1, where SP-based loads allow a larger offset than
non-SP-based loads, and this causes the base register reuse code to
generate instructions that are unencodable, causing an assertion
failure.
Solve this by adding a BaseReg parameter to isFrameOffsetLegal, which
ARMBaseRegisterInfo can then make use of to give the correct answer.
Eric Christopher [Fri, 20 Mar 2015 16:03:42 +0000 (16:03 +0000)]
Rewrite StackMap location handling to pre-compute the dwarf register
numbers before emission.
This removes a dependency on being able to access TRI at the module
level and is similar to the DwarfExpression handling. I've modified
the debug support into print/dump routines that'll do the same dumping
but is now callable anywhere and if TRI isn't available will go ahead
and just print out raw register numbers.
Eric Christopher [Fri, 20 Mar 2015 16:03:39 +0000 (16:03 +0000)]
At the beginning of doFinalization set the MachineFunction to
nullptr so that users get an earlier dereferencing error and
so that we can use it to conditionalize access to MachineFunction
specific data.
Daniel Jasper [Fri, 20 Mar 2015 10:00:37 +0000 (10:00 +0000)]
[MBP] Don't outline short optional branches
With the option -outline-optional-branches, LLVM will place optional
branches out of line (more details on r231230).
With this patch, this is not done for short optional branches. A short
optional branch is a branch containing a single block with an
instruction count below a certain threshold (defaulting to 3). Still
everything is guarded under -outline-optional-branches).
Outlining a short branch can't significantly improve code locality. It
can however decrease performance because of the additional jmp and in
cases where the optional branch is hot. This fixes a compile time
regression I have observed in a benchmark.
Nick Lewycky [Fri, 20 Mar 2015 02:25:00 +0000 (02:25 +0000)]
When simplifying a SCEV truncate by distributing, consider it a simplification to replace a cast, even if we end up with a trunc around the term. Fixes PR22960!
Don't use `DebugLoc` accessors if we're pointing at null, which will be
a problem after a WIP patch to make the `DIDescriptor` accessors more
strict. Caught by Frontend/profile-sample-use-loc-tracking.c (in
clang).
Verifier: Remove the separate DebugInfoVerifier class
Remove the separate `DebugInfoVerifier` class, as a partial step toward
better integrating debug info verification with the `Verifier`.
Right now, verification of debug info is kind of a mess.
- There are `DIDescriptor::Verify()` checks live in `DebugInfo.cpp`.
These return `bool`, and there's no way to see (except by opening a
debugger) why they fail.
- We rely on `DebugInfoFinder` to traverse the debug info graph and
dig up nodes. However, the regular `Verifier` visits many of these
nodes when it calls into debug info intrinsic operands. Visiting
twice and running different checks is kind of absurd.
- Moreover, `DebugInfoFinder` asserts on failed type resolution -- the
verifier should never assert!
By integrating the two verifiers, I'm aiming at solving these problems
(work to be done, obviously). Verification can be localized to the
`Verifier`; we can use a naive `MDNode` operand traversal to find all
the nodes; we can verify type references instead of asserting on
failure.
There are `assert()`s sprinkled throughout the optimizer and dwarf
backend on `DIDescriptor::Verify()` checks. This is a hangover from
when the debug info verifier was off, so I plan to remove them as I go
(once I confirm that the checks are done at verification time).
Note: to keep the behaviour of only running the debug info verifier when
-verify succeeds, I've added an `EverBroken` flag. Once the
`DebugInfoFinder` assertions are gone and the two traversals have been
merged, I expect to be able to remove this.
This works in a similar way to the gold plugin tests. We search for a compatible
linker on $PATH and use it to run tests against our just-built libLTO. To start
with, test the just added opt level functionality.
Eric Christopher [Thu, 19 Mar 2015 23:27:42 +0000 (23:27 +0000)]
Use the cached subtarget on the MachineFunction when the AsmPrinter
will have a MachineFunction, i.e. in places other than the module
level doInitialize/doFinalize.
Owen Anderson [Thu, 19 Mar 2015 22:48:57 +0000 (22:48 +0000)]
Fix a nasty bug in DAGCombine of STORE nodes.
This is very related to the bug fixed in r174431. The problem is that
SelectionDAG does not include alignment in the uniquing of loads and
stores. When an otherwise no-op DAGCombine would increase the alignment
of a load or store, the original node would be returned (with the
alignment increased), which would cause the node not to be processed by
any further DAGCombines.
I don't have a direct testcase for this that manifests on an in-tree
target, but I did see some noise in the tests for other targets and have
updated them for it.
Eric Christopher [Thu, 19 Mar 2015 22:36:37 +0000 (22:36 +0000)]
Add an MCSubtargetInfo variable to the TargetMachine.
This enables us to remove calls to the subtarget from the TargetMachine
and with a small hack for backends that require global subtarget
information for module level code generation, e.g. mips abi flags, as
mentioned in a fixme in the code.
Sanjay Patel [Thu, 19 Mar 2015 22:29:40 +0000 (22:29 +0000)]
[X86, AVX] use blends instead of insert128 with index 0
Another case of x86-specific shuffle strength reduction:
avoid generating insert*128 instructions with index 0 because
they are slower than their non-lane-changing blend equivalents.
Shuffle lowering already catches most of these cases, but
the zero vector case and some other paths such as in the
modified test in vector-shuffle-256-v32.ll were getting
through.
Remove `DebugInfoVerifierLegacyPass` and the `-verify-di` pass.
Instead, call into the `DebugInfoVerifier` from inside
`VerifierLegacyPass::finalizeModule()`. This better matches the logic
in `verifyModule()` (used by the new PassManager), avoids requiring two
separate passes to verify the IR, and makes the API for "add a pass to
verify the IR" simple.
Note: the `-verify-debug-info` flag still works (for now, at least;
eventually it might make sense to just remove it).
Each use of the byte array uses a different alias. This makes the
backend less likely to reuse previously computed byte array addresses,
improving the security of the CFI mechanism based on this pass.
libLTO, llvm-lto, gold: Introduce flag for controlling optimization level.
This change also introduces a link-time optimization level of 1. This
optimization level runs only the globaldce pass as well as cleanup passes for
passes that run at -O0, specifically simplifycfg which cleans up lowerbitsets.
PassManagerBuilder: Remove effectively dead 'StripDebug' option
`StripDebug` was only used by tools/opt/opt.cpp in
`AddStandardLinkPasses()`, but opt.cpp adds the same pass based on its
command-line flag before it calls `AddStandardLinkPasses()`. Stripping
debug info twice isn't very useful.
GlobalDCE: Improve performance for large modules containing comdats.
When we encounter a global with a comdat, rather than iterating over
every global in the module to find globals in the same comdat, store the
members in a multimap. This effectively lowers the complexity to O(N log N),
improving performance significantly for large modules such as might be
encountered during LTO.
It looks like we used to do something like this until r219191.
Artem Belevich [Thu, 19 Mar 2015 17:05:35 +0000 (17:05 +0000)]
Add support for __nvvm_reflect changes in libdevice in CUDA-7.0
Summary:
CUDA 7.0's libdevice uses slightly different IR to call __nvvm_reflect
and that triggers an assertion in nvvm_reflect optimization pass. This
change allows nvvm_reflect pass to deal with both old and new ways to
pass an argument to __nvvm_reflect.
Chris Bieneman [Thu, 19 Mar 2015 16:49:44 +0000 (16:49 +0000)]
Fixing dependencies for native tablegen.
The dependencies for cross-built tablegen were a bit confused. This fixes that. The following dependencies are now enforced:
(1) Tablegen tasks depend on the native tablegen
(2) Native tablegen depends on the cross-compiled tablegen
Although the native tablegen doesn't actually require the cross tablegen, having this dependency forces the native tablegen to rebuild whenever the cross tablegen changes.
Greg Bedwell [Thu, 19 Mar 2015 16:32:47 +0000 (16:32 +0000)]
[CMake] Don't pass in MSVC warning flags as definitions.
NFC currently but required as a prerequisite for using
the Microsoft resource compiler in conjunction with
CMake's ninja generator, which knows how to filter flags
appropriately, but not definitions.
projects / llvm / log