]> granicus.if.org Git - llvm/log
llvm
5 years ago[TargetLowering][X86] Teach SimplifyDemandedVectorElts to replace the base vector...
Craig Topper [Sun, 4 Aug 2019 17:30:41 +0000 (17:30 +0000)]
[TargetLowering][X86] Teach SimplifyDemandedVectorElts to replace the base vector of INSERT_SUBVECTOR with undef if none of the elements are demanded even if the node has other users.

Summary:
The SimplifyDemandedVectorElts function can replace with undef
when no elements are demanded, but due to how it interacts with
TargetLoweringOpts, it can only do this when the node has
no other users.

Remove a now unneeded DAG combine from the X86 backend.

Reviewers: RKSimon, spatel

Reviewed By: RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65713

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367788 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRegenerate test for an upcoming patch.
Simon Pilgrim [Sun, 4 Aug 2019 16:37:29 +0000 (16:37 +0000)]
Regenerate test for an upcoming patch.

I managed to use the update_llc_test_checks script for this, but had to set -asm-verbose=true and then manually tweak the result (PR42882)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367787 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[UpdateTestChecks] Add end_function directive to regex matcher for wasm32 function...
Simon Pilgrim [Sun, 4 Aug 2019 16:28:37 +0000 (16:28 +0000)]
[UpdateTestChecks] Add end_function directive to regex matcher for wasm32 function body

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367786 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] lowerShuffleAsSpecificZeroOrAnyExtend - use undef PSHUFB mask indices for ANY_E...
Simon Pilgrim [Sun, 4 Aug 2019 13:15:23 +0000 (13:15 +0000)]
[X86] lowerShuffleAsSpecificZeroOrAnyExtend - use undef PSHUFB mask indices for ANY_EXTEND shuffles

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367784 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix signed/unsigned comparison warning. NFC.
Simon Pilgrim [Sun, 4 Aug 2019 12:48:19 +0000 (12:48 +0000)]
Fix signed/unsigned comparison warning. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367783 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] SimplifyMultipleUseDemandedBits - Add target shuffle support
Simon Pilgrim [Sun, 4 Aug 2019 12:24:40 +0000 (12:24 +0000)]
[X86] SimplifyMultipleUseDemandedBits - Add target shuffle support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367782 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ORC] Remove a layer of indirection when locking the mutex. NFCI.
Benjamin Kramer [Sun, 4 Aug 2019 11:08:32 +0000 (11:08 +0000)]
[ORC] Remove a layer of indirection when locking the mutex. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367781 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] MVE big endian bitcasts
David Green [Sun, 4 Aug 2019 10:18:15 +0000 (10:18 +0000)]
[ARM] MVE big endian bitcasts

This adds big endian MVE patterns for bitcasts. They are defined in llvm as
being the same as a store of the existing type and the load into the new. This
means that they have to become a VREV between the two types, working in the
same way that NEON works in big-endian. This also adds some example tests for
bigendian, showing where code is and isn't different.

The main difference, especially from a testing perspective is that vectors are
passed as v2f64, and so are VREV into and out of call arguments, and the
parameters are passed in a v2f64 format. Same happens for inline assembly where
the register class is used, so it is VREV to a v16i8.

So some of this is probably not correct yet, but it is (mostly) self-consistent
and seems to be consistent with how llvm treats vectors. The rest we can
hopefully fix later. More details about big endian neon can be found in
https://llvm.org/docs/BigEndianNEON.html.

Differential Revision: https://reviews.llvm.org/D65581

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367780 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objdump] Re-commit r367284.
Michael Pozulp [Sun, 4 Aug 2019 06:04:00 +0000 (06:04 +0000)]
[llvm-objdump] Re-commit r367284.

Add warning messages if disassembly + source for problematic inputs

Summary: Addresses https://bugs.llvm.org/show_bug.cgi?id=41905

Reviewers: jhenderson, rupprecht, grimar

Reviewed By: jhenderson, grimar

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62462

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367776 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Consistently use MVT::i8 for the constant operand of BLENDI and INSERTPS nodes.
Craig Topper [Sun, 4 Aug 2019 06:01:31 +0000 (06:01 +0000)]
[X86] Consistently use MVT::i8 for the constant operand of BLENDI and INSERTPS nodes.

This is the type listed in the type constraint for isel. But since
we list a type there, it doesn't get checked during isel matching.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367775 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] Add node creation debug message to getMemIntrinsicNode.
Craig Topper [Sun, 4 Aug 2019 02:32:06 +0000 (02:32 +0000)]
[SelectionDAG] Add node creation debug message to getMemIntrinsicNode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367771 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Transforms] Do not drop !preserve.access.index metadata
Yonghong Song [Sat, 3 Aug 2019 23:41:26 +0000 (23:41 +0000)]
[Transforms] Do not drop !preserve.access.index metadata

Currently, when a GVN or CSE optimization happens,
the llvm.preserve.access.index metadata is dropped.
This caused a problem for BPF AbstructMemberOffset phase
as it relies on the metadata (debuginfo types).

This patch added proper hooks in lib/Transforms to
preserve !preserve.access.index metadata. A test
case is added to ensure metadata is preserved under CSE.

Differential Revision: https://reviews.llvm.org/D65700

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367769 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] Prevent the combine added in r367710 from creating illegal types after...
Craig Topper [Sat, 3 Aug 2019 23:09:13 +0000 (23:09 +0000)]
[DAGCombiner] Prevent the combine added in r367710 from creating illegal types after type legalization.

This is further fix for PR42880.

Sanjay already disabled the X86 TLI hook for non-simple types,
but we should really call isTypeLegal here if we're after type
legalization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367768 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[JITLink] Fix an overly-wide read in the MachO/x86-64 test case.
Lang Hames [Sat, 3 Aug 2019 22:38:31 +0000 (22:38 +0000)]
[JITLink] Fix an overly-wide read in the MachO/x86-64 test case.

This should fix the build failures on some of the 32-bit bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367767 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[x86] change free truncate hook to handle only simple types (PR42880)
Sanjay Patel [Sat, 3 Aug 2019 21:46:27 +0000 (21:46 +0000)]
[x86] change free truncate hook to handle only simple types (PR42880)

This avoids the crash from:
https://bugs.llvm.org/show_bug.cgi?id=42880
...and I think it's a proper constraint for the TLI hook.

But that example raises questions about what happens to get us
into this situation (created i29 types) and what happens later
(why does legalization die on those types), so I'm not sure if
we will resolve the bug based on this change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367766 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Fix allocsize attribute in sjlj lowering
Keno Fischer [Sat, 3 Aug 2019 21:38:19 +0000 (21:38 +0000)]
[WebAssembly] Fix allocsize attribute in sjlj lowering

Summary:
The allocsize attribute refers to call parameters by index.
Thus, when we add the extra parameter in sjlj lowering, we
need to increment the referenced paramater in the allocsize
attribute to avoid angering the Verifier.

Reviewed By: aheejin
Differential Revision: https://reviews.llvm.org/D65470

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367765 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[JITLink] Add support for MachO/x86-64 UNSIGNED relocs with length=2.
Lang Hames [Sat, 3 Aug 2019 20:17:10 +0000 (20:17 +0000)]
[JITLink] Add support for MachO/x86-64 UNSIGNED relocs with length=2.

MachO/x86-64 UNSIGNED relocs are almost always 64-bit (length=3), but UNSIGNED
relocs of length=2 are allowed if the target resides in the low 32-bits. This
patch adds support for such relocations in JITLink (previously they would have
triggered an unsupported relocation error).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367764 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[JITLink] Fix error message formatting.
Lang Hames [Sat, 3 Aug 2019 20:17:08 +0000 (20:17 +0000)]
[JITLink] Fix error message formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367763 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFixup r367321 "Ask confirmation when `git llvm push` will push multiple commits"
Mehdi Amini [Sat, 3 Aug 2019 18:53:52 +0000 (18:53 +0000)]
Fixup r367321 "Ask confirmation when `git llvm push` will push multiple commits"

I unfortunately commited an obsolete revision in r367321 that didn't
have all the changes the reviewers suggested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367761 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[yaml2obj][tests] Replace 8-byte `od` conversion with 1-byte conversion
Hubert Tong [Sat, 3 Aug 2019 18:52:45 +0000 (18:52 +0000)]
[yaml2obj][tests] Replace 8-byte `od` conversion with 1-byte conversion

Summary:
`od` on AIX does not seem to implement 8-byte integer conversions. Work
around this by using 1-byte conversions, which can be used in this case
since the value is byte-order insensitive.

Reviewers: grimar, daltenty, xingxue, jasonliu, MaskRay

Reviewed By: grimar, MaskRay

Subscribers: MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65671

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367760 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoIR: Cleanup after test to silence ASAN builds
Tim Northover [Sat, 3 Aug 2019 15:40:00 +0000 (15:40 +0000)]
IR: Cleanup after test to silence ASAN builds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367758 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Attributor][NFC] run clang-format on Attributor.cpp
Stefan Stipanovic [Sat, 3 Aug 2019 15:27:41 +0000 (15:27 +0000)]
[Attributor][NFC] run clang-format on Attributor.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367757 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoSpeculative Compilation
Praveen Velliengiri [Sat, 3 Aug 2019 14:42:13 +0000 (14:42 +0000)]
Speculative Compilation

[ORC] Remove Speculator Variants for Different Program Representations

[ORC] Block Freq Analysis

Speculative Compilation with Naive Block Frequency

Add Applications to OrcSpeculation

ORC v2 with Block Freq Query & Example

Deleted BenchMark Programs

Signed-off-by: preejackie <praveenvelliengiri@gmail.com>
ORCv2 comments resolved

[ORCV2] NFC

ORCv2 NFC

[ORCv2] Speculative compilation - CFGWalkQuery

ORCv2 Adapting IRSpeculationLayer to new locking scheme

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367756 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoIR: print value numbers for unnamed function arguments
Tim Northover [Sat, 3 Aug 2019 14:28:34 +0000 (14:28 +0000)]
IR: print value numbers for unnamed function arguments

For consistency with normal instructions and clarity when reading IR,
it's best to print the %0, %1, ... names of function arguments in
definitions.

Also modifies the parser to accept IR in that form for obvious reasons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367755 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFinish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register...
Sylvestre Ledru [Sat, 3 Aug 2019 13:51:58 +0000 (13:51 +0000)]
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367754 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Thumb] Fix invalid symbol redefinition due to duplicated jumptable (PR42760)
Nikita Popov [Sat, 3 Aug 2019 06:47:23 +0000 (06:47 +0000)]
[Thumb] Fix invalid symbol redefinition due to duplicated jumptable (PR42760)

Fix for https://bugs.llvm.org/show_bug.cgi?id=42760. A tBR_JTr
instruction is duplicated by tail duplication, which results in
the same jumptable with the same label being emitted twice.

Fix this by marking tBR_JTr as not duplicable. The corresponding
ARM/Thumb instructions are already marked as not duplicable.
Additionally also mark tTBB_JT and tTBH_JT to be consistent with
Thumb2, even though this shouldn't be strictly necessary.

Differential Revision: https://reviews.llvm.org/D65606

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367753 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[lit] Print internal env commands
Joel E. Denny [Sat, 3 Aug 2019 06:08:19 +0000 (06:08 +0000)]
[lit] Print internal env commands

Without this patch, the internal `env` command removes `env` and its
args from the command line while parsing it.  This patch modifies a
copy instead so that the original command line is printed.

Reviewed By: stella.stamenova, rnk

Differential Revision: https://reviews.llvm.org/D65624

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367752 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[lit] Actually run tests for internal env command
Joel E. Denny [Sat, 3 Aug 2019 06:08:04 +0000 (06:08 +0000)]
[lit] Actually run tests for internal env command

Put the main test script in the right directory, and fix a python bug
in a local script.

Reviewed By: stella.stamenova

Differential Revision: https://reviews.llvm.org/D65623

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367751 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoEmit diagnostic if an inline asm constraint requires an immediate
Bill Wendling [Sat, 3 Aug 2019 05:52:47 +0000 (05:52 +0000)]
Emit diagnostic if an inline asm constraint requires an immediate

Summary:
An inline asm call can result in an immediate after inlining. Therefore emit a
diagnostic here if constraint requires an immediate but one isn't supplied.

Reviewers: joerg, mgorny, efriedma, rsmith

Reviewed By: joerg

Subscribers: asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, s.egerton, MaskRay, jyknight, dylanmckay, javed.absar, fedor.sergeev, jrtc27, Jim, krytarowski, eraman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60942

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367750 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Attributor] Fix dereferenceable callsite argument initialization
Hideto Ueno [Sat, 3 Aug 2019 04:10:50 +0000 (04:10 +0000)]
[Attributor] Fix dereferenceable callsite argument initialization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367748 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] Add test case to show bad sign bit handling for integer abs idiom...
Craig Topper [Sat, 3 Aug 2019 02:54:54 +0000 (02:54 +0000)]
[InstSimplify] Add test case to show bad sign bit handling for integer abs idiom in computeKnownBits.

computeKnownBits will indicate the sign bit of abs is 0 if the
the RHS operand returned by matchSelectPattern has the nsw flag set.
For abs idioms like (X >= 0) ? X : -X, the RHS returns -X. But
we can also match ((X-Y) >= 0 ? X-Y : Y-X as abs. In this case
RHS will be the Y-X operand. According to Alive, the sign bit for
this is only 0 if both the X-Y and Y-X operands have the nsw flag.
But we're only checking the Y-X operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367747 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMCRegister/Register: DenseMapInfo should take `const T &`
Daniel Sanders [Sat, 3 Aug 2019 02:19:23 +0000 (02:19 +0000)]
MCRegister/Register: DenseMapInfo should take `const T &`

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367744 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ORC] Remove some old debugging output from a unit test.
Lang Hames [Sat, 3 Aug 2019 01:33:04 +0000 (01:33 +0000)]
[ORC] Remove some old debugging output from a unit test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367742 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTemporarily Revert "[PowerPC][NFC][MachinePipeliner] Add some regression testcases"
Eric Christopher [Sat, 3 Aug 2019 01:12:55 +0000 (01:12 +0000)]
Temporarily Revert "[PowerPC][NFC][MachinePipeliner] Add some regression testcases"

It's breaking a number of bots, e.g.:

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap-msan/builds/13893/steps/check-llvm%20msan/logs/stdio

This reverts commit r367732.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367741 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd brackets to remove warnings about ambiguous 'else's.
Bill Wendling [Sat, 3 Aug 2019 00:26:10 +0000 (00:26 +0000)]
Add brackets to remove warnings about ambiguous 'else's.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367740 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRe-commit "[GlobalISel] Add legalization support for non-power-2 loads and stores""
Amara Emerson [Fri, 2 Aug 2019 23:44:24 +0000 (23:44 +0000)]
Re-commit "[GlobalISel] Add legalization support for non-power-2 loads and stores""

This is an old commit that exposed a bug in the GISel importer, which caused
non-truncating stores to be selected for truncating store patterns. Now that's
been fixed in r367737 this can go back in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367739 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ScalarizeMaskedMemIntrin] Bitcast the mask to the scalar domain and use scalar bit...
Craig Topper [Fri, 2 Aug 2019 23:43:53 +0000 (23:43 +0000)]
[ScalarizeMaskedMemIntrin] Bitcast the mask to the scalar domain and use scalar bit tests for the branches for expandload/compressstore.

Same as what was done for gather/scatter/load/store in r367489.
Expandload/compressstore were delayed due to lack of constant
masking handling that has since been fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367738 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GlobalISel] Check LLT size matches memory size for non-truncating stores.
Amara Emerson [Fri, 2 Aug 2019 23:33:13 +0000 (23:33 +0000)]
[GlobalISel] Check LLT size matches memory size for non-truncating stores.

This was causing a bug where non-truncating stores would be selected instead of truncating ones.

Differential Revision: https://reviews.llvm.org/D64845

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367737 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Use the pointer VT for the Scale node when lowering x86 gather/scatter intrinsics.
Craig Topper [Fri, 2 Aug 2019 23:18:16 +0000 (23:18 +0000)]
[X86] Use the pointer VT for the Scale node when lowering x86 gather/scatter intrinsics.

This is consistent with the target independent intrinsic handling.

Not sure this really matters since we just pull the constant out
using getZExtValue later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367736 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[BPF] Handling type conversions correctly for CO-RE
Yonghong Song [Fri, 2 Aug 2019 23:16:44 +0000 (23:16 +0000)]
[BPF] Handling type conversions correctly for CO-RE

With newly added debuginfo type
metadata for preserve_array_access_index() intrinsic,
this patch did the following two things:
 (1). checking validity before adding a new access index
      to the access chain.
 (2). calculating access byte offset in IR phase
      BPFAbstractMemberAccess instead of when BTF is emitted.

For (1), the metadata provided by all preserve_*_access_index()
intrinsics are used to check whether the to-be-added type
is a proper struct/union member or array element.

For (2), with all available metadata, calculating access byte
offset becomes easier in BPFAbstractMemberAccess IR phase.
This enables us to remove the unnecessary complexity in
BTFDebug.cpp.

New tests are added for
  . user explicit casting to array/structure/union
  . global variable (or its dereference) as the source of base
  . multi demensional arrays
  . array access given a base pointer
  . cases where we won't generate relocation if we cannot find
    type name.

Differential Revision: https://reviews.llvm.org/D65618

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367735 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRemove support for unsupported MSVC versions
JF Bastien [Fri, 2 Aug 2019 23:09:01 +0000 (23:09 +0000)]
Remove support for unsupported MSVC versions

Re-land r367727 with the #if fixed.

Reviewers: rnk, lebedev.ri

Subscribers: hiraditya, jkorous, dexonsmith, lebedev.ri, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65662

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367734 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC][NFC][MachinePipeliner] Add some regression testcases
Jinsong Ji [Fri, 2 Aug 2019 22:27:44 +0000 (22:27 +0000)]
[PowerPC][NFC][MachinePipeliner] Add some regression testcases

Exposed by refactoring in https://reviews.llvm.org/D64665.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367732 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert Fix and test inter-procedural register allocation for ARM
Douglas Yung [Fri, 2 Aug 2019 22:11:49 +0000 (22:11 +0000)]
Revert Fix and test inter-procedural register allocation for ARM

This reverts r367669 (git commit f6b00c279a5587a25876752a6ecd8da0bed959dc)

This was breaking a build bot http://lab.llvm.org:8011/builders/netbsd-amd64/builds/21233

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367731 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[lit] Fix 42812: lit test suite can no longer be run stand-alone
Stella Stamenova [Fri, 2 Aug 2019 22:03:12 +0000 (22:03 +0000)]
[lit] Fix 42812: lit test suite can no longer be run stand-alone

Summary:
This change updates the lit.cfg file to use llvm_config when it is available, but when it is not, it directly modifies the config object. This makes it possible to run the lit tests standalone without having built llvm (as long as the correct binaries are present in the path such as FileCheck and not).

Because the lit tests don't take a hard dependency on llvm_config, some features such as system-windows have to have definitions in lit's cfg file as well. This is a potential issue as the os features sometimes change names (for example, we went from windows to system-windows, etc.). This can cause drift between lit's tests and the rest of the llvm tests.

Reviewers: probinson, mgorny

Reviewed By: mgorny

Subscribers: delcypher, llvm-commits, asmith

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65674

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367730 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "Remove support for unsupported MSVC versions"
JF Bastien [Fri, 2 Aug 2019 22:02:25 +0000 (22:02 +0000)]
Revert "Remove support for unsupported MSVC versions"

Mismatched preprocessor, I'll fix in a follow-up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367728 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRemove support for unsupported MSVC versions
JF Bastien [Fri, 2 Aug 2019 21:52:35 +0000 (21:52 +0000)]
Remove support for unsupported MSVC versions

Reviewers: rnk, lebedev.ri

Subscribers: hiraditya, jkorous, dexonsmith, lebedev.ri, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65662

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367727 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Attributor] Using liveness in other attributes.
Stefan Stipanovic [Fri, 2 Aug 2019 21:31:22 +0000 (21:31 +0000)]
[Attributor] Using liveness in other attributes.

Modifying other AbstractAttributes to use Liveness AA and skip dead instructions.

Reviewers: jdoerfert, uenoku

Subscribers: hiraditya, llvm-commits

Differential revision: https://reviews.llvm.org/D65243

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367725 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[BPF] annotate DIType metadata for builtin preseve_array_access_index()
Yonghong Song [Fri, 2 Aug 2019 21:28:28 +0000 (21:28 +0000)]
[BPF] annotate DIType metadata for builtin preseve_array_access_index()

Previously, debuginfo types are annotated to
IR builtin preserve_struct_access_index() and
preserve_union_access_index(), but not
preserve_array_access_index(). The debug info
is useful to identify the root type name which
later will be used for type comparison.

For user access without explicit type conversions,
the previous scheme works as we can ignore intermediate
compiler generated type conversions (e.g., from union types to
union members) and still generate correct access index string.

The issue comes with user explicit type conversions, e.g.,
converting an array to a structure like below:
  struct t { int a; char b[40]; };
  struct p { int c; int d; };
  struct t *var = ...;
  ... __builtin_preserve_access_index(&(((struct p *)&(var->b[0]))->d)) ...
Although BPF backend can derive the type of &(var->b[0]),
explicit type annotation make checking more consistent
and less error prone.

Another benefit is for multiple dimension array handling.
For example,
  struct p { int c; int d; } g[8][9][10];
  ... __builtin_preserve_access_index(&g[2][3][4].d) ...
It would be possible to calculate the number of "struct p"'s
before accessing its member "d" if array debug info is
available as it contains each dimension range.

This patch enables to annotate IR builtin preserve_array_access_index()
with proper debuginfo type. The unit test case and language reference
is updated as well.

Signed-off-by: Yonghong Song <yhs@fb.com>
Differential Revision: https://reviews.llvm.org/D65664

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367724 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][GlobalISel] Eliminate redundant G_ZEXT when the source is implicitly zext...
Amara Emerson [Fri, 2 Aug 2019 21:15:36 +0000 (21:15 +0000)]
[AArch64][GlobalISel] Eliminate redundant G_ZEXT when the source is implicitly zext-loaded.

These cases can come up when the extending loads combiner doesn't combine a
zext(load) to a zextload op, due to some other operation being in between, which
then gets simplified at a later stage.

Differential Revision: https://reviews.llvm.org/D65360

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367723 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[TargetLowering] SimplifyMultipleUseDemandedBits - don't assume INSERT_VECTOR_ELT...
Simon Pilgrim [Fri, 2 Aug 2019 21:07:07 +0000 (21:07 +0000)]
[TargetLowering] SimplifyMultipleUseDemandedBits - don't assume INSERT_VECTOR_ELT value type is simple.

Noticed by inspection - this was copied from the X86 target equivalent where we can assume its legal/simple.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367721 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoUse MCRegister in MCRegisterInfo's interfaces
Daniel Sanders [Fri, 2 Aug 2019 20:23:00 +0000 (20:23 +0000)]
Use MCRegister in MCRegisterInfo's interfaces

Summary:
As part of this, define DenseMapInfo for MCRegister (and Register while I'm at it)

Depends on D65599

Reviewers: arsenm

Subscribers: MatzeB, qcolombet, jvesely, wdng, nhaehnle, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65605

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367719 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Statepoints] Fix overalignment of loads in no-realign-stack functions
Philip Reames [Fri, 2 Aug 2019 20:17:37 +0000 (20:17 +0000)]
[Statepoints] Fix overalignment of loads in no-realign-stack functions

This really should have been part of 366765.  For some reason, I forgot to handle the corresponding load side, and the readable test cases (using deopt vs statepoints) turned out to be overly reduced.  Oops.

As seen in the test change, the problem was that we were using a load with alignment expectations rather than the unaligned variant when the stack alignment was less than that prefered type alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367718 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agohwasan: Remove unused field CurModuleUniqueId. NFCI.
Peter Collingbourne [Fri, 2 Aug 2019 20:14:58 +0000 (20:14 +0000)]
hwasan: Remove unused field CurModuleUniqueId. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367717 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ORC] Remove a dead method.
Lang Hames [Fri, 2 Aug 2019 20:09:30 +0000 (20:09 +0000)]
[ORC] Remove a dead method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367716 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ScalarizeMaskedMemIntrin] Add constant mask support to expandload and compressstore...
Craig Topper [Fri, 2 Aug 2019 20:04:34 +0000 (20:04 +0000)]
[ScalarizeMaskedMemIntrin] Add constant mask support to expandload and compressstore scalarization

This adds support for generating all the loads or stores for a constant mask into a single basic block with no conditionals.

Differential Revision: https://reviews.llvm.org/D65613

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367715 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Test] Demonstrate a realignment bug missed in r366765
Philip Reames [Fri, 2 Aug 2019 20:01:43 +0000 (20:01 +0000)]
[Test] Demonstrate a realignment bug missed in r366765

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367714 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC][NFC] Enable ADT BitVectorTest
Jinsong Ji [Fri, 2 Aug 2019 19:58:00 +0000 (19:58 +0000)]
[PowerPC][NFC] Enable ADT BitVectorTest

Test on ppc64le passed.
This fix https://bugs.llvm.org/show_bug.cgi?id=42702

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367713 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ORC] Turn on symbol-flags overrides for LLJIT on Windows by default.
Lang Hames [Fri, 2 Aug 2019 19:43:20 +0000 (19:43 +0000)]
[ORC] Turn on symbol-flags overrides for LLJIT on Windows by default.

libObject does not apply the Exported flag to symbols in COFF object files,
which can lead to assertions when the symbol flags initially derived from
IR added to the JIT clash with the flags seen by the JIT linker. Both
RTDyldObjectLinkingLayer and ObjectLinkingLayer have a workaround for this:
they can be told to override the flags seen by the linker with the flags
attached to the materialization responsibility object that was passed down
to the linker. This patch modifies LLJIT's setup code to enable this override
by default on platforms where COFF is the default object format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367712 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd MCRegister and use it in MCRegisterClass::contains()
Daniel Sanders [Fri, 2 Aug 2019 19:37:17 +0000 (19:37 +0000)]
Add MCRegister and use it in MCRegisterClass::contains()

Summary:
Register can cast to MCRegister and we may want to consider asserting
!isValid() || isPhysical() when expensive checks are on.

Depends on D65554

Reviewers: arsenm

Subscribers: wdng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65599

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367711 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] try to convert opposing shifts to casts
Sanjay Patel [Fri, 2 Aug 2019 19:33:46 +0000 (19:33 +0000)]
[DAGCombiner] try to convert opposing shifts to casts

This reverses a questionable IR canonicalization when a truncate
is free:

sra (add (shl X, N1C), AddC), N1C -->
sext (add (trunc X to (width - N1C)), AddC')

https://rise4fun.com/Alive/slRC

More details in PR42644:
https://bugs.llvm.org/show_bug.cgi?id=42644

I limited this to pre-legalization for code simplicity because that
should be enough to reverse the IR patterns. I don't have any
evidence (no regression test diffs) that we need to try this later.

Differential Revision: https://reviews.llvm.org/D65607

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367710 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTemporarily Revert "Changing representation of cv_def_range directives in Codeview...
Eric Christopher [Fri, 2 Aug 2019 19:10:37 +0000 (19:10 +0000)]
Temporarily Revert "Changing representation of cv_def_range directives in Codeview debug info assembly format for better readability"

This is breaking bots and the author asked me to revert.

This reverts commit 367704.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367707 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoChanging representation of cv_def_range directives in Codeview debug info assembly...
Nilanjana Basu [Fri, 2 Aug 2019 18:44:39 +0000 (18:44 +0000)]
Changing representation of cv_def_range directives in Codeview debug info assembly format for better readability

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367704 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NewPassManager] Resolve assertion in CGSCCPassManager when CallCounts change.
Alina Sbirlea [Fri, 2 Aug 2019 18:37:03 +0000 (18:37 +0000)]
[NewPassManager] Resolve assertion in CGSCCPassManager when CallCounts change.

Summary:
If the CallCounts change after an iteration of the DevirtSCCRepeatedPass, this is not reflected in the local CallCounts structure triggering the assertion checking the before/after sizes.
Since it is valid for the size to change and this only uses the CallCounts for the devirtualizing heuristic, keep a <Function*, CallCount> map instead, and make the devirtualizing decision using the counts for the functions that exist both before and after the pass.

Resolves PR42726.

Reviewers: chandlerc

Subscribers: mehdi_amini, jlebar, sanjoy.google, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65621

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367703 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] - Fix the strip-dwo-groups.test.
George Rimar [Fri, 2 Aug 2019 18:22:46 +0000 (18:22 +0000)]
[llvm-objcopy] - Fix the strip-dwo-groups.test.

It was reported (https://reviews.llvm.org/D65273#1612246)
that this test fails if the compilation directory contain
a "debug_" substring.

This should fix it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367702 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][GlobalISel] Support the neg_addsub_shifted_imm32 pattern
Jessica Paquette [Fri, 2 Aug 2019 18:12:53 +0000 (18:12 +0000)]
[AArch64][GlobalISel] Support the neg_addsub_shifted_imm32 pattern

Add an equivalent ComplexRendererFns function for SelectNegArithImmed. This
allows us to select immediate adds of -1 by turning them into subtracts.

Update select-binop.mir to show that the pattern works.

Differential Revision: https://reviews.llvm.org/D65460

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367700 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SimplifyCFG] Cleanup redundant conditions [NFC].
Alina Sbirlea [Fri, 2 Aug 2019 18:06:54 +0000 (18:06 +0000)]
[SimplifyCFG] Cleanup redundant conditions [NFC].

Summary:
Since the for loop iterates over BB's predecessors, the branch conditions found must have BB as one of the successors.
For an unconditional branch the successor must be BB, added `assert`.
For a conditional branch, one of the two successors must be BB, simplify `else if` to `else` and `assert`.
Sink common instructions outside the if/else block.

Reviewers: sanjoy.google

Subscribers: jlebar, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65596

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367699 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Regenerated saddo.ll test file for D47927
Simon Pilgrim [Fri, 2 Aug 2019 17:52:55 +0000 (17:52 +0000)]
[AMDGPU] Regenerated saddo.ll test file for D47927

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367698 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix ARC after r367633
Daniel Sanders [Fri, 2 Aug 2019 17:52:17 +0000 (17:52 +0000)]
Fix ARC after r367633

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367697 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoCodeGen: Don't follow aliases when extracting type info.
Peter Collingbourne [Fri, 2 Aug 2019 17:43:45 +0000 (17:43 +0000)]
CodeGen: Don't follow aliases when extracting type info.

This fixes a crash in the case where the type info object is an alias
pointing to a non-zero offset within a global or is otherwise unanalyzable
by the stripPointerCasts() function. Looking through the alias is not the
right thing to do anyway for similar reasons as D65118.

Differential Revision: https://reviews.llvm.org/D65314

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367696 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] fold cmp+select using select operand equivalence
Sanjay Patel [Fri, 2 Aug 2019 17:39:32 +0000 (17:39 +0000)]
[InstCombine] fold cmp+select using select operand equivalence

As discussed in PR42696:
https://bugs.llvm.org/show_bug.cgi?id=42696
...but won't help that case yet.

We have an odd situation where a select operand equivalence fold was
implemented in InstSimplify when it could have been done more generally
in InstCombine if we allow dropping of {nsw,nuw,exact} from a binop operand.

Here's an example:
https://rise4fun.com/Alive/Xplr

  %cmp = icmp eq i32 %x, 2147483647
  %add = add nsw i32 %x, 1
  %sel = select i1 %cmp, i32 -2147483648, i32 %add
  =>
  %sel = add i32 %x, 1

I've left the InstSimplify code in place for now, but my guess is that we'd
prefer to remove that as a follow-up to save on code duplication and
compile-time.

Differential Revision: https://reviews.llvm.org/D65576

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367695 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix git-llvm to not delete non-empty directories.
James Y Knight [Fri, 2 Aug 2019 17:10:04 +0000 (17:10 +0000)]
Fix git-llvm to not delete non-empty directories.

Previously, if a directory contained only other sub-directories, one
of which was being removed, git llvm would delete the parent and all
its subdirs, even though only one should've been deleted.

This error occurred in r366590, where the commit attempted to remove
lldb/packages/Python/lldbsuite/test/tools/lldb-mi, but git-llvm
erroneously removed the entire contents of
lldb/packages/Python/lldbsuite/test/tools.

This happened because "git apply" automatically removes empty
directories locally, and the absence of a local directory was
previously taken as an indication to call 'svn rm' on that
directory. However, an empty local directory does not necessarily
indicate that the directory is truly empty.

Fix that by removing directories only when they're empty on the git
side.

Differential Revision: https://reviews.llvm.org/D65416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367693 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Merge r367667.
Peter Collingbourne [Fri, 2 Aug 2019 17:02:05 +0000 (17:02 +0000)]
gn build: Merge r367667.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367692 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[doc] Give a workaround for a FileCheck regex that ends in a brace.
Paul Robinson [Fri, 2 Aug 2019 16:07:48 +0000 (16:07 +0000)]
[doc] Give a workaround for a FileCheck regex that ends in a brace.

Addresses PR42864.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367689 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoUse llvm-nm instead of nm in new test to unbreak Windows bot
Teresa Johnson [Fri, 2 Aug 2019 15:49:39 +0000 (15:49 +0000)]
Use llvm-nm instead of nm in new test to unbreak Windows bot

New test added in r367679 used nm and should use llvm-nm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367688 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ORC] Change the locking scheme for ThreadSafeModule.
Lang Hames [Fri, 2 Aug 2019 15:21:37 +0000 (15:21 +0000)]
[ORC] Change the locking scheme for ThreadSafeModule.

ThreadSafeModule/ThreadSafeContext are used to manage lifetimes and locking
for LLVMContexts in ORCv2. Prior to this patch contexts were locked as soon
as an associated Module was emitted (to be compiled and linked), and were not
unlocked until the emit call returned. This could lead to deadlocks if
interdependent modules that shared contexts were compiled on different threads:
when, during emission of the first module, the dependence was discovered the
second module (which would provide the required symbol) could not be emitted as
the thread emitting the first module still held the lock.

This patch eliminates this possibility by moving to a finer-grained locking
scheme. Each client holds the module lock only while they are actively operating
on it. To make this finer grained locking simpler/safer to implement this patch
removes the explicit lock method, 'getContextLock', from ThreadSafeModule and
replaces it with a new method, 'withModuleDo', that implicitly locks the context,
calls a user-supplied function object to operate on the Module, then implicitly
unlocks the context before returning the result.

ThreadSafeModule TSM = getModule(...);
size_t NumFunctions = TSM.withModuleDo(
    [](Module &M) { // <- context locked before entry to lambda.
      return M.size();
    });

Existing ORCv2 layers that operate on ThreadSafeModules are updated to use the
new method.

This method is used to introduce Module locking into each of the existing
layers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367686 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Test commit, corrected some spelling in comment
David Candler [Fri, 2 Aug 2019 14:44:17 +0000 (14:44 +0000)]
[NFC] Test commit, corrected some spelling in comment

Test commit, corrected some spelling in comment.

Differential Revision: https://reviews.llvm.org/D65516

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367685 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: support swiftself attribute
Tim Northover [Fri, 2 Aug 2019 14:09:49 +0000 (14:09 +0000)]
GlobalISel: support swiftself attribute

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367683 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix new test try 2
Teresa Johnson [Fri, 2 Aug 2019 13:49:48 +0000 (13:49 +0000)]
Fix new test try 2

Fix second (and last) instance of wrong Input file name in new test
added in r367679.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367682 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix new test
Teresa Johnson [Fri, 2 Aug 2019 13:26:18 +0000 (13:26 +0000)]
Fix new test

Thew new test added in r367679 was using the wrong copy of the Input
file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367680 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ThinLTO] Implement index-based WPD
Teresa Johnson [Fri, 2 Aug 2019 13:10:52 +0000 (13:10 +0000)]
[ThinLTO] Implement index-based WPD

This patch adds support to the WholeProgramDevirt pass to perform
index-based WPD, which is invoked from ThinLTO during the thin link.

The ThinLTO backend (WPD import phase) behaves the same regardless of
whether the WPD decisions were made with the index-based or (the
existing) IR-based analysis.

Depends on D54815.

Reviewers: pcc

Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, arphaman, dang, llvm-commits

Differential Revision: https://reviews.llvm.org/D55153

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367679 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[x86] add/adjust tests for shift-add-shift; NFC
Sanjay Patel [Fri, 2 Aug 2019 11:50:03 +0000 (11:50 +0000)]
[x86] add/adjust tests for shift-add-shift; NFC

Goes with D65607.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367677 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-dlltool] Clarify an error message. NFC.
Martin Storsjo [Fri, 2 Aug 2019 11:20:03 +0000 (11:20 +0000)]
[llvm-dlltool] Clarify an error message. NFC.

The parameter to the -D (--dllname) option is the name of the dll
that llvm-dlltool produces an import library for. Even though this
is named "OutputFile" in the COFFModuleDefinition class, it's not
an output file name in the context of llvm-dlltool, but the name
of the DLL to create an import library for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367676 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MCA] Add support for printing immedate values as hex. Also enable lexing of masm...
Andrea Di Biagio [Fri, 2 Aug 2019 10:38:25 +0000 (10:38 +0000)]
[MCA] Add support for printing immedate values as hex. Also enable lexing of masm binary and hex literals.

This patch adds a new llvm-mca flag named -print-imm-hex.

By default, the instruction printer prints immediate operands as decimals. Flag
-print-imm-hex enables the instruction printer to print those operands in hex.

This patch also adds support for MASM binary and hex literal numbers (example
0FFh, 101b).
Added tests to verify the behavior of the new flag. Tests also verify that masm
numeric literal operands are now recognized.

Differential Revision: https://reviews.llvm.org/D65588

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367671 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IPRA][ARM] Disable no-CSR optimisation for ARM
Oliver Stannard [Fri, 2 Aug 2019 10:23:17 +0000 (10:23 +0000)]
[IPRA][ARM] Disable no-CSR optimisation for ARM

This optimisation isn't generally profitable for ARM, because we can
save/restore many registers in the prologue and epilogue using the PUSH
and POP instructions, but mostly use individual LDR/STR instructions for
other spills.

Differential revision: https://reviews.llvm.org/D64910

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367670 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix and test inter-procedural register allocation for ARM
Oliver Stannard [Fri, 2 Aug 2019 10:23:05 +0000 (10:23 +0000)]
Fix and test inter-procedural register allocation for ARM

- Avoid a crash when IPRA calls ARMFrameLowering::determineCalleeSaves
  with a null RegScavenger. Simply not updating the register scavenger
  is fine because IPRA only cares about the SavedRegs vector, the acutal
  code of the function has already been generated at this point.
- Add a new hook to TargetRegisterInfo to get the set of registers which
  can be clobbered inside a call, even if the compiler can see both
  sides, by linker-generated code.

Differential revision: https://reviews.llvm.org/D64908

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367669 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Loop Peeling] Introduce an option for profile based peeling disabling.
Serguei Katkov [Fri, 2 Aug 2019 09:32:52 +0000 (09:32 +0000)]
[Loop Peeling] Introduce an option for profile based peeling disabling.

This patch adds an ability to disable profile based peeling
causing the peeling of all iterations and as a result prohibits
further unroll/peeling attempts on that loop.

The motivation to get an ability to separate peeling usage in
pipeline where in the first part we peel only separate iterations if needed
and later in pipeline we apply the full peeling which will prohibit further peeling.

Reviewers: reames, fhahn
Reviewed By: reames
Subscribers: hiraditya, zzheng, dmgreen, llvm-commits
Differential Revision: https://reviews.llvm.org/D64983

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367668 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LV] Fix test failure in a Release build.
Jay Foad [Fri, 2 Aug 2019 08:33:41 +0000 (08:33 +0000)]
[LV] Fix test failure in a Release build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367666 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][ARM[ParallelDSP] Rename/remove/change types
Sam Parker [Fri, 2 Aug 2019 08:21:17 +0000 (08:21 +0000)]
[NFC][ARM[ParallelDSP] Rename/remove/change types

Remove forward declaration, fold a couple of typedefs and change one
to be more useful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367665 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AliasAnalysis] Initialize a member variable that may be used by unit test.
Peter Smith [Fri, 2 Aug 2019 08:05:14 +0000 (08:05 +0000)]
[AliasAnalysis] Initialize a member variable that may be used by unit test.

The unit tests in BasicAliasAnalysisTest use the alias analysis API
directly and do not call setAAResults to initalize AAR. This gives a
valgrind error "Conditional Jump depends on unitialized variable".

On most buildbots the variable is nullptr, but in some cases it can be
non nullptr leading to seemingly random failures.

These tests were disabled in r366986. With the initialization they can be
enabled again.

Fixes PR42719

Differential Revision: https://reviews.llvm.org/D65568

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367662 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][ARM][ParallelDSP] Remove ValueList
Sam Parker [Fri, 2 Aug 2019 07:32:28 +0000 (07:32 +0000)]
[NFC][ARM][ParallelDSP] Remove ValueList

We only care about the first element in the list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367660 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMoves the newly added test interleaved-accesses-waw-dependency.ll to X86 subdirectory.
Hideki Saito [Fri, 2 Aug 2019 07:25:09 +0000 (07:25 +0000)]
Moves the newly added test interleaved-accesses-waw-dependency.ll to X86 subdirectory.

ps4-buildslave1 reported a failure. The test has x86 triple.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367659 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r367649: Improve raw_ostream so that you can "write" colors using operator<<
Rui Ueyama [Fri, 2 Aug 2019 07:22:34 +0000 (07:22 +0000)]
Revert r367649: Improve raw_ostream so that you can "write" colors using operator<<

This reverts commit r367649 in an attempt to unbreak Windows bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367658 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LLVM][Alignment] Update documentation
Guillaume Chatelet [Fri, 2 Aug 2019 07:14:20 +0000 (07:14 +0000)]
[LLVM][Alignment] Update documentation

Reviewers: aprantl

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65558

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367655 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LV] Avoid building interleaved group in presence of WAW dependency
Hideki Saito [Fri, 2 Aug 2019 06:31:50 +0000 (06:31 +0000)]
[LV] Avoid building interleaved group in presence of WAW dependency

Reviewers: hsaito, Ayal, fhahn, anna, mkazantsev

Reviewed By: hsaito

Patch by evrevnov, thanks!

Differential Revision: https://reviews.llvm.org/D63981

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367654 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoImprove raw_ostream so that you can "write" colors using operator<<
Rui Ueyama [Fri, 2 Aug 2019 04:48:30 +0000 (04:48 +0000)]
Improve raw_ostream so that you can "write" colors using operator<<

1. raw_ostream supports ANSI colors so that you can write messages to
the termina with colors. Previously, in order to change and reset
color, you had to call `changeColor` and `resetColor` functions,
respectively.

So, if you print out "error: " in red, for example, you had to do
something like this:

  OS.changeColor(raw_ostream::RED);
  OS << "error: ";
  OS.resetColor();

With this patch, you can write the same code as follows:

  OS << raw_ostream::RED << "error: " << raw_ostream::RESET;

2. Add a boolean flag to raw_ostream so that you can disable colored
output. If you disable colors, changeColor, operator<<(Color),
resetColor and other color-related functions have no effect.

Most LLVM tools automatically prints out messages using colors, and
you can disable it by passing a flag such as `--disable-colors`.
This new flag makes it easy to write code that works that way.

Differential Revision: https://reviews.llvm.org/D65564

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367649 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Loop Peeling] Do not close further unroll/peel if profile based peeling was not...
Serguei Katkov [Fri, 2 Aug 2019 04:29:23 +0000 (04:29 +0000)]
[Loop Peeling] Do not close further unroll/peel if profile based peeling was not used.

Current peeling cost model can decide to peel off not all iterations
but only some of them to eliminate conditions on phi. At the same time
if any peeling happens the door for further unroll/peel optimizations on that
loop closes because the part of the code thinks that if peeling happened
it is profile based peeling and all iterations are peeled off.

To resolve this inconsistency the patch provides the flag which states whether
the full peeling basing on profile is enabled or not and peeling cost model
is able to modify this field like it does not PeelCount.

In a separate patch I will introduce an option to allow/disallow peeling basing
on profile.

To avoid infinite loop peeling the patch tracks the total number of peeled iteration
through llvm.loop.peeled.count loop metadata.

Reviewers: reames, fhahn
Reviewed By: reames
Subscribers: hiraditya, zzheng, dmgreen, llvm-commits
Differential Revision: https://reviews.llvm.org/D64972

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367647 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoHandle casts changing pointer size in the vectorizer
Stanislav Mekhanoshin [Fri, 2 Aug 2019 04:03:37 +0000 (04:03 +0000)]
Handle casts changing pointer size in the vectorizer

Added code to truncate or shrink offsets so that we can continue
base pointer search if size has changed along the way.

Differential Revision: https://reviews.llvm.org/D65612

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367646 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC][Peephole] Check if `extsw`'s second operand is a virtual register
Kai Luo [Fri, 2 Aug 2019 03:14:17 +0000 (03:14 +0000)]
[PowerPC][Peephole] Check if `extsw`'s second operand is a virtual register

Summary:
When combining `extsw` and `sldi` in `PPCMIPeephole`, we have to check
if `extsw`'s second operand is a virtual register, otherwise we might
get miscompile.

Differential Revision: https://reviews.llvm.org/D65315

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367645 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][CodeGen] Modify the type element of TailCalls to simplify the dupRetToEnableTai...
Kang Zhang [Fri, 2 Aug 2019 03:09:07 +0000 (03:09 +0000)]
[NFC][CodeGen] Modify the type element of TailCalls to simplify the dupRetToEnableTailCallOpts()

Summary:
The old code can be simplified to define the element type of TailCalls as `BasicBlock` not `CallInst`. Also I use the for-range loop instead the for loop.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D64905

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367644 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTemporarily revert "Changes to improve CodeView debug info type record inline comments"
Eric Christopher [Fri, 2 Aug 2019 01:05:47 +0000 (01:05 +0000)]
Temporarily revert "Changes to improve CodeView debug info type record inline comments"
due to a sanitizer failure.

This reverts commit 367623.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367640 91177308-0d34-0410-b5e6-96231b3b80d8