ELF improvements:
Handle large integers, x86_fp80, ConstantAggregateZero, and two more ConstantExpr:
GetElementPtr and IntToPtr
Set SHF_MERGE bit for mergeable strings
Avoid zero initialized strings to be classified as a bss symbol
Don't allow common symbols to be classified as STB_WEAK
Add a constant to be used as a global value offset in data relocations
Remove RegisterScavenger::isSuperRegUsed(). This completely reverses the mistaken commit r77904.
Now there is no special treatment of instructions that redefine part of a
super-register. Instead, the super-register is marked with <imp-use,kill> and
<imp-def>. For instance, from LowerSubregs on ARM:
Daniel Dunbar [Sat, 8 Aug 2009 07:50:56 +0000 (07:50 +0000)]
llvm-mc/AsmMatcher: Improve match code.
- This doesn't actually improve the algorithm (its still linear), but the
generated (match) code is now fairly compact and table driven. Still need a
generic string matcher.
- The table still needs to be compressed, this is quite simple to do and should
shrink it to under 16k.
- This also simplifies and restructures the code to make the match classes more
explicit, in anticipation of resolving ambiguities.
Bob Wilson [Sat, 8 Aug 2009 06:13:25 +0000 (06:13 +0000)]
Implement Neon VZIP and VUZP instructions. These are very similar to VTRN,
so I generalized the class for VTRN in the .td file to handle all 3 of them.
Bob Wilson [Sat, 8 Aug 2009 05:53:00 +0000 (05:53 +0000)]
Implement Neon VTRN instructions. For now, anyway, these are selected
directly from the intrinsics produced by the frontend. If it is more
convenient to have a custom DAG node for using these to implement shuffles,
we can add that later.
Daniel Dunbar [Sat, 8 Aug 2009 05:24:34 +0000 (05:24 +0000)]
llvm-mc/AsmMatcher: Switch to a unified function to convert operands to MCInst,
so that terminal states are as simple as possible.
- If we were willing to assume that the order that operands get inserted in the
MCInst is fixed we could actually dispose with this altogether, although it
might be nice to have the flexibility to change it later.
Bob Wilson [Fri, 7 Aug 2009 23:53:05 +0000 (23:53 +0000)]
Add new intrinsics for Neon VTRN, VZIP and VUZP operations. Modeling these
as vector shuffles did not work out well. Shuffles that produce double-wide
vectors accurately represent the operation but make it hard to do anything
with the results. I considered splitting them up into 2 shuffles, one to
write each register separately, but there doesn't seem to be a good way to
reunite them for codegen.
Chris Lattner [Fri, 7 Aug 2009 23:13:38 +0000 (23:13 +0000)]
fix the column output stuff in the asmwriter from being dynamic and
driven by TAI to being static, driven by tblgen. This means that a
target doesn't get impacted by this stuff at all if it doesn't opt
into it.
Kevin Enderby [Fri, 7 Aug 2009 22:46:00 +0000 (22:46 +0000)]
Added Mac OS X assembler style conditional assembly. I may come back and see if
I can clean this up a bit more and do way with the TheCondState and just use
the top element on the TheCondStack if not empty. Also may tweak the code
around ParseConditionalAssemblyDirectives() to simplify the AsmParser code.
Jeffrey Yasskin [Fri, 7 Aug 2009 19:54:29 +0000 (19:54 +0000)]
To catch bugs like the one fixed in
http://llvm.org/viewvc/llvm-project?view=rev&revision=78127, I'm changing the
ExecutionEngine's global mappings to hold AssertingVH<const GlobalValue>. That
way, if unregistering a mapping fails to actually unregister it, we'll get an
assert. Running the jit nightly tests didn't uncover any actual instances of
the problem.
This also uncovered the fact that AssertingVH<const X> didn't work, so I fixed
that too.
Andreas Bolka [Fri, 7 Aug 2009 18:23:41 +0000 (18:23 +0000)]
SIV/MIV classification for LDA.
LoopDependenceAnalysis::getLoops is currently O(N*M) for a loop-nest of
depth N and a compound SCEV of M atomic SCEVs. As both N and M will
typically be very small, this should not be a problem. If it turns out
to be one, rewriting getLoops as SCEVVisitor will reduce complexity to
O(M).
Daniel Dunbar [Fri, 7 Aug 2009 08:45:03 +0000 (08:45 +0000)]
Disable X86 AsmMatcher for now, it is causing gcc-4.0 to run out of memory on
i386-apple-darwin9. This presumably will get fixed once the generated code
improves.
Daniel Dunbar [Fri, 7 Aug 2009 08:26:05 +0000 (08:26 +0000)]
llvm-mc/AsmMatcher: Move to a slightly more sane matching design.
- Still not very sane, but a least its not 60k lines on X86. :)
- In terms of correctness, currently some things are hard wired for X86, and we
still don't properly resolve ambiguities (this is ignoring the instructions
we don't even match due to funny .td stuff or other corner cases).
The high level changes:
1. Represent tokens which are significant for matching explicitly as separate
operands. This uniformly handles not only the instruction mnemonic, but
also 'signficiant' syntax like the '*' in "call * ...".
2. Separate the matching of operands to an instruction from the construction of
the MCInst. In theory this can be done during matching, but since the number
of variations is small I think it makes sense to decompose the problems.
3. Improved a few of the mechanisms to at least successfully flatten / tokenize
the assembly strings for PowerPC and ARM.
4. The comment at the top of AsmMatcherEmitter.cpp explains the approach I'm
moving towards for handling ambiguous instructions. The high-bit is to infer
a partial ordering of the operand classes (and force the user to specify one
if we can't) and use that to resolve ambiguities.
Evan Cheng [Fri, 7 Aug 2009 00:34:42 +0000 (00:34 +0000)]
It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing.
This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time.
Lang Hames [Thu, 6 Aug 2009 23:32:48 +0000 (23:32 +0000)]
New C++ PBQP solver. Currently about as fast (read _slow_) as the old C based solver, but I'll be working to improve that. The PBQP allocator has been updated to use the new solver.
Chris Lattner [Thu, 6 Aug 2009 16:39:58 +0000 (16:39 +0000)]
Fix several fixmes and clean up code by sinking *all* section
creation activity into the target-specific subclasses of TLOF.
Before this, globals with explicit sections could be created by
the base class.
1. make getOrCreateSection protected, add a new getExplicitSectionGlobal
pure virtual method to assign sections to globals with a specified
section.
2. eliminate getSpecialCasedSectionGlobals, which is now PIC specific.
3. eliminate the getKindForNamedSection virtual method, which is
now just a static method for ELF.
4. Add implementions of getExplicitSectionGlobal for ELF/PECOFF/Darwin/PIC16.
They are now all detangled and understandable, woo! :)
John Mosby [Thu, 6 Aug 2009 16:32:47 +0000 (16:32 +0000)]
Reg Scavenging generalization (Thumb support):
- start support for new PEI w/reg alloc, allow running RS from emit{Pro,Epi}logue() target hooks.
- fix minor issue with recursion detection.
Dan Gohman [Thu, 6 Aug 2009 15:37:27 +0000 (15:37 +0000)]
Add assertion checks after the calls to LowerFormalArguments, LowerCall,
and LowerReturn, to verify that the targets' hooks have respected some
of their postconditions.