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7 years ago[TableGen][X86] Remove unnecessary std::string creations. NFC
Craig Topper [Sun, 28 May 2017 18:24:35 +0000 (18:24 +0000)]
[TableGen][X86] Remove unnecessary std::string creations. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304096 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen][X86] Replace a global std::vector with a regular array. llvm::find works...
Craig Topper [Sun, 28 May 2017 18:24:32 +0000 (18:24 +0000)]
[TableGen][X86] Replace a global std::vector with a regular array. llvm::find works on arrays, just need to use std::end to check the result.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304095 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen][X86] getValueAsString returns a std::string not a StringRef. Capture it...
Craig Topper [Sun, 28 May 2017 17:48:41 +0000 (17:48 +0000)]
[TableGen][X86] getValueAsString returns a std::string not a StringRef. Capture it that way to avoid a StringRef to a temporary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304093 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] auto-generate better checks; NFC
Sanjay Patel [Sun, 28 May 2017 13:57:59 +0000 (13:57 +0000)]
[x86] auto-generate better checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304090 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstrProf] Use more ArrayRef/StringRef.
Benjamin Kramer [Sun, 28 May 2017 13:23:02 +0000 (13:23 +0000)]
[InstrProf] Use more ArrayRef/StringRef.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304089 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Adding new LLVM TableGen backend that generates the X86 backend memory folding...
Ayman Musa [Sun, 28 May 2017 12:55:36 +0000 (12:55 +0000)]
[X86] Adding new LLVM TableGen backend that generates the X86 backend memory folding tables.

X86 backend holds huge tables in order to map between the register and memory forms of each instruction.
This TableGen Backend automatically generated all these tables with the appropriate flags for each entry.

Differential Revision: https://reviews.llvm.org/D32684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304088 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Adding FoldGenRegForm helper field (for memory folding tables tableGen backend...
Ayman Musa [Sun, 28 May 2017 12:39:37 +0000 (12:39 +0000)]
[X86] Adding FoldGenRegForm helper field (for memory folding tables tableGen backend) to X86Inst class and set its value for the relevant instructions.

Some register-register instructions can be encoded in 2 different ways, this happens when 2 register operands can be folded (separately).
For example if we look at the MOV8rr and MOV8rr_REV, both instructions perform exactly the same operation, but are encoded differently. Here is the relevant information about these instructions from Intel's 64-ia-32-architectures-software-developer-manual:

Opcode  Instruction  Op/En  64-Bit Mode  Compat/Leg Mode  Description
8A /r   MOV r8,r/m8  RM     Valid        Valid            Move r/m8 to r8.
88 /r   MOV r/m8,r8  MR     Valid        Valid            Move r8 to r/m8.
Here we can see that in order to enable the folding of the output and input registers, we had to define 2 "encodings", and as a result we got 2 move 8-bit register-register instructions.

In the X86 backend, we define both of these instructions, usually one has a regular name (MOV8rr) while the other has "_REV" suffix (MOV8rr_REV), must be marked with isCodeGenOnly flag and is not emitted from CodeGen.

Automatically generating the memory folding tables relies on matching encodings of instructions, but in these cases where we want to map both memory forms of the mov 8-bit (MOV8rm & MOV8mr) to MOV8rr (not to MOV8rr_REV) we have to somehow point from the MOV8rr_REV to the "regular" appropriate instruction which in this case is MOV8rr.

This field enable this "pointing" mechanism - which is used in the TableGen backend for generating memory folding tables.

Differential Revision: https://reviews.llvm.org/D32683

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304087 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Fixing VPOPCNTDQ feature set lookup.
Oren Ben Simhon [Sun, 28 May 2017 11:26:11 +0000 (11:26 +0000)]
[X86] Fixing VPOPCNTDQ feature set lookup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304086 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReverted r304083 as it seems there is a desire to address this in the googletest.
Galina Kistanova [Sun, 28 May 2017 05:50:22 +0000 (05:50 +0000)]
Reverted r304083 as it seems there is a desire to address this in the googletest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304084 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdded braces to address gcc warning: suggest explicit braces to avoid ambiguous ...
Galina Kistanova [Sun, 28 May 2017 03:50:52 +0000 (03:50 +0000)]
Added braces to address gcc warning: suggest explicit braces to avoid ambiguous 'else' [-Wdangling-else]. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304083 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDebugInfo: Add source code/build instructions for split-dwarf-dwp symbolizer test
David Blaikie [Sat, 27 May 2017 19:52:20 +0000 (19:52 +0000)]
DebugInfo: Add source code/build instructions for split-dwarf-dwp symbolizer test

Addressing post-commit code review feedback from Paul Robinson on
r303609.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304080 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCloning: Fix debug info cloning
Gor Nishanov [Sat, 27 May 2017 19:41:09 +0000 (19:41 +0000)]
Cloning: Fix debug info cloning

Summary:
I believe https://reviews.llvm.org/rL302576 introduced two bugs:

1) it produces duplicate distinct variables for every: dbg.value describing the same variable.
    To fix the problme I switched form getDistinct() to get() in DebugLoc.cpp: auto reparentVar = [&](DILocalVariable *Var) {
    return DILocalVariable::getDistinct(

2) It passes NewFunction plain name as a linkagename parameter to Subprogram constructor. Breaks assert in:

 || DeclLinkageName.empty()) || LinkageName == DeclLinkageName) && "decl has a linkage name and it is different"' failed.
#9 0x00007f5010261b75 llvm::DwarfUnit::applySubprogramDefinitionAttributes(llvm::DISubprogram const*, llvm::DIE&) /home/gor/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp:1173:3
#
(Edit: reproducer added)

Here how https://reviews.llvm.org/rL302576 broke coroutine debug info.
Coroutine body of the original function is split into several parts by cloning and removing unneeded code.
All parts describe the original function and variables present in the original function.

For a simple case, prior to Split, original function has these two blocks:

```
PostSpill:                                        ; preds = %AllocaSpillBB
  call void @llvm.dbg.value(metadata i32 %x, i64 0, metadata !14, metadata !15), !dbg !13
  store i32 %x, i32* %x.addr, align 4
  ...
and

sw.epilog:                                        ; preds = %sw.bb
  %x.addr.reload.addr = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i32 0, i32 4, !dbg !20
  %4 = load i32, i32* %x.addr.reload.addr, align 4, !dbg !20
  call void @llvm.dbg.value(metadata i32 %4, i64 0, metadata !14, metadata !15), !dbg !13

!14 = !DILocalVariable(name: "x", arg: 1, scope: !6, file: !7, line: 55, type: !11)

```

Note that in two blocks different expression represent the same original user variable X.

Before rL302576, for every cloned function there was exactly one cloned DILocalVariable(name: "x" as in:

```
define i8* @f(i32 %x) #0 !dbg !6 {
  ...
!6 = distinct !DISubprogram(name: "f", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55, flags: DIFlagPrototyped,
...
!14 = !DILocalVariable(name: "x", arg: 1, scope: !6, file: !7, line: 55, type: !11)

define internal fastcc void @f.resume(%f.Frame* %FramePtr) #0 !dbg !25 {
...
!25 = distinct !DISubprogram(name: "f", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
!28 = !DILocalVariable(name: "x", arg: 1, scope: !25, file: !7, line: 55, type: !11)
```
After rL302576, for every cloned function there were as many DILocalVariable(name: "x" as there were "call void @llvm.dbg.value" for that variable.
This was causing asserts in VerifyDebugInfo and AssemblyPrinter.

Example:

```
!27 = distinct !DISubprogram(name: "f", linkageName: "f.resume", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55,
!29 = distinct !DILocalVariable(name: "x", arg: 1, scope: !27, file: !7, line: 55, type: !11)
!39 = distinct !DILocalVariable(name: "x", arg: 1, scope: !27, file: !7, line: 55, type: !11)
!41 = distinct !DILocalVariable(name: "x", arg: 1, scope: !27, file: !7, line: 55, type: !11)
```

Second problem:

Prior to rL302576, all clones were described by DISubprogram referring to original function.

```
define i8* @f(i32 %x) #0 !dbg !6 {
...
!6 = distinct !DISubprogram(name: "f", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55, flags: DIFlagPrototyped,

define internal fastcc void @f.resume(%f.Frame* %FramePtr) #0 !dbg !25 {
...
!25 = distinct !DISubprogram(name: "f", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55, flags: DIFlagPrototyped,
```

After rL302576, DISubprogram for clones is of two minds, plain name refers to the original name, linkageName refers to plain name of the clone.

```
!27 = distinct !DISubprogram(name: "f", linkageName: "f.resume", scope: !7, file: !7, line: 55, type: !8, isLocal: false, isDefinition: true, scopeLine: 55,
```

I think the assumption in AsmPrinter is that both name and linkageName should refer to the same entity. It asserts here when they are not:

```
 || DeclLinkageName.empty()) || LinkageName == DeclLinkageName) && "decl has a linkage name and it is different"' failed.
#9 0x00007f5010261b75 llvm::DwarfUnit::applySubprogramDefinitionAttributes(llvm::DISubprogram const*, llvm::DIE&) /home/gor/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp:1173:3
```
After this fix, behavior (with respect to coroutines) reverts to exactly as it was before and therefore making them debuggable again, or even more importantly, compilable, with "-g"

Reviewers: dblaikie, echristo, aprantl

Reviewed By: dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33614

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304079 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRecommit "[DWARF] - Make collectAddressRanges() return section index in addition...
George Rimar [Sat, 27 May 2017 18:10:23 +0000 (18:10 +0000)]
Recommit "[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC"

With fix of uninitialized variable.

Original commit message:

This change is intended to use for LLD in D33183.
Problem we have in LLD when building .gdb_index is that we need to know section which address range belongs to.

Previously it was solved on LLD side by providing fake section addresses with use of llvm::LoadedObjectInfo
interface. We assigned file offsets as addressed. Then after obtaining ranges lists, for each range we had to find section ID's.
That not only was slow, but also complicated implementation and was the reason of incorrect behavior when
sections share the same offsets, like D33176 shows.

This patch makes DWARF parsers to return section index as well. That solves problem mentioned above.

Differential revision: https://reviews.llvm.org/D33184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304078 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen] Prevent DagInit from leaking its Args and ArgNames when they exceed the...
Craig Topper [Sat, 27 May 2017 17:36:50 +0000 (17:36 +0000)]
[TableGen] Prevent DagInit from leaking its Args and ArgNames when they exceed the size of the SmallVector.

DagInits are allocated in a BumpPtrAllocator so they are never destructed. This means the destructor for the SmallVector never runs.

To fix this we now allocate the vectors in the BumpPtrAllocator too using TrailingObjects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304077 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen] Use the correct type for the first template for the ListInit TrailingObjects.
Craig Topper [Sat, 27 May 2017 17:36:47 +0000 (17:36 +0000)]
[TableGen] Use the correct type for the first template for the ListInit TrailingObjects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304076 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEV] Assume parameters coming from function calls contain IVs
Tobias Grosser [Sat, 27 May 2017 15:17:49 +0000 (15:17 +0000)]
[SCEV] Assume parameters coming from function calls contain IVs

The optimistic delinearization implemented in LLVM detects array sizes by
looking for non-linear products between parameters and induction variables.
In OpenCL code, such products often look like:

  A[get_global_id(0) * N + get_global_id(1)]

Hence, the IV is hidden in the get_global_id() call and consequently
delinearization would fail as no induction variable is available that helps
us to identify N as array size parameter.

We now use a very simple heuristic to change this. We assume that each parameter
that comes directly from a function call is a hidden induction variable. As
a result, we can delinearize the access above to:

  A[get_global_id(0)][get_global_id(1]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304073 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] use narrow load to avoid vector extract
Sanjay Patel [Sat, 27 May 2017 14:07:03 +0000 (14:07 +0000)]
[DAGCombiner] use narrow load to avoid vector extract

If we have (extract_subvector(load wide vector)) with no other users,
that can just be (load narrow vector). This is intentionally conservative.
Follow-ups may loosen the one-use constraint to account for the extract cost
or just remove the one-use check.

The memop chain updating is based on code that already exists multiple times
in x86 lowering, so that should be pulled into a helper function as a follow-up.

Background: this is a potential improvement noticed via regressions caused by
making x86's peekThroughBitcasts() not loop on consecutive bitcasts (see
comments in D33137).

Differential Revision: https://reviews.llvm.org/D33578

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304072 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[TableGen] Remove all the static vectors named TheActualPool.
Craig Topper [Sat, 27 May 2017 06:14:12 +0000 (06:14 +0000)]
[TableGen] Remove all the static vectors named TheActualPool.

These used to hold std::unique_ptrs that managed the allocation for the various *Init object so that they would be deleted on exit. Everything is allocated in a BumpPtrAllocator name so there is no reason for these to still exist.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304066 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[coroutines] Define getPassName() for coroutine passes
Gor Nishanov [Sat, 27 May 2017 05:54:30 +0000 (05:54 +0000)]
[coroutines] Define getPassName() for coroutine passes

Reviewers: GorNishanov

Reviewed By: GorNishanov

Subscribers: EricWF, llvm-commits

Differential Revision: https://reviews.llvm.org/D33622

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304065 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PartialInlining] Replace delete with unique_ptr in computeCallsiteToProfCountMap
Vitaly Buka [Sat, 27 May 2017 05:32:09 +0000 (05:32 +0000)]
[PartialInlining] Replace delete with unique_ptr in computeCallsiteToProfCountMap

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: vsk, llvm-commits

Differential Revision: https://reviews.llvm.org/D33220

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304064 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoScalarEvolution unit test: fix typo that breaks check-all
Gor Nishanov [Sat, 27 May 2017 05:24:30 +0000 (05:24 +0000)]
ScalarEvolution unit test: fix typo that breaks check-all

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304063 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRearrange Dom unittest to accommodate multiple tests
Adam Nemet [Sat, 27 May 2017 04:05:52 +0000 (04:05 +0000)]
Rearrange Dom unittest to accommodate multiple tests

I've taken the approach from the LoopInfo test:

* Rather than running in the pass manager just build the analyses manually
* Split out the common parts (makeLLVMModule, runWithDomTree) into helpers

Differential Revision: https://reviews.llvm.org/D33617

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304061 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoclang-format DomTree unittest
Adam Nemet [Sat, 27 May 2017 04:05:50 +0000 (04:05 +0000)]
clang-format DomTree unittest

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304060 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAArch64/PEI: Do not add reserved regs to liveins
Matthias Braun [Sat, 27 May 2017 03:38:02 +0000 (03:38 +0000)]
AArch64/PEI: Do not add reserved regs to liveins

We do not track liveness for reserved registers. It is unnecessary to
add them to block livein lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304059 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEVExpander] Try harder to avoid introducing inttoptr
Keno Fischer [Sat, 27 May 2017 03:22:55 +0000 (03:22 +0000)]
[SCEVExpander] Try harder to avoid introducing inttoptr

Summary:
This fixes introduction of an incorrect inttoptr/ptrtoint pair in
the included test case which makes use of non-integral pointers. I
suspect there are more cases like this left, but this takes care of
the one I was seeing at the moment.

Reviewers: sanjoy

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D33129

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304058 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoScheduleDAGInstrs: Fix fixupKills()
Matthias Braun [Sat, 27 May 2017 02:50:50 +0000 (02:50 +0000)]
ScheduleDAGInstrs: Fix fixupKills()

Rewrite fixupKills() to use the LivePhysRegs class. Simplifies the code
and fixes a bug where the CSR registers in return blocks where missed
leading to invalid kill flags. Also remove the unnecessary rule that we
wouldn't set kill flags on tied operands.

No tests as I have an upcoming commit improving MachineVerifier checks
to catch these cases in multiple existing lit tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304055 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Demangler] copy changes made in libcxxabi's r303718 to ItaniumDemangle
Erik Pilkington [Sat, 27 May 2017 01:48:34 +0000 (01:48 +0000)]
[Demangler] copy changes made in libcxxabi's r303718 to ItaniumDemangle

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304053 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64][GlobalISel] Add the Localizer pass for the O0 pipeline
Quentin Colombet [Sat, 27 May 2017 01:34:07 +0000 (01:34 +0000)]
[AArch64][GlobalISel] Add the Localizer pass for the O0 pipeline

This should fix most of the issue we have right now with constants being
spilled all over the place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304052 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalISel] Add a localizer pass for target to use
Quentin Colombet [Sat, 27 May 2017 01:34:00 +0000 (01:34 +0000)]
[GlobalISel] Add a localizer pass for target to use

This reverts commit r299287 plus clean-ups.

The localizer pass is a helper pass that could be run at O0 in the GISel
pipeline to work around the deficiency of the fast register allocator.
It basically shortens the live-ranges of the constants so that the
allocator does not spill all over the place.

Long term fix would be to make the greedy allocator fast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304051 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GVN] Recommit the patch "Add phi-translate support in scalarpre".
Wei Mi [Sat, 27 May 2017 00:54:19 +0000 (00:54 +0000)]
[GVN] Recommit the patch "Add phi-translate support in scalarpre".

The recommit is to fix a bug about ExtractValue and InsertValue ops. For those
ops, some varargs inside GVN::Expression are not value numbers but raw index
numbers. It is wrong to do phi-translate for raw index numbers, and the fix is
to stop doing that.

Right now scalarpre doesn't have phi-translate support, so it will miss some
simple pre opportunities. Like the following testcase, current scalarpre cannot
recognize the last "a * b" is fully redundent because a and b used by the last
"a * b" expr are both defined by phis.

long a[100], b[100], g1, g2, g3;
__attribute__((pure)) long goo();

void foo(long a, long b, long c, long d) {
  g1 = a * b;
  if (__builtin_expect(g2 > 3, 0)) {
    a = c;
    b = d;
    g2 = a * b;
  }
  g3 = a * b;      // fully redundant.
}
The patch adds phi-translate support in scalarpre. This is only a temporary
solution before the newpre based on newgvn is available.

Differential Revision: https://reviews.llvm.org/D32252

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304050 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoBranchRelaxation: computeLiveIns() after creating new block
Matthias Braun [Sat, 27 May 2017 00:53:48 +0000 (00:53 +0000)]
BranchRelaxation: computeLiveIns() after creating new block

One case in BranchRelaxation did not compute liveins after creating a
new block. This is catched by existing tests with an upcoming commit
that will improve MachineVerifier checking of livein lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304049 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAArch64: Fix cmpxchg O0 expansion
Matthias Braun [Fri, 26 May 2017 23:48:59 +0000 (23:48 +0000)]
AArch64: Fix cmpxchg O0 expansion

- Rewrite livein calculation to use the computeLiveIns() helper
  function. This is slightly less efficient but easier to reason about
  and doesn't unnecessarily add pristine and reserved registers[1]
- Zero the status register at the beginning of the loop to make sure it
  has a defined value.
- Remove kill flags of values that need to stay alive throughout the loop.

[1] An upcoming commit of mine will tighten the MachineVerifier to catch
    these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304048 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-pdbdump] pdb2yaml: add an -all option to dump everything we can
Bob Haarman [Fri, 26 May 2017 23:46:20 +0000 (23:46 +0000)]
[llvm-pdbdump] pdb2yaml: add an -all option to dump everything we can

Reviewers: amccarth, rnk, zturner

Reviewed By: zturner

Subscribers: fhahn, llvm-commits

Differential Revision: https://reviews.llvm.org/D33613

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304047 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoBitcode: Remove some dead code. Spotted by Teresa.
Peter Collingbourne [Fri, 26 May 2017 23:21:40 +0000 (23:21 +0000)]
Bitcode: Remove some dead code. Spotted by Teresa.

Differential Revision: https://reviews.llvm.org/D33609

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304046 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Push commuted op checks for and/or of icmp further down to avoid dupli...
Craig Topper [Fri, 26 May 2017 22:42:34 +0000 (22:42 +0000)]
[InstSimplify] Push commuted op checks for and/or of icmp further down to avoid duplicate work

Previously, we called simplifyPossiblyCastedAndOrOfICmps twice with the operands commuted, but the call to simplifyAndOrOfICmpsWithConstants further down already handles commuting and doesn't need to be called both ways.

This patch pushes double calls further down to just the individual routines that need to be called twice.

Differential Revision: https://reviews.llvm.org/D33603

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304044 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[bpf] disallow global_addr+off folding
Alexei Starovoitov [Fri, 26 May 2017 22:32:41 +0000 (22:32 +0000)]
[bpf] disallow global_addr+off folding

Wrong assembly code is generated for a simple program with
clang. If clang only produces IR and llc is used
for IR lowering and optimization, correct assembly
code is generated.

The main reason is that clang feeds default Reloc::Static
to llvm and llc feeds no RelocMode to llvm, where
for llc case, BPF backend picks up Reloc::PIC_ mode.
This leads different IR lowering behavior and clang
permits global_addr+off folding while llc doesn't.

This patch introduces isOffsetFoldingLegal function into
BPF backend and the function always return false.
This will make clang and llc behave the same for
the lowering.

Bug https://bugs.llvm.org//show_bug.cgi?id=33183
has more detailed explanation.

Signed-off-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304043 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix test broken by r304020
David Blaikie [Fri, 26 May 2017 22:11:18 +0000 (22:11 +0000)]
Fix test broken by r304020

It's a workaround because the test was flakey passing to begin with, but
it looks like (going off commit history) it really did want to test in
the presence of debug info, so keep that behavior (by adding something
to the CU so it's not dropped) & restore the flakey pass in the process.
(added a FIXME in case someone else decides to look at it later)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304042 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Mips] Placate GCC's -Wmisleading-indentation. NFCI.
Davide Italiano [Fri, 26 May 2017 21:56:19 +0000 (21:56 +0000)]
[Mips] Placate GCC's -Wmisleading-indentation. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304041 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[lib/LTO] Don't reinvent the code for switching linkage.
Davide Italiano [Fri, 26 May 2017 21:56:14 +0000 (21:56 +0000)]
[lib/LTO] Don't reinvent the code for switching linkage.

Differential Revision:  https://reviews.llvm.org/D33582

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304040 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLivePhysRegs: Rework constructor + documentation; NFC
Matthias Braun [Fri, 26 May 2017 21:51:00 +0000 (21:51 +0000)]
LivePhysRegs: Rework constructor + documentation; NFC

- Take reference instead of pointer to a TRI that cannot be nullptr.
- Improve documentation comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304038 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLivePhysRegs: Doxygen cleanup; NFC
Matthias Braun [Fri, 26 May 2017 21:50:54 +0000 (21:50 +0000)]
LivePhysRegs: Doxygen cleanup; NFC

- Remove unnecessary \brief
- @p -> \p
- Add \file and /// to introduction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304037 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLivePhysRegs: Add default for removeRegsInMask(Clobbers); NFC
Matthias Braun [Fri, 26 May 2017 21:50:51 +0000 (21:50 +0000)]
LivePhysRegs: Add default for removeRegsInMask(Clobbers); NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304036 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMachineVerifier: Remove unused set; NFC
Matthias Braun [Fri, 26 May 2017 21:50:48 +0000 (21:50 +0000)]
MachineVerifier: Remove unused set; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304035 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Cleanup of unused function isCalleeSaveReg (NFC)
Sumanth Gundapaneni [Fri, 26 May 2017 21:09:54 +0000 (21:09 +0000)]
[Hexagon] Cleanup of unused function isCalleeSaveReg (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304034 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoallow_user_segv_handler was already removed
Vitaly Buka [Fri, 26 May 2017 20:50:49 +0000 (20:50 +0000)]
allow_user_segv_handler was already removed

New default behavior matches previous allow_user_segv_handler=1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304032 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoResubmit r303859 with test fixed.
Konstantin Zhuravlyov [Fri, 26 May 2017 20:38:26 +0000 (20:38 +0000)]
Resubmit r303859 with test fixed.

[AMDGPU] add intrinsic for s_getpc

Summary: The s_getpc instruction is exposed as intrinsic llvm.amdgcn.s.getpc.

Patch by Tim Corringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304031 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake helper functions static. NFC.
Benjamin Kramer [Fri, 26 May 2017 20:09:00 +0000 (20:09 +0000)]
Make helper functions static. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304029 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix the ManagedStatic list ordering when using DynamicLibrary::addPermanentLibrary.
Frederich Munch [Fri, 26 May 2017 19:43:23 +0000 (19:43 +0000)]
Fix the ManagedStatic list ordering when using DynamicLibrary::addPermanentLibrary.

Summary:
r295737 included a fix for leaking libraries loaded via. DynamicLibrary::addPermanentLibrary.
This created a problem where static constructors in a library could insert llvm::ManagedStatic objects before DynamicLibrary would register it's own ManagedStatic, meaning a crash could occur at shutdown.

r301562 exasperated this problem by cleaning up the DynamicLibrary ManagedStatic during llvm_shutdown.

Reviewers: v.g.vassilev, lhames, efriedma

Reviewed By: efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33581

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304027 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Move a variable declaration to make simplifyAndOfICmps look more like...
Craig Topper [Fri, 26 May 2017 19:04:02 +0000 (19:04 +0000)]
[InstSimplify] Move a variable declaration to make simplifyAndOfICmps look more like simplifyOrOfICmps. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304023 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Use commutable matchers to shorten some code
Craig Topper [Fri, 26 May 2017 19:03:59 +0000 (19:03 +0000)]
[InstSimplify] Use commutable matchers to shorten some code

This code was replicated two additional times to handle commuted cases, but I think a commutable matcher can take care of it.

Differential Revision: https://reviews.llvm.org/D33585

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304022 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Use m_APInt instead of m_ConstantInt in ((V + N) & C1) | (V & C2)...
Craig Topper [Fri, 26 May 2017 19:03:53 +0000 (19:03 +0000)]
[InstSimplify] Use m_APInt instead of m_ConstantInt in ((V + N) & C1) | (V & C2) handling in order to support splat vectors.

The tests here are have operands commuted to provide more coverage. I also commuted one of the instructions in the scalar tests so the 4 tests cover the 4 commuted variations

Differential Revision: https://reviews.llvm.org/D33599

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304021 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDebugInfo: Do not emit empty CUs
David Blaikie [Fri, 26 May 2017 18:52:56 +0000 (18:52 +0000)]
DebugInfo: Do not emit empty CUs

Consistent with GCC and addresses a shortcoming with ThinLTO where many
imported CUs may end up being empty (because the functions imported from
them either ended up not being used (and were then discarded, since
they're imported as available_externally) or optimized away entirely).

Test cases previously testing empty CUs (either intentionally, or
because they didn't need anything more complicated) had a trivial 'int'
or similar basic type added to their retained types list.

This is a first order approximation - a deeper implementation could do
things like:

1) Be more lazy about construction of the CU - for example if two CUs
containing a single identical retained type are linked together, with
this change one of the two CUs will be produced but empty (since a
duplicate type won't be produced).

2) Go further and invert all the CU links the same way the subprogram
link is inverted - keep named CU lists of retained types, macros, etc,
and have those link back to the CU. Then if they're emitted, the CU is
emitted, but never otherwise - this would allow the metadata itself to
be dropped earlier too, though it seems unlikely that's an important
optimization as there shouldn't be many CUs relative to the number of
other entities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304020 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPMB: Run the whole-program-devirt pass during LTO at --lto-O0.
Peter Collingbourne [Fri, 26 May 2017 18:27:13 +0000 (18:27 +0000)]
PMB: Run the whole-program-devirt pass during LTO at --lto-O0.

The whole-program-devirt pass needs to run at -O0 because only it
knows about the llvm.type.checked.load intrinsic: it needs to both
lower the intrinsic itself and handle it in the summary.

Differential Revision: https://reviews.llvm.org/D33571

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304019 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Pass the DominatorTree, AssumptionCache, and context instruction to...
Craig Topper [Fri, 26 May 2017 18:23:57 +0000 (18:23 +0000)]
[InstCombine] Pass the DominatorTree, AssumptionCache, and context instruction to a few calls to isKnownPositive, isKnownNegative, and isKnownNonZero

Every other place in InstCombine that uses these methods in ValueTracking already pass this information. This makes the remaining sites consistent.

Differential Revision: https://reviews.llvm.org/D33567

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304018 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU][MC][GFX9] Corrected encoding of flat_scratch* for SDWA opcodes
Dmitry Preobrazhensky [Fri, 26 May 2017 18:01:29 +0000 (18:01 +0000)]
[AMDGPU][MC][GFX9] Corrected encoding of flat_scratch* for SDWA opcodes

See bug 33171: https://bugs.llvm.org/show_bug.cgi?id=33171

Reviewers: Sam Kolton

Differential Revision: https://reviews.llvm.org/D33553

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304015 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r304002 "[DWARF] - Make collectAddressRanges() return section index in additio...
George Rimar [Fri, 26 May 2017 17:36:23 +0000 (17:36 +0000)]
Revert r304002 "[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC"

Revert it again. Now another bot unhappy: http://lab.llvm.org:8011/builders/clang-s390x-linux/builds/8750

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304011 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Export the required symbol from DynamicLibraryTests"
Roger Ferrer Ibanez [Fri, 26 May 2017 17:08:49 +0000 (17:08 +0000)]
Revert "Export the required symbol from DynamicLibraryTests"

This breaks sanitizer-x86_64-linux-fast buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304005 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDebugInfo: Don't include locations for debug-having code inlined into nodebug functions
David Blaikie [Fri, 26 May 2017 17:05:15 +0000 (17:05 +0000)]
DebugInfo: Don't include locations for debug-having code inlined into nodebug functions

This produced 'strange' DWARF anyway - the CU would have no ranges (or
at least not a range including the inlined code) nor any subprogram or
inlined_subroutine - yet the line table would have entries for these
instructions.

(this actually becomes more relevant with changes coming after this,
where a CU without any contents will be omitted entirely - so there
would be no line table to put this on anyway)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304004 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/GlobalISel: Mark 32-bit float constants as legal
Tom Stellard [Fri, 26 May 2017 16:40:03 +0000 (16:40 +0000)]
AMDGPU/GlobalISel: Mark 32-bit float constants as legal

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D33212

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304003 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC
George Rimar [Fri, 26 May 2017 16:26:18 +0000 (16:26 +0000)]
[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC

This change is intended to use for LLD in D33183.
Problem we have in LLD when building .gdb_index is that we need to know section which address range belongs to.

Previously it was solved on LLD side by providing fake section addresses with use of llvm::LoadedObjectInfo
interface. We assigned file offsets as addressed. Then after obtaining ranges lists, for each range we had to find section ID's.
That not only was slow, but also complicated implementation and was the reason of incorrect behavior when
sections share the same offsets, like D33176 shows.

This patch makes DWARF parsers to return section index as well. That solves problem mentioned above.

Differential revision: https://reviews.llvm.org/D33184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304002 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI
Matthias Braun [Fri, 26 May 2017 16:23:08 +0000 (16:23 +0000)]
LivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI

Re-commit r303938 and r303954 with a fix for addLiveIns(): the internal
addPristines() function must be called on an empty set or it may
accidentally reset saved registers.

- addLiveOutsNoPristines() needs to add callee saved registers that are
  actually saved and restored somewhere to the set (they are not
  pristine).
- Cleanup/rewrite the code for addLiveOuts()/addLiveOutsNoPristines().

This fixes the problem from D32156.

Differential Revision: https://reviews.llvm.org/D32464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304001 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU] SDWA: add disassembler support for GFX9
Sam Kolton [Fri, 26 May 2017 15:52:00 +0000 (15:52 +0000)]
[AMDGPU] SDWA: add disassembler support for GFX9

Summary: Added decoder methods and tests

Reviewers: vpykhtin, artem.tamazov, dp

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D33545

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303999 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] use narrow vector ops to eliminate concat/extract (PR32790)
Sanjay Patel [Fri, 26 May 2017 15:33:18 +0000 (15:33 +0000)]
[DAGCombiner] use narrow vector ops to eliminate concat/extract (PR32790)

In the best case:
extract (binop (concat X1, X2), (concat Y1, Y2)), N --> binop XN, YN
...we kill all of the extract/concat and just have narrow binops remaining.

If only one of the binop operands is amenable, this transform is still
worthwhile because we kill some of the extract/concat.

Optional bitcasting makes the code more complicated, but there doesn't
seem to be a way to avoid that.

The TODO about extending to more than bitwise logic is there because we really
will regress several x86 tests including madd, psad, and even a plain
integer-multiply-by-2 or shift-left-by-1. I don't think there's anything
fundamentally wrong with this patch that would cause those regressions; those
folds are just missing or brittle.

If we extend to more binops, I found that this patch will fire on at least one
non-x86 regression test. There's an ARM NEON test in
test/CodeGen/ARM/coalesce-subregs.ll with a pattern like:

            t5: v2f32 = vector_shuffle<0,3> t2, t4
          t6: v1i64 = bitcast t5
          t8: v1i64 = BUILD_VECTOR Constant:i64<0>
        t9: v2i64 = concat_vectors t6, t8
      t10: v4f32 = bitcast t9
    t12: v4f32 = fmul t11, t10
  t13: v2i64 = bitcast t12
t16: v1i64 = extract_subvector t13, Constant:i32<0>

There was no functional change in the codegen from this transform from what I
could see though.

For the x86 test changes:

1. PR32790() is the closest call. We don't reduce the AVX1 instruction count in that case,
   but we improve throughput. Also, on a core like Jaguar that double-pumps 256-bit ops,
   there's an unseen win because two 128-bit ops have the same cost as the wider 256-bit op.
   SSE/AVX2/AXV512 are not affected which is expected because only AVX1 has the extract/concat
   ops to match the pattern.
2. do_not_use_256bit_op() is the best case. Everyone wins by avoiding the concat/extract.
   Related bug for IR filed as: https://bugs.llvm.org/show_bug.cgi?id=33026
3. The SSE diffs in vector-trunc-math.ll are just scheduling/RA, so nothing real AFAICT.
4. The AVX1 diffs in vector-tzcnt-256.ll are all the same pattern: we reduced the instruction
   count by one in each case by eliminating two insert/extract while adding one narrower logic op.

https://bugs.llvm.org/show_bug.cgi?id=32790

Differential Revision: https://reviews.llvm.org/D33137

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303997 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAG] Move legal type checks in store merge to be checked only
Nirav Dave [Fri, 26 May 2017 14:37:27 +0000 (14:37 +0000)]
[DAG] Move legal type checks in store merge to be checked only
on non-legal cases. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303994 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Fix lowering of misaligned memcpy/memset
John Brawn [Fri, 26 May 2017 13:59:12 +0000 (13:59 +0000)]
[ARM] Fix lowering of misaligned memcpy/memset

Currently getOptimalMemOpType returns i32 for large enough sizes without
checking for alignment, leading to poor code generation when misaligned accesses
aren't permitted as we generate a word store then later split it up into byte
stores. This means we inadvertantly go over the MaxStoresPerMemcpy limit and for
memset we splat the memset value into a word then immediately split it up
again.

Fix this by leaving it up to FindOptimalMemOpLowering to figure out which type
to use, but also fix a bug there where it wasn't correctly checking if
misaligned memory accesses are allowed.

Differential Revision: https://reviews.llvm.org/D33442

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303990 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agonits in wide-integer-cmp.ll . NFC
Amaury Sechet [Fri, 26 May 2017 13:56:54 +0000 (13:56 +0000)]
nits in wide-integer-cmp.ll . NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303989 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Add tests for 6-M memcpy/memset code generation
John Brawn [Fri, 26 May 2017 13:52:36 +0000 (13:52 +0000)]
[ARM] Add tests for 6-M memcpy/memset code generation

Differential Revision: https://reviews.llvm.org/D33495

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303987 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThe fix for PR22004: X86AsmParser.cpp asserts: OperandStack.size() > 1 && "Too few...
Andrew V. Tischenko [Fri, 26 May 2017 13:23:34 +0000 (13:23 +0000)]
The fix for PR22004: X86AsmParser.cpp asserts: OperandStack.size() > 1 && "Too few operands."

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303985 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[DWARF] - Make collectAddressRanges() return section index in addition to...
George Rimar [Fri, 26 May 2017 13:20:09 +0000 (13:20 +0000)]
Revert "[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC"

Broked BB again:

TEST 'LLVM :: DebugInfo/X86/dbg-value-regmask-clobber.ll' FAILED
...
LLVM ERROR: Section was outside of section table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303984 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRecommit r303978 "[DWARF] - Make collectAddressRanges() return section index in addit...
George Rimar [Fri, 26 May 2017 13:13:50 +0000 (13:13 +0000)]
Recommit r303978 "[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC"

With fix of test compilation.

Initial commit message:

This change is intended to use for LLD in D33183.
Problem we have in LLD when building .gdb_index is that we need to know section
which address range belongs to.

Previously it was solved on LLD side by providing fake section addresses
with use of llvm::LoadedObjectInfo interface. We assigned file offsets as addressed.
Then after obtaining ranges lists, for each range we had to find section ID's.
That not only was slow, but also complicated implementation and was the reason
of incorrect behavior when
sections share the same offsets, like D33176 shows.

This patch makes DWARF parsers to return section index as well.
That solves problem mentioned above.

Differential revision: https://reviews.llvm.org/D33184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303983 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r303978 "[DWARF] - Make collectAddressRanges() return section index in additio...
George Rimar [Fri, 26 May 2017 12:53:41 +0000 (12:53 +0000)]
Revert r303978 "[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC"

It failed BB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303981 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix signedness of constant. NFC.
Nirav Dave [Fri, 26 May 2017 12:53:10 +0000 (12:53 +0000)]
Fix signedness of constant. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303980 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoExport the required symbol from DynamicLibraryTests
Roger Ferrer Ibanez [Fri, 26 May 2017 12:51:12 +0000 (12:51 +0000)]
Export the required symbol from DynamicLibraryTests

Running unittests/Support/DynamicLibrary/DynamicLibraryTests fails when LLVM is
configured with LLVM_EXPORT_SYMBOLS_FOR_PLUGINS=ON, because the test's version
script only contains symbols extracted from the static libraries, that the test
links with, but not those from the main object/executable itself. The patch
explicitly exports the one symbol needed by the test.

This change fixes https://bugs.llvm.org/show_bug.cgi?id=32893

Patch authored by Momchil Velikov.

Differential Revision: https://reviews.llvm.org/D33490

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303979 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC
George Rimar [Fri, 26 May 2017 12:46:41 +0000 (12:46 +0000)]
[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC

This change is intended to use for LLD in D33183.
Problem we have in LLD when building .gdb_index is that we need to know section
which address range belongs to.

Previously it was solved on LLD side by providing fake section addresses
with use of llvm::LoadedObjectInfo interface. We assigned file offsets as addressed.
Then after obtaining ranges lists, for each range we had to find section ID's.
That not only was slow, but also complicated implementation and was the reason
of incorrect behavior when
sections share the same offsets, like D33176 shows.

This patch makes DWARF parsers to return section index as well.
That solves problem mentioned above.

Differential revision: https://reviews.llvm.org/D33184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303978 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unnecessary double-assignment triggering -Wsequence-point.
Daniel Jasper [Fri, 26 May 2017 12:07:12 +0000 (12:07 +0000)]
Remove unnecessary double-assignment triggering -Wsequence-point.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303974 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRe-enable "[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start"
Max Kazantsev [Fri, 26 May 2017 06:47:04 +0000 (06:47 +0000)]
Re-enable "[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start"

The patch rL303730 was reverted because test lsr-expand-quadratic.ll failed on
many non-X86 configs with this patch. The reason of this is that the patch
makes a correctless fix that changes optimizer's behavior for this test.
Without the change, LSR was making an overconfident simplification basing on a
wrong SCEV. Apparently it did not need the IV analysis to do this. With the
change, it chose a different way to simplify (that wasn't so confident), and
this way required the IV analysis. Now, following the right execution path,
LSR tries to make a transformation relying on IV Users analysis. This analysis
is target-dependent due to this code:

  // LSR is not APInt clean, do not touch integers bigger than 64-bits.
  // Also avoid creating IVs of non-native types. For example, we don't want a
  // 64-bit IV in 32-bit code just because the loop has one 64-bit cast.
  uint64_t Width = SE->getTypeSizeInBits(I->getType());
  if (Width > 64 || !DL.isLegalInteger(Width))
    return false;

To make a proper transformation in this test case, the type i32 needs to be
legal for the specified data layout. When the test runs on some non-X86
configuration (e.g. pure ARM 64), opt gets confused by the specified target
and does not use it, rejecting the specified data layout as well. Instead,
it uses some default layout that does not treat i32 as a legal type
(currently the layout that is used when it is not specified does not have
legal types at all). As result, the transformation we expect to happen does
not happen for this test.

This re-enabling patch does not have any source code changes compared to the
original patch rL303730. The only difference is that the failing test is
moved to X86 directory and now has requirement of running on x86 only to comply
with the specified target triple and data layout.

Differential Revision: https://reviews.llvm.org/D33543

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303971 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLivePhysRegs: Skip reserved regs in computeLiveIns; NFCI
Matthias Braun [Fri, 26 May 2017 06:32:31 +0000 (06:32 +0000)]
LivePhysRegs: Skip reserved regs in computeLiveIns; NFCI

Re-commit r303937 + r303949 as they were not the cause for the build
failures.

We do not track liveness of reserved registers so adding them to the
liveins list in computeLiveIns() was completely unnecessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303970 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert rL303923 since it broke the sanitizer bootstrap build bot.
Wei Mi [Fri, 26 May 2017 05:42:50 +0000 (05:42 +0000)]
Revert rL303923 since it broke the sanitizer bootstrap build bot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303969 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Use APInt::isMask isntead of manually implementing it. NFC
Craig Topper [Fri, 26 May 2017 05:16:22 +0000 (05:16 +0000)]
[InstSimplify] Use APInt::isMask isntead of manually implementing it. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303968 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Use m_ConstantInt matchers to short some code. NFC
Craig Topper [Fri, 26 May 2017 05:16:20 +0000 (05:16 +0000)]
[InstSimplify] Use m_ConstantInt matchers to short some code. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303967 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[IR] Add an iterator and range accessor for the PHI nodes of a basic
Chandler Carruth [Fri, 26 May 2017 03:10:00 +0000 (03:10 +0000)]
[IR] Add an iterator and range accessor for the PHI nodes of a basic
block.

This allows writing much more natural and readable range based for loops
directly over the PHI nodes. It also takes advantage of the same tricks
for terminating the sequence as the hand coded versions.

I've replaced one example of this mostly to showcase the difference and
I've added a unit test to make sure the facilities really work the way
they're intended. I want to use this inside of SimpleLoopUnswitch but it
seems generally nice.

Differential Revision: https://reviews.llvm.org/D33533

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303964 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "LivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI"
Matthias Braun [Fri, 26 May 2017 02:25:20 +0000 (02:25 +0000)]
Revert "LivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI"

Tentatively revert this to see if it fixes the buildbot stage2
breakages.

This reverts commit r303938.
This reverts commit r303954.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303960 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "LivePhysRegs: Skip reserved regs in computeLiveIns; NFCI"
Matthias Braun [Fri, 26 May 2017 01:29:32 +0000 (01:29 +0000)]
Revert "LivePhysRegs: Skip reserved regs in computeLiveIns; NFCI"

Tentatively revert, suspecting that it caused breakage in stage2
buildbots.

This reverts commit r303949.
This reverts commit r303937.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303955 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTest for r303938
Matthias Braun [Fri, 26 May 2017 01:29:25 +0000 (01:29 +0000)]
Test for r303938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303954 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM] Enable the new simple loop unswitch pass in the new pass manager
Chandler Carruth [Fri, 26 May 2017 01:24:11 +0000 (01:24 +0000)]
[PM] Enable the new simple loop unswitch pass in the new pass manager
(where it is the only realistic option).

This passes the LLVM test suite for me, but I'm clearly still hammering
on this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303952 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTidy up RelocVisitor.h.
Rui Ueyama [Fri, 26 May 2017 00:58:21 +0000 (00:58 +0000)]
Tidy up RelocVisitor.h.

Summary:
RelocVisitor had too many, too small functions. This patch group them
by architecture rather than each relocation type.

Reviewers: grimar, dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33580

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303950 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLivePhysRegs: Follow-up to r303937
Matthias Braun [Fri, 26 May 2017 00:54:24 +0000 (00:54 +0000)]
LivePhysRegs: Follow-up to r303937

We may have situations in which a superregister is reserved and not
added to liveins, so we have to add the subregisters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303949 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-pdbdump] Don't crash when displaying padding.
Zachary Turner [Fri, 26 May 2017 00:15:15 +0000 (00:15 +0000)]
[llvm-pdbdump] Don't crash when displaying padding.

We have a lot of complicated logic to determine where padding
is in a record, and the debug info doesn't always provide enough
information to figure it out with laser precision.  In this case
we were putting the padding in the wrong place causing an
out of bounds access on a BitVector.

Right now we decide that any trailing padding of a child type
will be truncated during record layout, but this is only true
insofar as the class still is sized properly to end on an
alignment boundary, which the algorithm doesn't yet know about.

For now, just don't crash, even though we display padding twice
in this case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303946 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Examples] Fix some Clang-tidy modernize-use-using and Include What You Use warnings...
Eugene Zelenko [Fri, 26 May 2017 00:00:14 +0000 (00:00 +0000)]
[Examples] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303944 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReturn a lit.Test.Result object from TestRunner's executeShTest()
Dimitry Andric [Thu, 25 May 2017 23:56:44 +0000 (23:56 +0000)]
Return a lit.Test.Result object from TestRunner's executeShTest()

Summary:
For various clang analyzer tests, which were unsupported, I got lit
exceptions, similar to the following:

    Exception during script execution:
    Traceback (most recent call last):
      File "utils/lit/lit/run.py", line 190, in execute_test
        result = test.config.test_format.execute(test, lit_config)
      File "tools/clang/test/Analysis/analyzer_test.py", line 11, in execute
        if result.code == lit.Test.FAIL:
    AttributeError: 'tuple' object has no attribute 'code'

This is because executeShTest() in utils/lit/lit/TestRunner.py is
supposed to return a lit.Test.Result object, but in case of unsupported
tests, it returns a plain tuple.

Fix this by returning a properly initialized lit.Test.Result object
instead.

Reviewers: rnk, rafael, modocache

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33579

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303943 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused member.
Zachary Turner [Thu, 25 May 2017 23:47:56 +0000 (23:47 +0000)]
Remove unused member.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303942 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PPC] Add text for assert.
Tim Shen [Thu, 25 May 2017 23:40:46 +0000 (23:40 +0000)]
[PPC] Add text for assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303940 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLTO: Do summary-based prevailing symbol resolution at --lto-O0.
Peter Collingbourne [Thu, 25 May 2017 23:40:11 +0000 (23:40 +0000)]
LTO: Do summary-based prevailing symbol resolution at --lto-O0.

Prevailing symbol resolution is necessary for correctness. Without
this we can end up dropping a referenced linkonce symbol from the link.

Differential Revision: https://reviews.llvm.org/D33570

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303939 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI
Matthias Braun [Thu, 25 May 2017 23:39:40 +0000 (23:39 +0000)]
LivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI

- addLiveOutsNoPristines() needs to add callee saved registers that are
  actually saved and restored somewhere to the set (they are not
  pristine).
- Cleanup/rewrite the code for addLiveOuts()/addLiveOutsNoPristines().

This fixes the problem from D32156.

Differential Revision: https://reviews.llvm.org/D32464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303938 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLivePhysRegs: Skip reserved regs in computeLiveIns; NFCI
Matthias Braun [Thu, 25 May 2017 23:39:33 +0000 (23:39 +0000)]
LivePhysRegs: Skip reserved regs in computeLiveIns; NFCI

We do not track liveness of reserved registers so adding them to the
liveins list in computeLiveIns() was completely unnecessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303937 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CV Type Merging] Find nested type indices faster.
Zachary Turner [Thu, 25 May 2017 23:36:16 +0000 (23:36 +0000)]
[CV Type Merging] Find nested type indices faster.

Merging two type streams is one of the most time consuming
parts of generating a PDB, and as such it needs to be as
fast as possible.  The visitor abstractions used for interoperating
nicely with many different types of inputs and outputs have
been used widely and help greatly for testability and implementing
tools, but the abstractions build up and get in the way of
performance.

This patch removes all of the visitation stuff from the type
stream merger, essentially re-inventing the leaf / member switch
and loop, but at a very low level.  This allows us many other
optimizations, such as not actually deserializing *any* records
(even member records which don't describe their own length), as
the operation of "figure out how long this record is" is somewhat
faster than "figure out how long this record *and* get all its
fields out".  Furthermore, whereas before we had to deserialize,
re-write type indices, then re-serialize, now we don't have to
do any of those 3 steps.  We just find out where the type indices
are and pull them directly out of the byte stream and re-write
them.

This is worth a 50-60% performance increase.  On top of all other
optimizations that have been applied this week, I now get the
following numbers when linking lld.exe and lld.pdb

MSVC: 25.67s
Before This Patch: 18.59s
After This Patch: 8.92s

So this is a huge performance win.

Differential Revision: https://reviews.llvm.org/D33564

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303935 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDebugInfo: Simplify scopes+subprogram handling since the subprogram<>cu link inversion
David Blaikie [Thu, 25 May 2017 23:11:28 +0000 (23:11 +0000)]
DebugInfo: Simplify scopes+subprogram handling since the subprogram<>cu link inversion

Previously this code was defensive to the situation in which the debug
info scopes would lead to a different subprogram from the subprogram in
the CU's subprogram list (this could've happened with linkonce
functions, etc as per the comment being removed). Since the CU<>SP link
reversal this is no longer possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303933 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PPC] Fix atomics lowering in DAG lowering.
Tim Shen [Thu, 25 May 2017 22:58:35 +0000 (22:58 +0000)]
[PPC] Fix atomics lowering in DAG lowering.

I forgot to forward the chain, causing some missing instruction
dependencies. The test crashes the compiler without this patch.

Inspired by the test case, D33519 also tries to remove the extra sync.

Differential Revision: https://reviews.llvm.org/D33573

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303931 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix test to handle running on platforms which don't enable pubnames at all
David Blaikie [Thu, 25 May 2017 22:10:51 +0000 (22:10 +0000)]
Fix test to handle running on platforms which don't enable pubnames at all

Check that there are no entries in the pub sections, but that they may
either be not present or present-but-empty.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303927 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Add an InstCombine specific wrapper around isKnownToBeAPowerOfTwo to...
Craig Topper [Thu, 25 May 2017 21:51:12 +0000 (21:51 +0000)]
[InstCombine] Add an InstCombine specific wrapper around isKnownToBeAPowerOfTwo to shorten code. NFC

We have wrappers for several other ValueTracking methods that take care of passing all of the analysis and assumption cache parameters. This extends it to isKnownToBeAPowerOfTwo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303924 91177308-0d34-0410-b5e6-96231b3b80d8