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8 years agoRevert "[GVN/PRE] Hoist global values outside of loops."
Davide Italiano [Fri, 21 Oct 2016 01:37:02 +0000 (01:37 +0000)]
Revert "[GVN/PRE] Hoist global values outside of loops."

There's no agreement about this patch. I personally find the
PRE machinery of the current GVN hard enough to reason about
that I'm not sure I'll try to land this again, instead of working
on the rewrite).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284796 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix cross-endianness RuntimeDyld relocation for ARM
Keno Fischer [Thu, 20 Oct 2016 22:15:56 +0000 (22:15 +0000)]
Fix cross-endianness RuntimeDyld relocation for ARM

rL284780 fixed the PREL31 relocation and added a test for it. Being
the first such test for ARM relocations, it exposed incorrect endianness
assumptions (causing buildbot failures on big-endian hosts). Fix that by
using the same helpers used for the x86 case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284789 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV
Li Huang [Thu, 20 Oct 2016 21:38:39 +0000 (21:38 +0000)]
[SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV

This is to avoid inlining too many multiplication operands into a SCEV, which could
take exponential time in the worst case.

Reviewers: Sanjoy Das, Mehdi Amini, Michael Zolotukhin

Differential Revision: https://reviews.llvm.org/D25794

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284784 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix PREL31 relocation on ARM
Keno Fischer [Thu, 20 Oct 2016 21:15:29 +0000 (21:15 +0000)]
Fix PREL31 relocation on ARM

Summary:
This is a 31bits relative relocation instead of a 32bits absolute relocation.

Reviewers: t.p.northover, peter.smith, rengolin

Subscribers: aemerson, llvm-commits, samparker

Differential Revision: https://reviews.llvm.org/D25069

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284780 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86] Enable interleaved memory access by default
Michael Kuperstein [Thu, 20 Oct 2016 21:04:31 +0000 (21:04 +0000)]
[X86] Enable interleaved memory access by default

This lets the loop vectorizer generate interleaved memory accesses on x86.

Differential Revision: https://reviews.llvm.org/D25350

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284779 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[MSSA] Avoid unnecessary use walks when calling getClobberingMemoryAccess
Daniel Berlin [Thu, 20 Oct 2016 20:13:45 +0000 (20:13 +0000)]
[MSSA] Avoid unnecessary use walks when calling getClobberingMemoryAccess

Summary:
This allows us to mark when uses have been optimized.
This lets us avoid rewalking (IE when people call getClobberingAccess on everything), and also
enables us to later relax the requirement of use optimization during updates with less cost.

Reviewers: george.burgess.iv

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25172

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284771 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAnother additional error check for invalid Mach-O files for the
Kevin Enderby [Thu, 20 Oct 2016 20:10:30 +0000 (20:10 +0000)]
Another additional error check for invalid Mach-O files for the
load commands that use the MachO::twolevel_hints_command type
which includes only the LC_TWOLEVEL_HINTS load command.

This is not used in llvm libObject code or in llvm tool code.  But
does appear in one of the binary test files.  While this load command is
obsolete it is easier to add code for it in libObject than edit or change
the binary test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284769 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix case of file include path.
Zachary Turner [Thu, 20 Oct 2016 18:34:37 +0000 (18:34 +0000)]
Fix case of file include path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284763 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CodeView] Refactor serialization to use StreamInterface.
Zachary Turner [Thu, 20 Oct 2016 18:31:19 +0000 (18:31 +0000)]
[CodeView] Refactor serialization to use StreamInterface.

This was all using ArrayRef<>s before which presents a problem
when you want to serialize to or deserialize from an actual
PDB stream.  An ArrayRef<> is really just a special case of
what can be handled with StreamInterface though (e.g. by using
a ByteStream), so changing this to use StreamInterface allows
us to plug in a PDB stream and get all the record serialization
and deserialization for free on a MappedBlockStream.

Subsequent patches will try to remove TypeTableBuilder and
TypeRecordBuilder in favor of class that operate on
Streams as well, which should allow us to completely merge
the reading and writing codepaths for both types and symbols.

Differential Revision: https://reviews.llvm.org/D25831

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284762 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AMDGPU] Make note record name a static const member of target streamer
Konstantin Zhuravlyov [Thu, 20 Oct 2016 18:22:36 +0000 (18:22 +0000)]
[AMDGPU] Make note record name a static const member of target streamer

Differential Revision: https://reviews.llvm.org/D25746

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284760 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AMDGPU] Emit constant address space data in .rodata section and use relocations...
Konstantin Zhuravlyov [Thu, 20 Oct 2016 18:12:38 +0000 (18:12 +0000)]
[AMDGPU] Emit constant address space data in .rodata section and use relocations instead of fixups (amdhsa only)

Differential Revision: https://reviews.llvm.org/D25693

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284759 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUsing branch probability to guide critical edge splitting.
Dehao Chen [Thu, 20 Oct 2016 18:06:52 +0000 (18:06 +0000)]
Using branch probability to guide critical edge splitting.

Summary:
The original heuristic to break critical edge during machine sink is relatively conservertive: when there is only one instruction sinkable to the critical edge, it is likely that the machine sink pass will not break the critical edge. This leads to many speculative instructions executed at runtime. However, with profile info, we could model the splitting benefits: if the critical edge has 50% taken rate, it would always be beneficial to split the critical edge to avoid the speculated runtime instructions. This patch uses profile to guide critical edge splitting in machine sink pass.

The performance impact on speccpu2006 on Intel sandybridge machines:

spec/2006/fp/C++/444.namd                  25.3  +0.26%
spec/2006/fp/C++/447.dealII               45.96  -0.10%
spec/2006/fp/C++/450.soplex               41.97  +1.49%
spec/2006/fp/C++/453.povray               36.83  -0.96%
spec/2006/fp/C/433.milc                   23.81  +0.32%
spec/2006/fp/C/470.lbm                    41.17  +0.34%
spec/2006/fp/C/482.sphinx3                48.13  +0.69%
spec/2006/int/C++/471.omnetpp             22.45  +3.25%
spec/2006/int/C++/473.astar               21.35  -2.06%
spec/2006/int/C++/483.xalancbmk           36.02  -2.39%
spec/2006/int/C/400.perlbench              33.7  -0.17%
spec/2006/int/C/401.bzip2                  22.9  +0.52%
spec/2006/int/C/403.gcc                   32.42  -0.54%
spec/2006/int/C/429.mcf                   39.59  +0.19%
spec/2006/int/C/445.gobmk                 26.98  -0.00%
spec/2006/int/C/456.hmmer                 24.52  -0.18%
spec/2006/int/C/458.sjeng                 28.26  +0.02%
spec/2006/int/C/462.libquantum            55.44  +3.74%
spec/2006/int/C/464.h264ref               46.67  -0.39%

geometric mean                                   +0.20%

Manually checked 473 and 471 to verify the diff is in the noise range.

Reviewers: rengolin, davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D24818

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284757 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv uniformconst costs for 256/512 bit integ...
Simon Pilgrim [Thu, 20 Oct 2016 18:00:35 +0000 (18:00 +0000)]
[CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv uniformconst costs for 256/512 bit integer vectors

We weren't checking for uniform const costs before the general cost, resulting in very high estimates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284755 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix *_EXTEND_VECTOR_INREG legalization
Pirama Arumuga Nainar [Thu, 20 Oct 2016 17:56:36 +0000 (17:56 +0000)]
Fix *_EXTEND_VECTOR_INREG legalization

Summary:
While promoting *_EXTEND_VECTOR_INREG nodes whose inputs are already
promoted, perform the appropriate sign extension for the promoted node
before doing the *_EXTEND_VECTOR_INREG operation.  If not, the undefined
high-order bits of the promoted operand may (a) be garbage inc ase of
zext) or (b) contribute the wrong sign-bit (in case of sext)

Updated the promote-vec3.ll test after this change.  The diff shows
explicit zeroing in case of zext and intermediate sign extension in case
of sext.

Reviewers: RKSimon

Subscribers: llvm-commits, srhines

Differential Revision: https://reviews.llvm.org/D25790

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284752 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CostModel][X86] Added tests for sdiv/udiv costs for uniform const and uniform const...
Simon Pilgrim [Thu, 20 Oct 2016 17:16:38 +0000 (17:16 +0000)]
[CostModel][X86] Added tests for sdiv/udiv costs for uniform const and uniform const power-of-2

Shows poor costings in AVX1/AVX512BW for certain vector types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284748 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Target] remove TargetRecip class; 2nd try
Sanjay Patel [Thu, 20 Oct 2016 16:55:45 +0000 (16:55 +0000)]
[Target] remove TargetRecip class; 2nd try

This is a retry of r284495 which was reverted at r284513 due to use-after-scope bugs
caused by faulty usage of StringRef.

This version also renames a pair of functions:
getRecipEstimateDivEnabled()
getRecipEstimateSqrtEnabled()
as suggested by Eric Christopher.

original commit msg:

[Target] remove TargetRecip class; move reciprocal estimate isel functionality to TargetLowering

This is a follow-up to https://reviews.llvm.org/D24816 - where we changed reciprocal estimates to be function attributes
rather than TargetOptions.

This patch is intended to be a structural, but not functional change. By moving all of the
TargetRecip functionality into TargetLowering, we can remove all of the reciprocal estimate
state, shield the callers from the string format implementation, and simplify/localize the
logic needed for a target to enable this.

If a function has a "reciprocal-estimates" attribute, those settings may override the target's
default reciprocal preferences for whatever operation and data type we're trying to optimize.
If there's no attribute string or specific setting for the op/type pair, just use the target
default settings.

As noted earlier, a better solution would be to move the reciprocal estimate settings to IR
instructions and SDNodes rather than function attributes, but that's a multi-step job that
requires infrastructure improvements. I intend to work on that, but it's not clear how long
it will take to get all the pieces in place.

Differential Revision: https://reviews.llvm.org/D25440

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284746 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoPut the move ctor for PassManager back for now, it breaks some builds.
Benjamin Kramer [Thu, 20 Oct 2016 16:50:07 +0000 (16:50 +0000)]
Put the move ctor for PassManager back for now, it breaks some builds.

For some reason using the default move ctor creates undefined references
to it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284745 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv general costs for 256/512 bit integer...
Simon Pilgrim [Thu, 20 Oct 2016 16:39:11 +0000 (16:39 +0000)]
[CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv general costs for 256/512 bit integer vectors

We weren't accounting for legal types on every subtarget, meaning that many of the costs were using defaults.

We still don't correctly cost (or test) the 512-bit sdiv/udiv by uniform const cases, nor the power-of-2 cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284744 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AMDGPU] add fcopysign(f64, f32) pattern
Valery Pykhtin [Thu, 20 Oct 2016 16:17:54 +0000 (16:17 +0000)]
[AMDGPU] add fcopysign(f64, f32) pattern

Differential revision: https://reviews.llvm.org/D25827

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284743 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Support] Put back the MSVC hack for AlignedCharArray.
Benjamin Kramer [Thu, 20 Oct 2016 15:53:04 +0000 (15:53 +0000)]
[Support] Put back the MSVC hack for AlignedCharArray.

MSVC 2015 still errors when passing an alignas'd object by value as an
argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284738 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Support] Remove llvm::alignOf now that all uses are gone.
Benjamin Kramer [Thu, 20 Oct 2016 15:36:38 +0000 (15:36 +0000)]
[Support] Remove llvm::alignOf now that all uses are gone.

Also clean up the legacy hacks for AlignedCharArray. I'm keeping
LLVM_ALIGNAS alive for a bit longer because GCC 4.8.0 (which we still
support apparently) shipped a buggy alignas(). All other supported
compilers have a working alignas.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284736 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRetire llvm::alignOf in favor of C++11 alignof.
Benjamin Kramer [Thu, 20 Oct 2016 15:02:18 +0000 (15:02 +0000)]
Retire llvm::alignOf in favor of C++11 alignof.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284733 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GVN] Use defaulted members. No functional change.
Benjamin Kramer [Thu, 20 Oct 2016 13:09:12 +0000 (13:09 +0000)]
[GVN] Use defaulted members. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284726 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[mips][mcjit] Add the majority of N32 support.
Simon Dardis [Thu, 20 Oct 2016 13:02:23 +0000 (13:02 +0000)]
[mips][mcjit] Add the majority of N32 support.

The missing piece is relocation composition for %hi(%neg(%gp_rel(x))) and
similar.

Patch by: Daniel Sanders

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284724 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CostModel][X86] Added tests for sdiv/udiv costs for scalar and 128/256/512 bit integ...
Simon Pilgrim [Thu, 20 Oct 2016 12:34:00 +0000 (12:34 +0000)]
[CostModel][X86] Added tests for sdiv/udiv costs for scalar and 128/256/512 bit integer vectors

Shows current bug in AVX1/AVX512BW costs for 256 bit vector types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284723 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDo a sweep over move ctors and remove those that are identical to the default.
Benjamin Kramer [Thu, 20 Oct 2016 12:20:28 +0000 (12:20 +0000)]
Do a sweep over move ctors and remove those that are identical to the default.

All of these existed because MSVC 2013 was unable to synthesize default
move ctors. We recently dropped support for it so all that error-prone
boilerplate can go.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284721 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoReapply "Add Chrono.h - std::chrono support header"
Pavel Labath [Thu, 20 Oct 2016 12:05:50 +0000 (12:05 +0000)]
Reapply "Add Chrono.h - std::chrono support header"

This is a resubmission of r284590. The mingw build should be fixed now. The
problem was we were matching time_t with _localtime_64s, which was incorrect on
_USE_32BIT_TIME_T systems. Instead I use localtime_s, which should always
evaluate to the correct function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284720 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAGCombiner] Add general constant vector support to (srl (shl x, c), c) -> (and...
Simon Pilgrim [Thu, 20 Oct 2016 11:10:21 +0000 (11:10 +0000)]
[DAGCombiner] Add general constant vector support to (srl (shl x, c), c) -> (and x, cst2)

We already supported scalar constant / splatted constant vector - now accepts any (non opaque) constant scalar / vector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284717 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoWdocumentation fix
Simon Pilgrim [Thu, 20 Oct 2016 10:53:38 +0000 (10:53 +0000)]
Wdocumentation fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284715 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix spelling mistake in comment.
Simon Pilgrim [Thu, 20 Oct 2016 10:42:14 +0000 (10:42 +0000)]
Fix spelling mistake in comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284714 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix MSVC bool -> uint64_t promotion warning
Simon Pilgrim [Thu, 20 Oct 2016 10:37:58 +0000 (10:37 +0000)]
Fix MSVC bool -> uint64_t promotion warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284713 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Go bindings] Update for r284678 API changes.
Benjamin Kramer [Thu, 20 Oct 2016 09:14:39 +0000 (09:14 +0000)]
[Go bindings] Update for r284678 API changes.

Alignment moved from createBasicType to createAutoVariable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284707 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SystemZ] Post-RA scheduler implementation
Jonas Paulsson [Thu, 20 Oct 2016 08:27:16 +0000 (08:27 +0000)]
[SystemZ] Post-RA scheduler implementation

Post-RA sched strategy and scheduling instruction annotations for z196, zEC12
and z13.

This scheduler optimizes decoder grouping and balances processor resources
(including side steering the FPd unit instructions).

The SystemZHazardRecognizer keeps track of the scheduling state, which can
be dumped with -debug-only=misched.

Reviers: Ulrich Weigand, Andrew Trick.
https://reviews.llvm.org/D17260

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284704 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Object/ELF] - Check index argument in getSymbol().
George Rimar [Thu, 20 Oct 2016 08:03:10 +0000 (08:03 +0000)]
[Object/ELF] - Check index argument in getSymbol().

Without this check LLD crashes when SHT_GROUP section has invalid symbol index
because of next code:

template <class ELFT>
StringRef elf::ObjectFile<ELFT>::getShtGroupSignature(const Elf_Shdr &Sec) {
..
  const Elf_Sym *Sym = Obj.getSymbol(Symtab, Sec.sh_info);
..
}
If sh_info is too large, &Symbols[Index] just asserts.

No testcases provided because llvm-objdump/llvm-readelf does
not use getSymbol() function.

I`ll commit testcase for LLD separatelly.

Differential revision: https://reviews.llvm.org/D25516

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284702 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoX86: Allow expressions to appear as u8imm operands.
Peter Collingbourne [Thu, 20 Oct 2016 01:58:34 +0000 (01:58 +0000)]
X86: Allow expressions to appear as u8imm operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284688 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoX86: Deduplicate some lowering code. NFCI.
Peter Collingbourne [Thu, 20 Oct 2016 01:21:26 +0000 (01:21 +0000)]
X86: Deduplicate some lowering code. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284686 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDebugInfo: remove broken bitcode upgrade test
Victor Leschuk [Thu, 20 Oct 2016 00:26:36 +0000 (00:26 +0000)]
DebugInfo: remove broken bitcode upgrade test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284682 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUse __func__ directly now that all supported compilers support it
Reid Kleckner [Thu, 20 Oct 2016 00:22:23 +0000 (00:22 +0000)]
Use __func__ directly now that all supported compilers support it

Remove the portability macro now that it is unused.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284681 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDebugInfo: preparation to implement DW_AT_alignment
Victor Leschuk [Thu, 20 Oct 2016 00:13:12 +0000 (00:13 +0000)]
DebugInfo: preparation to implement DW_AT_alignment

 - Add alignment attribute to DIVariable family
 - Modify bitcode format to match new DIVariable representation
 - Update tests to match these changes (also add bitcode upgrade test)
 - Expect that frontend passes non-zero align value only when it is not default
   (was forcibly aligned by alignas()/_Alignas()/__atribute__(aligned())

Differential Revision: https://reviews.llvm.org/D25073

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284678 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WebAssembly] Update extending load test for new i1 behavior
Derek Schuff [Thu, 20 Oct 2016 00:10:34 +0000 (00:10 +0000)]
[WebAssembly] Update extending load test for new i1 behavior

r284611 changed the behavior of the DAG legalizer for sign-extending i1
values. Update the wasm extending load test to match.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284677 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove LLVM_NOEXCEPT and replace it with noexcept
Reid Kleckner [Wed, 19 Oct 2016 23:52:38 +0000 (23:52 +0000)]
Remove LLVM_NOEXCEPT and replace it with noexcept

Now that we have dropped MSVC 2013, all supported compilers support
noexcept and we can drop this portability macro.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284672 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoNext set of additional error checks for invalid Mach-O files for the
Kevin Enderby [Wed, 19 Oct 2016 23:44:34 +0000 (23:44 +0000)]
Next set of additional error checks for invalid Mach-O files for the
load commands that use the MachO::thread_command type
but are not used in llvm libObject code but used in llvm tool code.

This includes the LC_UNIXTHREAD and LC_THREAD
load commands.

A quick note about the philosophy of the error checking in
libObject for Mach-O files, the idea behind the checking is
that we never will return a Mach-O file out of libObject that
contains unknown things in the load commands.

To do this the 32-bit ARM and PPC general tread states
needed to be defined as two test case binaries contained
them.  If other thread states for other CPUs need to be
added we will do that as needed.

Going forward the LC_MAIN load command is used to
set the entry point in Mach-O executables these days
instead of an LC_UNIXTHREAD as was done in the past.
So today only in core files are LC_THREAD load commands
and thread states usually found.

Other thread states have not yet been defined in
include/Support/MachO.h at this time.  But that can be
added as needed with their corresponding checking also
added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284668 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUpdate Compiler.h to fail fast when building with MSVC 2013
Reid Kleckner [Wed, 19 Oct 2016 23:34:58 +0000 (23:34 +0000)]
Update Compiler.h to fail fast when building with MSVC 2013

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284665 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PGO] Fix a use-after-move. NFC.
Rong Xu [Wed, 19 Oct 2016 23:31:59 +0000 (23:31 +0000)]
[PGO] Fix a use-after-move. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284664 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "DenseSet: Appease msc18 to define derived constructors explicitly."
Reid Kleckner [Wed, 19 Oct 2016 23:04:57 +0000 (23:04 +0000)]
Revert "DenseSet: Appease msc18 to define derived constructors explicitly."

This reverts commit r284570. MSVC 18 / 2013 is not supported anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284661 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUpdate docs to reflect new minimum MSVC version requirement
Reid Kleckner [Wed, 19 Oct 2016 23:04:41 +0000 (23:04 +0000)]
Update docs to reflect new minimum MSVC version requirement

Mailing list discussion about this:
http://lists.llvm.org/pipermail/llvm-dev/2016-September/104631.html

Code changes to simplify the ifdefs will come next, and can be reverted
without affecting the policy if someone needs it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284660 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PGO] Fix bogus warning for merging empty llvm profile file
Rong Xu [Wed, 19 Oct 2016 22:51:17 +0000 (22:51 +0000)]
[PGO] Fix bogus warning for merging empty llvm profile file

Profile runtime can generate an empty raw profile (when there is no function in
the shared library). This empty profile is treated as a text format profile.  A
test format profile without the flag of "#IR" is thought to be a clang
generated profile.  So in llvm profile merging, we will get a bogus warning of
"Merge IR generated profile with Clang generated profile."

The fix here is to skip the empty profile (when the buffer size is 0) for
profile merge.

Reviewers: vsk, davidxl

Differential Revision: http://reviews.llvm.org/D25687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284659 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[BuildingAJIT] Use the remote target triple to construct the TargetMachine in
Lang Hames [Wed, 19 Oct 2016 22:41:03 +0000 (22:41 +0000)]
[BuildingAJIT] Use the remote target triple to construct the TargetMachine in
Chapter 5.

Chapter 5 demonstrates remote JITing: code is executed on the remote, not the
machine running the REPL, so it's the remote's triple (and TargetMachine) that
we need.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284657 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd computeHostNumPhysicalCores() implementation for Darwin
Mehdi Amini [Wed, 19 Oct 2016 22:36:07 +0000 (22:36 +0000)]
Add computeHostNumPhysicalCores() implementation for Darwin

Differential Revision: https://reviews.llvm.org/D25800

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284656 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU : Add a function to enable and disable IEEEBit for SC and shader
Wei Ding [Wed, 19 Oct 2016 22:34:49 +0000 (22:34 +0000)]
AMDGPU : Add a function to enable and disable IEEEBit for SC and shader
respectively.

Differential Revision: http://reviews.llvm.org/D25789

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284655 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove the JIT EH/small code model tests for now.
Lang Hames [Wed, 19 Oct 2016 22:19:38 +0000 (22:19 +0000)]
Remove the JIT EH/small code model tests for now.

These tests rely on two sections being allocated with a limited displacement
from one to the other to work. We've never guaranteed this, and consequently
these tests usually fail. That led to them being XFAILed, but now they XPASS
whenever the sections do happen to be allocated nearby in memory. So I'm
removing these for now to get rid of the noise. We can re-instate them if/when
we take the time to implement a displacement-respecting allocator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284654 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CMake] Make the runtimes directory work with bootstrap builds
Chris Bieneman [Wed, 19 Oct 2016 21:50:25 +0000 (21:50 +0000)]
[CMake] Make the runtimes directory work with bootstrap builds

This patch builds on clang r284648, and allows the runtime directory to make the bootstrap builds depend on the builtin libraries.

This patch also make the bootstrap build depend on configuring the other runtimes because the libcxx headers are copied during configuration. I have left a TODO in the code to remove that once I come up with a better solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284650 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[InstSimplify] fold negation of sign-bit
Sanjay Patel [Wed, 19 Oct 2016 21:23:45 +0000 (21:23 +0000)]
[InstSimplify] fold negation of sign-bit

0 - X --> X, if X is 0 or the minimum signed value
0 - X --> 0, if X is 0 or the minimum signed value and the sub is NSW

I noticed this pattern might be created in the backend after the change from D25485,
so we'll want to add a similar fold for the DAG.

The use of computeKnownBits in InstSimplify may be something to investigate if the
compile time of InstSimplify is noticeable. We could replace computeKnownBits with
specific pattern matchers or limit the recursion.

Differential Revision: https://reviews.llvm.org/D25785

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284649 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[BuildingAJIT] Make the chapter 5 server export symbols.
Lang Hames [Wed, 19 Oct 2016 20:22:12 +0000 (20:22 +0000)]
[BuildingAJIT] Make the chapter 5 server export symbols.

This will allow chapter 5 to work on Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284637 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTypo: nomed struct -> named struct
Hans Wennborg [Wed, 19 Oct 2016 20:10:03 +0000 (20:10 +0000)]
Typo: nomed struct -> named struct

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284635 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[GlobalMerge] Handle non-landingpad EH pads
Reid Kleckner [Wed, 19 Oct 2016 19:56:22 +0000 (19:56 +0000)]
[GlobalMerge] Handle non-landingpad EH pads

This code crashed on funclet-style EH instructions such as catchpad,
catchswitch, and cleanuppad. Just treat all EH pad instructions
equivalently and avoid merging the globals they reference through any
use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284633 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IndVarSimplify] Teach calculatePostIncRange to take guards into account
Artur Pilipenko [Wed, 19 Oct 2016 19:43:54 +0000 (19:43 +0000)]
[IndVarSimplify] Teach calculatePostIncRange to take guards into account

Reviewed By: sanjoy

Differential Revision: https://reviews.llvm.org/D25739

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284632 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LV] Avoid emitting trivially dead instructions
Matthew Simpson [Wed, 19 Oct 2016 19:22:02 +0000 (19:22 +0000)]
[LV] Avoid emitting trivially dead instructions

Some instructions from the original loop, when vectorized, can become trivially
dead. This happens because of the way we structure the new loop. For example,
we create new induction variables and induction variable "steps" in the new
loop. Thus, when we go to vectorize the original induction variable update, it
may no longer be needed due to the instructions we've already created. This
patch prevents us from creating these redundant instructions. This reduces code
size before simplification and allows greater flexibility in code generation
since we have fewer unnecessary instruction uses.

Differential Revision: https://reviews.llvm.org/D25631

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284631 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AliasSetTracker] Add support for memcpy and memmove.
Chad Rosier [Wed, 19 Oct 2016 19:09:03 +0000 (19:09 +0000)]
[AliasSetTracker] Add support for memcpy and memmove.

Differential Revision: https://reviews.llvm.org/D25776

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284630 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[IndVarSimplify] Use control-dependent range information to prove non-negativity
Artur Pilipenko [Wed, 19 Oct 2016 18:59:03 +0000 (18:59 +0000)]
[IndVarSimplify] Use control-dependent range information to prove non-negativity

This change is motivated by the case when IndVarSimplify doesn't widen a comparison of IV increment because it can't prove IV increment being non-negative. We end up with a redundant trunc of the widened increment on this example.

for.body:
  %i = phi i32 [ %start, %for.body.lr.ph ], [ %i.inc, %for.inc ]
  %within_limits = icmp ult i32 %i, 64
  br i1 %within_limits, label %continue, label %for.end

continue:
  %i.i64 = zext i32 %i to i64
  %arrayidx = getelementptr inbounds i32, i32* %base, i64 %i.i64
  %val = load i32, i32* %arrayidx, align 4
  br label %for.inc

for.inc:
  %i.inc = add nsw nuw i32 %i, 1
  %cmp = icmp slt i32 %i.inc, %limit
  br i1 %cmp, label %for.body, label %for.end

There is a range check inside of the loop which guarantees the IV to be non-negative. NSW on the increment guarantees that the increment is also non-negative. Teach IndVarSimplify to use the range check to prove non-negativity of loop increments.

Reviewed By: sanjoy

Differential Revision: https://reviews.llvm.org/D25738

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284629 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AliasSetTracker] Return void for add() functions. NFC.
Chad Rosier [Wed, 19 Oct 2016 18:50:32 +0000 (18:50 +0000)]
[AliasSetTracker] Return void for add() functions. NFC.

Differential Revision: https://reviews.llvm.org/D25748

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284628 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[InstSimplify] move one and add more tests for potential negation folds
Sanjay Patel [Wed, 19 Oct 2016 18:42:12 +0000 (18:42 +0000)]
[InstSimplify] move one and add more tests for potential negation folds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284627 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd a macro for prefetching data.
Rafael Espindola [Wed, 19 Oct 2016 18:34:32 +0000 (18:34 +0000)]
Add a macro for prefetching data.

It will be used in lld.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284626 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ADT] Zip range adapter
Mehdi Amini [Wed, 19 Oct 2016 18:02:21 +0000 (18:02 +0000)]
[ADT] Zip range adapter

This augments the STLExtras toolset with a zip iterator and range
adapter. Zip comes in two varieties: `zip`, which will zip to the
shortest of the input ranges, and `zip_first`, which limits its
`begin() == end()` checks to just the first range.

Recommit r284035 after MSVC2013 support has been dropped.

Patch by: Bryant Wong <github.com/bryant>

Differential Revision: https://reviews.llvm.org/D23252

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284623 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[llvm-cov] Don't spawn a thread unless ThreadCount > 1
Vedant Kumar [Wed, 19 Oct 2016 17:55:44 +0000 (17:55 +0000)]
[llvm-cov] Don't spawn a thread unless ThreadCount > 1

Initializing a ThreadPool with ThreadCount = 1 spawns a thread even
though we don't need to. This is at least slower than it needs to be,
and at worst may somehow be exacerbating PR30735 (llvm-cov times out
on ARM bots).

As a follow-up, I'll try to add logic to llvm::ThreadPool to avoid
spawning a thread when ThreadCount = 1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284621 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AMDGPU] Stop using MCRegisterClass::getSize()
Krzysztof Parzyszek [Wed, 19 Oct 2016 17:40:36 +0000 (17:40 +0000)]
[AMDGPU] Stop using MCRegisterClass::getSize()

Differential Review: https://reviews.llvm.org/D24675

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284619 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ThinLTO] Default backend threads to heavyweight_hardware_concurrency
Teresa Johnson [Wed, 19 Oct 2016 17:35:01 +0000 (17:35 +0000)]
[ThinLTO] Default backend threads to heavyweight_hardware_concurrency

Summary:
Changes default backend parallelism from thread::hardware_concurrency to
the new llvm::heavyweight_hardware_concurrency, which for X86 Linux
defaults to the number of physical cores (and will fall back to
thread::hardware_concurrency otherwise). This avoid oversubscribing
the physical cores using hyperthreading.

Reviewers: mehdi_amini, pcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25775

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284618 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMerged nested ifs. NFCI.
Simon Pilgrim [Wed, 19 Oct 2016 17:30:24 +0000 (17:30 +0000)]
Merged nested ifs. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284616 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "Add Chrono.h - std::chrono support header"
Pavel Labath [Wed, 19 Oct 2016 17:17:53 +0000 (17:17 +0000)]
Revert "Add Chrono.h - std::chrono support header"

This reverts commit r284590 as it fails on the mingw buildbot. I think I know the
fix, but I cannot test it right now. Will reapply when I verify it works ok.

This reverts r284590.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284615 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAGCombiner] Add general constant vector support to (shl (add x, c1), c2) -> (add...
Simon Pilgrim [Wed, 19 Oct 2016 17:12:22 +0000 (17:12 +0000)]
[DAGCombiner] Add general constant vector support to (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2)

We already supported scalar constant / splatted constant vector - now accepts any (non opaque) constant scalar / vector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284613 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[WinEH] Allow catchpads to reuse the same catch object
Reid Kleckner [Wed, 19 Oct 2016 17:08:23 +0000 (17:08 +0000)]
[WinEH] Allow catchpads to reuse the same catch object

This code used a regular when it should have used a multimap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284612 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAG] optimize negation of bool
Sanjay Patel [Wed, 19 Oct 2016 16:58:59 +0000 (16:58 +0000)]
[DAG] optimize negation of bool

Use mask and negate for legalization of i1 source type with SIGN_EXTEND_INREG.
With the mask, this should be no worse than 2 shifts. The mask can be eliminated
in some cases, so that should be better than 2 shifts.

This change exposed some missing folds related to negation:
https://reviews.llvm.org/rL284239
https://reviews.llvm.org/rL284395

There may be others, so please let me know if you see any regressions.

Differential Revision: https://reviews.llvm.org/D25485

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284611 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[pdb] Improve error messages when DIA is not found.
Zachary Turner [Wed, 19 Oct 2016 16:42:20 +0000 (16:42 +0000)]
[pdb] Improve error messages when DIA is not found.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284610 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[RDF] Switch RefMap in liveness calculation to use lane masks
Krzysztof Parzyszek [Wed, 19 Oct 2016 16:30:56 +0000 (16:30 +0000)]
[RDF] Switch RefMap in liveness calculation to use lane masks

This required reengineering of some of the part of liveness calculation,
including fixing some issues caused by the limitations of the previous
approach. The current code is not necessarily the fastest, but it should
be functionally correct (at least more so than before). The compile-time
performance will be addressed in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284609 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAGCombiner] Add general constant vector support to (shl (sra x, c1), c1) -> (and...
Simon Pilgrim [Wed, 19 Oct 2016 16:15:30 +0000 (16:15 +0000)]
[DAGCombiner] Add general constant vector support to (shl (sra x, c1), c1) -> (and x, (shl -1, c1))

We already supported scalar constant / splatted constant vector - now accepts any (non opaque) constant scalar / vector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284608 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAGCombiner] Add general constant vector support to (shl (mul x, c1), c2) -> (mul...
Simon Pilgrim [Wed, 19 Oct 2016 15:59:28 +0000 (15:59 +0000)]
[DAGCombiner] Add general constant vector support to (shl (mul x, c1), c2) -> (mul x, c1 << c2)

We already supported scalar constant / splatted constant vector - now accepts any (non opaque) constant scalar / vector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284607 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert r284604. A.K.A. "TMP"
Tim Northover [Wed, 19 Oct 2016 15:56:12 +0000 (15:56 +0000)]
Revert r284604. A.K.A. "TMP"

Committed by mistake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284606 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSparc: fix test.
Tim Northover [Wed, 19 Oct 2016 15:55:11 +0000 (15:55 +0000)]
Sparc: fix test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284605 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTMP
Tim Northover [Wed, 19 Oct 2016 15:55:09 +0000 (15:55 +0000)]
TMP

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284604 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoGlobalISel: support translating volatile loads and stores.
Tim Northover [Wed, 19 Oct 2016 15:55:06 +0000 (15:55 +0000)]
GlobalISel: support translating volatile loads and stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284603 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoIntroduce ConstantRange.addWithNoSignedWrap
Artur Pilipenko [Wed, 19 Oct 2016 14:44:23 +0000 (14:44 +0000)]
Introduce ConstantRange.addWithNoSignedWrap

To be used by upcoming change to IndVarSimplify

Reviewed By: sanjoy

Differential Revision: https://reviews.llvm.org/D25732

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284597 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Sparc][LEON] Detects an erratum on UT699 LEON 3 processors involving rounding mode...
Chris Dewhurst [Wed, 19 Oct 2016 14:01:06 +0000 (14:01 +0000)]
[Sparc][LEON] Detects an erratum on UT699 LEON 3 processors involving rounding mode changes and issues an appropriate user error message.

Differential Revision: https://reviews.llvm.org/D24665

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284591 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd Chrono.h - std::chrono support header
Pavel Labath [Wed, 19 Oct 2016 13:58:55 +0000 (13:58 +0000)]
Add Chrono.h - std::chrono support header

Summary:
std::chrono mostly covers the functionality of llvm::sys::TimeValue and
lldb_private::TimeValue. This header adds a bit of utility functions and
typedefs, which make the usage of the library and porting code from TimeValues
easier.

Rationale:
- TimePoint typedef - precision of system_clock is implementation defined -
  using a well-defined precision helps maintain consistency between platforms,
  makes it interact better with existing TimeValue classes, and avoids cases
  there a time point is implicitly convertible to a specific precision on some
  platforms but not on others.
- system_clock::to_time_t only accepts time_points with the default system
  precision (even though time_t has only second precision on all platforms we
  support). To avoid the need for explicit casts, I have added a toTimeT()
  wrapper function. toTimePoint(time_t) was not strictly necessary, but I have
  added it for symmetry.

Reviewers: zturner, mehdi_amini

Subscribers: beanz, mgorny, llvm-commits, modocache

Differential Revision: https://reviews.llvm.org/D25416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284590 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoReapply r284571 (with the new tests fixed).
Sjoerd Meijer [Wed, 19 Oct 2016 13:43:02 +0000 (13:43 +0000)]
Reapply r284571 (with the new tests fixed).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284588 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agollvm/test/MC/Mips/macro-ld-sd.s: Sweep a spurious character \xA0 in the test file.
NAKAMURA Takumi [Wed, 19 Oct 2016 13:41:12 +0000 (13:41 +0000)]
llvm/test/MC/Mips/macro-ld-sd.s: Sweep a spurious character \xA0 in the test file.

It might crash FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284587 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SystemZ] Add missing vector instructions for the assembler
Ulrich Weigand [Wed, 19 Oct 2016 13:03:18 +0000 (13:03 +0000)]
[SystemZ] Add missing vector instructions for the assembler

Most z13 vector instructions have a base form where the data type of
the operation (whether to consider the vector to be 16 bytes, 8
halfwords, 4 words, or 2 doublewords) is encoded into a mask field,
and then a set of extended mnemonics where the mask field is not
present but the data type is encoded into the mnemonic name.

Currently, LLVM only supports the type-specific forms (since those
are really the ones needed for code generation), but not the base
type-generic forms.

To complete the assembler support and make it fully compatible with
the GNU assembler, this commit adds assembler aliases for all the
base forms of the various vector instructions.

It also adds two more alias forms that are documented in the PoP:
VFPSO/VFPSODB/WFPSODB -- generic form of VFLCDB etc.
VNOT -- special variant of VNO

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284586 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SystemZ] Add optional argument to some vector string instructions
Ulrich Weigand [Wed, 19 Oct 2016 12:57:46 +0000 (12:57 +0000)]
[SystemZ] Add optional argument to some vector string instructions

The vfee[bhf], vfene[bhf], and vistr[bhf] assembler mnemonics are
documented in the Principles of Operation to have an optional last
operand to encode arbitrary values in a mask field.

This commit adds support for those optional operands, and cleans up
the patterns to generate vector string instruction as bit.  No change
to code generation intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284585 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[cmake] Declare LLVM_CMAKE_PATH for use in subprojects
Michal Gorny [Wed, 19 Oct 2016 12:18:34 +0000 (12:18 +0000)]
[cmake] Declare LLVM_CMAKE_PATH for use in subprojects

Declare the LLVM_CMAKE_PATH to the source directory location of CMake
files, in order to make it possible to easily use them in subprojects.
Such a variable is already declared in most of LLVM projects
(and inconsistently mixed with direct source tree references), including
Clang, LLDB, compiler-rt, libcxx... Declaring it inside main LLVM tree
makes it possible to avoid having to declare fallback values or use
conditionals in those projects.

It should be noted that in some of the subprojects LLVM_CMAKE_PATH is
used to reference generated LLVMConfig.cmake file. However, these
references are conditional to stand-alone builds and explicitly
including this file is unnecessary in combined builds.

Differential Revision: https://reviews.llvm.org/D25724

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284581 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables
James Molloy [Wed, 19 Oct 2016 12:06:49 +0000 (12:06 +0000)]
[Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tables

The TBB and TBH instructions in Thumb-2 allow jump tables to be compressed into sequences of bytes or shorts respectively. These instructions do not exist in Thumb-1, however it is possible to synthesize them out of a sequence of other instructions.

It turns out this sequence is so short that it's almost never a lose for performance and is ALWAYS a significant win for code size.

TBB example:
Before: lsls r0, r0, #2    After: add  r0, pc
        adr  r1, .LJTI0_0         ldrb r0, [r0, #6]
        ldr  r0, [r0, r1]         lsls r0, r0, #1
        mov  pc, r0               add  pc, r0
  => No change in prologue code size or dynamic instruction count. Jump table shrunk by a factor of 4.

The only case that can increase dynamic instruction count is the TBH case:

Before: lsls r0, r4, #2    After: lsls r4, r4, #1
        adr  r1, .LJTI0_0         add  r4, pc
        ldr  r0, [r0, r1]         ldrh r4, [r4, #6]
        mov  pc, r0               lsls r4, r4, #1
                                  add  pc, r4
  => 1 more instruction in prologue. Jump table shrunk by a factor of 2.

So there is an argument that this should be disabled when optimizing for performance (and a TBH needs to be generated). I'm not so sure about that in practice, because on small cores with Thumb-1 performance is often tied to code size. But I'm willing to turn it off when optimizing for performance if people want (also note that TBHs are fairly rare in practice!)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284580 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAGCombiner] Just call isConstOrConstSplat directly. NFCI.
Simon Pilgrim [Wed, 19 Oct 2016 11:28:15 +0000 (11:28 +0000)]
[DAGCombiner] Just call isConstOrConstSplat directly. NFCI.

This will get the same ConstantSDNode scalar or vector splat value as the current separate dyn_cast<ConstantSDNode> / isVector() approach.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284578 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoFix line endings
Simon Pilgrim [Wed, 19 Oct 2016 11:16:58 +0000 (11:16 +0000)]
Fix line endings

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284576 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[DAGCombine] Generalize distributeTruncateThroughAnd to work with any non-opaque...
Simon Pilgrim [Wed, 19 Oct 2016 08:57:37 +0000 (08:57 +0000)]
[DAGCombine] Generalize distributeTruncateThroughAnd to work with any non-opaque constant or constant vector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284574 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert of r284571 because of failing tests.
Sjoerd Meijer [Wed, 19 Oct 2016 07:45:48 +0000 (07:45 +0000)]
Revert of r284571 because of failing tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284572 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoChecking FP function attribute values and adding more build attribute tests.
Sjoerd Meijer [Wed, 19 Oct 2016 07:25:06 +0000 (07:25 +0000)]
Checking FP function attribute values and adding more build attribute tests.

This renames the function for checking FP function attribute values and also
adds more build attribute tests (which are in separate files because build
attributes are set per file).

Differential Revision: https://reviews.llvm.org/D25625

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284571 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDenseSet: Appease msc18 to define derived constructors explicitly.
NAKAMURA Takumi [Wed, 19 Oct 2016 05:43:17 +0000 (05:43 +0000)]
DenseSet: Appease msc18 to define derived constructors explicitly.

msc18 doesn't recognize "using BaseT::BaseT;"

  llvm\include\llvm/ADT/DenseSet.h(213) : error C2875: using-declaration causes a multiple declaration of 'BaseT'
          llvm\include\llvm/ADT/DenseSet.h(214) : see reference to class template instantiation 'llvm::DenseSet<ValueT,ValueInfoT>' being compiled
  llvm\include\llvm/ADT/DenseSet.h(231) : error C2875: using-declaration causes a multiple declaration of 'BaseT'
          llvm\include\llvm/ADT/DenseSet.h(232) : see reference to class template instantiation 'llvm::SmallDenseSet<ValueT,InlineBuckets,ValueInfoT>' being compiled

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284570 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AVX-512] Teach isel lowering that a subvector broadcast being inserted into both...
Craig Topper [Wed, 19 Oct 2016 04:44:17 +0000 (04:44 +0000)]
[AVX-512] Teach isel lowering that a subvector broadcast being inserted into both halves of a 512-bit vector can be combined into a larger subvector broadcast.

Summary:
This allows us to create broadcasts of 128-bit vector loads into 512-bit vectors.

New patterns added to support 8-bit and 16-bit vector types and v2f64/v2i64->v8f64/v8i64 without DQI instructions.

There also fallback patterns when the load can't be folded. These patterns are a little complex as we first need to insert the lower 128-bits into the second 128-bits using a zmm subvector insert instruction. We need to use a zmm insert in case VLX isn't available. Then use another zmm sub vector insert to take those 256-bits and insert them into the upper bits. Since we used a zmm insert to create the 256-bits we also need to do a extract_subreg to get just the lower 256-bits to pass to the second insert.

The outer insert for the fallback patterns should have its type correct because eventually we should also supported masked operations here too. So we need a DQI and a NoDQI version of the v16f32/v16i32 patterns.

Reviewers: RKSimon, delena, igorb

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25651

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284567 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUpdate the section.ll to fix non-x86 failure.
Dehao Chen [Wed, 19 Oct 2016 03:53:41 +0000 (03:53 +0000)]
Update the section.ll to fix non-x86 failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284566 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert r284545 again as the regression in ppc still exists. There is bug in MBPI...
Dehao Chen [Wed, 19 Oct 2016 01:18:25 +0000 (01:18 +0000)]
Revert r284545 again as the regression in ppc still exists. There is bug in MBPI exposed by th patch.

Also update the section.ll to fix non-x86 failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284563 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[asan] Replace std::to_string with llvm::to_string
Vitaly Buka [Wed, 19 Oct 2016 00:16:56 +0000 (00:16 +0000)]
[asan] Replace std::to_string with llvm::to_string

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284557 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[libFuzzer] extend -print_coverage to also print uncovered lines, functions, and...
Kostya Serebryany [Wed, 19 Oct 2016 00:12:03 +0000 (00:12 +0000)]
[libFuzzer] extend -print_coverage to also print uncovered lines, functions, and files.

Example of output:
COVERAGE:
COVERED: in DSO2(int) /pathto/DSO2.cpp:6
COVERED: in DSO2(int) /pathto/DSO2.cpp:8
COVERED: in DSO1(int) /pathto/DSO1.cpp:6
COVERED: in DSO1(int) /pathto/DSO1.cpp:8
COVERED: in LLVMFuzzerTestOneInput /pathto/DSOTestMain.cpp:16
COVERED: in LLVMFuzzerTestOneInput /pathto/DSOTestMain.cpp:19
COVERED: in LLVMFuzzerTestOneInput /pathto/DSOTestMain.cpp:25
COVERED: in LLVMFuzzerTestOneInput /pathto/DSOTestMain.cpp:26
MODULE_WITH_COVERAGE: /pathto/libLLVMFuzzer-DSO1.so
UNCOVERED_LINE: in DSO1(int) /pathto/DSO1.cpp:9
UNCOVERED_FUNC: in Uncovered1()
MODULE_WITH_COVERAGE: /pathto/libLLVMFuzzer-DSO2.so
UNCOVERED_LINE: in DSO2(int) /pathto/DSO2.cpp:9
UNCOVERED_FUNC: in Uncovered2()
MODULE_WITH_COVERAGE: /pathto/LLVMFuzzer-DSOTest
UNCOVERED_LINE: in LLVMFuzzerTestOneInput /pathto/DSOTestMain.cpp:21
UNCOVERED_LINE: in LLVMFuzzerTestOneInput /pathto/DSOTestMain.cpp:27
UNCOVERED_FILE: /pathto/DSOTestExtra.cpp

Several things are not perfect here:
* we are using objdump+awk instead of sancov because sancov does not support DSOs yet.
* this breaks in the presence of ASAN_OPTIONS=strip_path_prefix=...
  (need to implement another API to get the module name by PC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284554 91177308-0d34-0410-b5e6-96231b3b80d8