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5 years ago[InstCombine] add tests for fdiv with negated operand; NFC
Sanjay Patel [Fri, 26 Jul 2019 19:44:53 +0000 (19:44 +0000)]
[InstCombine] add tests for fdiv with negated operand; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367145 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CMake] Allow LLVM_EXTERNAL_<proj>_SOURCE_DIR to be overridden if it is
Yuanfang Chen [Fri, 26 Jul 2019 19:25:57 +0000 (19:25 +0000)]
[CMake] Allow LLVM_EXTERNAL_<proj>_SOURCE_DIR to be overridden if it is
empty.

This makes adding projects to LLVM_ENABLE_PROJECTS possible.
Also its type should be PATH.

https://bugs.llvm.org/show_bug.cgi?id=42698

Reviewers: beanz, greened, chapuni

Reviewed by: beanz

Differential Revision: https://reviews.llvm.org/D65045

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367144 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MemorySSA & LoopPassManager] Analysis can be preserved only when all loop passes...
Alina Sbirlea [Fri, 26 Jul 2019 18:57:26 +0000 (18:57 +0000)]
[MemorySSA & LoopPassManager] Analysis can be preserved only when all loop passes preserve it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367143 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoadd 'a' to chmod in llvm-lipo executability tests
Bob Haarman [Fri, 26 Jul 2019 18:44:06 +0000 (18:44 +0000)]
add 'a' to chmod in llvm-lipo executability tests

Summary:
When specifying symbolic permissions with + or -, if none of
a/u/g/o are specified, bits set in the umask are not affected.
This caused the llvm-lipo executability tests to fail on some
systems, e.g. having an umask of 027 would cause chmod -x to not
clear the executable bit for others. This change instead
uses chmod a-x, which clears all the executable bits regardless
of umask.

Reviewers: smeenai, hans, anushabasana

Reviewed By: smeenai

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65342

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367142 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[X86][SSE] Replace PMULDQ GetDemandedBits combine with SimplifyMultipleUseDem...
Vlad Tsyrklevich [Fri, 26 Jul 2019 18:14:21 +0000 (18:14 +0000)]
Revert "[X86][SSE] Replace PMULDQ GetDemandedBits combine with SimplifyMultipleUseDemandedBits handler."

This reverts r367100, it appears to be causing test failures after
Nico's revert of r367091.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367141 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC][AIX]Add lowering of MCSymbol MachineOperand.
Sean Fertile [Fri, 26 Jul 2019 17:25:27 +0000 (17:25 +0000)]
[PowerPC][AIX]Add lowering of MCSymbol MachineOperand.

Adds machine operand lowering for MCSymbolSDNodes to the PowerPC
backend. This is needed to produce call instructions in assembly for AIX
because the callee operand is a MCSymbolSDNode. The test is XFAIL'ed for
asserts due to a (valid) assertion in PEI that the AIX ABI isn't supported yet.

Differential Revision: https://reviews.llvm.org/D63738

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367133 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Fix typo.
Michael Liao [Fri, 26 Jul 2019 17:13:59 +0000 (17:13 +0000)]
[AMDGPU] Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367131 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] Add support for --add-section for COFF
Sergey Dmitriev [Fri, 26 Jul 2019 17:06:41 +0000 (17:06 +0000)]
[llvm-objcopy] Add support for --add-section for COFF

This patch enables support for --add-section=... option for COFF objects.

Differential Revision: https://reviews.llvm.org/D65040

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367130 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][SVE2] Rename bitperm feature to sve2-bitperm
Cullen Rhodes [Fri, 26 Jul 2019 15:57:50 +0000 (15:57 +0000)]
[AArch64][SVE2] Rename bitperm feature to sve2-bitperm

Summary:
The bitperm feature flag is now prefixed with SVE2, as it is for all other SVE2
extensions

Patch by Maciej Gabka.

Reviewers: sdesmalen, rovka, chill, SjoerdMeijer, rengolin

Reviewed By: SjoerdMeijer, rengolin

Differential Revision: https://reviews.llvm.org/D65327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367124 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm] [lit/tests] Replace 'env -u' with more portable construct
Michal Gorny [Fri, 26 Jul 2019 15:39:05 +0000 (15:39 +0000)]
[llvm] [lit/tests] Replace 'env -u' with more portable construct

Set environment variables to empty values rather than attempting
to unset them via 'env -u', in order to fix NetBSD test regression
caused by r366980.  POSIX does not guarantee that env(1) supports '-u'
option, and indeed NetBSD env(1) does not support it.

Differential Revision: https://reviews.llvm.org/D65335

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367123 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm] [FileCheck] Use FILECHECK_DUMP_INPUT_ON_FAILURE only when non-empty
Michal Gorny [Fri, 26 Jul 2019 15:38:57 +0000 (15:38 +0000)]
[llvm] [FileCheck] Use FILECHECK_DUMP_INPUT_ON_FAILURE only when non-empty

Enable dumping output only if FILECHECK_DUMP_INPUT_ON_FAILURE is set to
a non-empty value.  This is necessary to support disabling it via
POSIX-compliant env(1) that does not support '-u' argument,
and therefore fix regression caused by r366980.

Differential Revision: https://reviews.llvm.org/D65334

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367122 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r367091, it caused PR42777.
Nico Weber [Fri, 26 Jul 2019 14:58:42 +0000 (14:58 +0000)]
Revert r367091, it caused PR42777.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367118 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM][ParallelDSP] Combine structs
Sam Parker [Fri, 26 Jul 2019 14:11:40 +0000 (14:11 +0000)]
[ARM][ParallelDSP] Combine structs

Combine OpChain and BinOpChain structs as OpChain is a base class to
BinOpChain that is never used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367114 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC] Add getCRSaveOffset to improve readability. [NFC]
Sean Fertile [Fri, 26 Jul 2019 14:02:17 +0000 (14:02 +0000)]
[PowerPC] Add getCRSaveOffset to improve readability. [NFC]

In preperation for AIX support in FrameLowering: replace a number of literal
'8' that represent the stack offset of the condition register save area with
a member in PPCFrameLowering.

Patch by Chris Bowler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367111 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Merge r367043
Nico Weber [Fri, 26 Jul 2019 13:27:19 +0000 (13:27 +0000)]
gn build: Merge r367043

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367109 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Merge r366956
Nico Weber [Fri, 26 Jul 2019 13:24:56 +0000 (13:24 +0000)]
gn build: Merge r366956

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367108 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MIPS GlobalISel] Fix check for void return during lowerCall
Petar Avramovic [Fri, 26 Jul 2019 13:19:37 +0000 (13:19 +0000)]
[MIPS GlobalISel] Fix check for void return during lowerCall

Void return used to have unsigned with value 0 for virtual register
but with addition of Register class and changes to arguments to lowerCall
this is no longer valid.
Check for void return by inspecting the Ty field in OrigRet.

Differential Revision: https://reviews.llvm.org/D65321

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367107 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Move WQM/WWM intrinsic instruction selection to AMDGPUISelDAGToDAG
Carl Ritson [Fri, 26 Jul 2019 13:11:44 +0000 (13:11 +0000)]
[AMDGPU] Move WQM/WWM intrinsic instruction selection to AMDGPUISelDAGToDAG

Reviewers: arsenm, nhaehnle

Reviewed By: arsenm

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65328

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367105 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MIPS GlobalISel] Select inttoptr and ptrtoint
Petar Avramovic [Fri, 26 Jul 2019 13:08:06 +0000 (13:08 +0000)]
[MIPS GlobalISel] Select inttoptr and ptrtoint

Select G_INTTOPTR and G_PTRTOINT for MIPS32.

Differential Revision: https://reviews.llvm.org/D65217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367104 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] remove flop from lerp patterns
Sanjay Patel [Fri, 26 Jul 2019 11:19:18 +0000 (11:19 +0000)]
[InstCombine] remove flop from lerp patterns

(Y * (1.0 - Z)) + (X * Z) -->
Y - (Y * Z) + (X * Z) -->
Y + Z * (X - Y)

This is part of solving:
https://bugs.llvm.org/show_bug.cgi?id=42716

Factoring eliminates an instruction, so that should be a good canonicalization.
The potential conversion to FMA would be handled by the backend based on target
capabilities.

Differential Revision: https://reviews.llvm.org/D65305

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367101 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Replace PMULDQ GetDemandedBits combine with SimplifyMultipleUseDemandedBit...
Simon Pilgrim [Fri, 26 Jul 2019 11:10:20 +0000 (11:10 +0000)]
[X86][SSE] Replace PMULDQ GetDemandedBits combine with SimplifyMultipleUseDemandedBits handler.

This removes a GetDemandedBits user and allows us to benefit from the DemandedElts propagated through SimplifyDemandedBits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367100 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][ARM][ParallelDSP] Cleanup isNarrowSequence
Sam Parker [Fri, 26 Jul 2019 10:57:42 +0000 (10:57 +0000)]
[NFC][ARM][ParallelDSP] Cleanup isNarrowSequence

Remove unused logic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367099 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] GetDemandedBits - update SIGN_EXTEND_INREG op to just call SimplifyMul...
Simon Pilgrim [Fri, 26 Jul 2019 10:03:07 +0000 (10:03 +0000)]
[SelectionDAG] GetDemandedBits - update SIGN_EXTEND_INREG op to just call SimplifyMultipleUseDemandedBits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367098 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Add llvm.amdgcn.softwqm intrinsic
Carl Ritson [Fri, 26 Jul 2019 09:54:12 +0000 (09:54 +0000)]
[AMDGPU] Add llvm.amdgcn.softwqm intrinsic

Add llvm.amdgcn.softwqm intrinsic which behaves like llvm.amdgcn.wqm
only if there is other WQM computation in the shader.

Reviewers: nhaehnle, tpr

Reviewed By: nhaehnle

Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64935

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367097 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[TargetLowering] SimplifyMultipleUseDemandedBits - add SIGN_EXTEND_INREG support.
Simon Pilgrim [Fri, 26 Jul 2019 09:41:08 +0000 (09:41 +0000)]
[TargetLowering] SimplifyMultipleUseDemandedBits - add SIGN_EXTEND_INREG support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367096 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM][ParallelDSP] Regenerate multi-use-loads.ll test checks
Simon Pilgrim [Fri, 26 Jul 2019 09:32:21 +0000 (09:32 +0000)]
[ARM][ParallelDSP] Regenerate multi-use-loads.ll test checks

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367094 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Define ETE and TRBE system registers
Momchil Velikov [Fri, 26 Jul 2019 09:19:08 +0000 (09:19 +0000)]
[AArch64] Define ETE and TRBE system registers

Embedded Trace Extension and Trace Buffer Extension are optional
future architecture extensions.
(cf. https://developer.arm.com/architectures/cpu-architecture/a-profile/exploration-tools)

Their system registers are documented here:
https://developer.arm.com/docs/ddi0601/a

ETE shares register names with ETM. One exception is the ETE
TRCEXTINSELR0 register, which has the same encoding as the ETM
TRCEXTINSELR register (but different semantics). This patch treats
them as aliases: the assembler will accept both names, emitting
identical encoding, and the disassembler will keep disassembling
to TRCEXRINSELR.

Differential Revision: https://reviews.llvm.org/D63707

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367093 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] GetDemandedBits - update OR/XOR ops to just call SimplifyMultipleUseDe...
Simon Pilgrim [Fri, 26 Jul 2019 09:13:29 +0000 (09:13 +0000)]
[SelectionDAG] GetDemandedBits - update OR/XOR ops to just call SimplifyMultipleUseDemandedBits.

Eventually all of these will be moved over, but we create nodes in GetDemandedBits recursion at the moment which causes regressions when we try to remove them all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367092 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[TargetLowering] SimplifyMultipleUseDemandedBits - add BITCAST pass through support.
Simon Pilgrim [Fri, 26 Jul 2019 08:38:39 +0000 (08:38 +0000)]
[TargetLowering] SimplifyMultipleUseDemandedBits - add BITCAST pass through support.

This allows us to peek through BITCASTs and attempt simplify the source operand, and then bitcast back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367091 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM][LowOverheadLoops] Add CPSR defs
Sam Parker [Fri, 26 Jul 2019 08:15:01 +0000 (08:15 +0000)]
[ARM][LowOverheadLoops] Add CPSR defs

Both WhileLoopStart and LoopEnd may get turned into a cmp and br pair,
so add an implicit def to these pseudo instructions in case that WLS
and LE aren't generated.

Differential Revision: https://reviews.llvm.org/D65275

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367089 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WinEH] Allocate space in funclets stack to save XMM CSRs
Pengfei Wang [Fri, 26 Jul 2019 07:33:15 +0000 (07:33 +0000)]
[WinEH] Allocate space in funclets stack to save XMM CSRs

Summary:
This is an alternate approach to D57970.
Currently funclets reuse the same stack slots that are used in the
parent function for saving callee-saved xmm registers. If the parent
function modifies a callee-saved xmm register before an excpetion is
thrown, the catch handler will overwrite the original saved value.

This patch allocates space in funclets stack for saving callee-saved xmm
registers and uses RSP instead RBP to access memory.

Reviewers: andrew.w.kaylor, LuoYuanke, annita.zhang, craig.topper,
RKSimon

Subscribers: rnk, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63396

Signed-off-by: pengfei <pengfei.wang@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367088 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Loop Utils] Extend the scope of addStringMetadataToLoop.
Serguei Katkov [Fri, 26 Jul 2019 07:04:34 +0000 (07:04 +0000)]
[Loop Utils] Extend the scope of addStringMetadataToLoop.

To avoid duplicates in loop metadata, if the string to add is
already there, just update the value.

Reviewers: reames, Ashutosh
Reviewed By: reames
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D65265

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367087 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Loop Utils] Move utilty addStringMetadataToLoop to LoopUtils.cpp. NFC.
Serguei Katkov [Fri, 26 Jul 2019 06:10:08 +0000 (06:10 +0000)]
[Loop Utils] Move utilty addStringMetadataToLoop to LoopUtils.cpp. NFC.

Just move the utility function to LoopUtils.cpp to re-use it in loop peeling.

Reviewers: reames, Ashutosh
Reviewed By: reames
Subscribers: hiraditya, asbirlea, llvm-commits
Differential Revision: https://reviews.llvm.org/D65264

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367085 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix macOS build after r358716
Yi Kong [Fri, 26 Jul 2019 05:17:14 +0000 (05:17 +0000)]
Fix macOS build after r358716

COPYFILE_CLONE is only defined on newer macOS versions, using it without
check breaks build on systems running legacy OS and toolchain.

Differential Revision: https://reviews.llvm.org/D65317

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367084 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoSome case eror for: detected memory leaks
Kang Zhang [Fri, 26 Jul 2019 03:25:58 +0000 (03:25 +0000)]
Some case eror for: detected memory leaks

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367083 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/GlobalISel: Handle most function return types
Matt Arsenault [Fri, 26 Jul 2019 02:36:05 +0000 (02:36 +0000)]
AMDGPU/GlobalISel: Handle most function return types

handleAssignments gives up pretty easily on structs, and i8 values for
some reason. The other case that doesn't work is when an implicit sret
needs to be inserted if the return size exceeds the number of return
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367082 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoGlobalISel: Fold out unmerge to scalars from concat_vector
Matt Arsenault [Fri, 26 Jul 2019 02:22:23 +0000 (02:22 +0000)]
GlobalISel: Fold out unmerge to scalars from concat_vector

Removes illegal intermediate vectors if an operation was lowering to
concat_vectors, and the next operation is scalarized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367081 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC] Do the Simple Early Return in block-placement pass to optimize the blocks
Kang Zhang [Fri, 26 Jul 2019 01:58:53 +0000 (01:58 +0000)]
[PowerPC] Do the Simple Early Return in block-placement pass to optimize the blocks

Summary:
In `block-placement` pass, it will create some patterns for unconditional we can do the simple early retrun.
But the `early-ret` pass is before `block-placement`, we don't want to run it again.
This patch is to do the simple early return to optimize the blocks at the last of `block-placement`.

Below is an example
```
BB:                   | BB:
   XOR 3, 3, 4        |   XOR 3, 3, 4
   B TBB              |   B ChainBB
...                   | ...
ChainBB:              | ChainBB:
   B TBB              |   ADD 3, 3, 4
...                   |   BLR
TBB:                  |
   ADD 3, 3, 4        |
   BLR                |
```

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D63972

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367080 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReland: [Remarks] Add support for serializing metadata for every remark streamer
Francis Visoiu Mistrih [Fri, 26 Jul 2019 01:33:30 +0000 (01:33 +0000)]
Reland: [Remarks] Add support for serializing metadata for every remark streamer

This allows every serializer format to implement metaSerializer() and
return the corresponding meta serializer.

Original llvm-svn: 366946
Reverted llvm-svn: 367004

This fixes the unit tests on Windows bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367078 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][GlobalISel] Simplify zext/sext selection, use MachineIRBuilder. NFC.
Amara Emerson [Fri, 26 Jul 2019 00:01:09 +0000 (00:01 +0000)]
[AArch64][GlobalISel] Simplify zext/sext selection, use MachineIRBuilder. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367075 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add tests for lerp patterns (PR42716); NFC
Sanjay Patel [Thu, 25 Jul 2019 22:25:21 +0000 (22:25 +0000)]
[InstCombine] add tests for lerp patterns (PR42716); NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367069 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CodeGen] Don't resolve the stack protector frame accesses until PEI
Francis Visoiu Mistrih [Thu, 25 Jul 2019 22:23:48 +0000 (22:23 +0000)]
[CodeGen] Don't resolve the stack protector frame accesses until PEI

Currently, stack protector loads and stores are resolved during
LocalStackSlotAllocation (if the pass needs to run). When this is the
case, the base register assigned to the frame access is going to be one
of the vregs created during LocalStackSlotAllocation. This means that we
are keeping a pointer to the stack protector slot, and we're using this
pointer to load and store to it.

In case register pressure goes up, we may end up spilling this pointer
to the stack, which can be a security concern.

Instead, leave it to PEI to resolve the frame accesses. In order to do
that, we make all stack protector accesses go through frame index
operands, then PEI will resolve this using an offset from sp/fp/bp.

Differential Revision: https://reviews.llvm.org/D64759

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367068 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[BPF] fix typedef issue for offset relocation
Yonghong Song [Thu, 25 Jul 2019 21:47:27 +0000 (21:47 +0000)]
[BPF] fix typedef issue for offset relocation

Currently, the CO-RE offset relocation does not work
if any struct/union member or array element is a typedef.
For example,
  typedef const int arr_t[7];
  struct input {
      arr_t a;
  };
  func(...) {
       struct input *in = ...;
       ... __builtin_preserve_access_index(&in->a[1]) ...
  }
The BPF backend calculated default offset is 0 while
4 is the correct answer. Similar issues exist for struct/union
typedef's.

When getting struct/union member or array element type,
we should trace down to the type by skipping typedef
and qualifiers const/volatile as this is what clang did
to generate getelementptr instructions.
(const/volatile member type qualifiers are already
ignored by clang.)

This patch fixed this issue, for each access index,
skipping typedef and const/volatile/restrict BTF types.

Signed-off-by: Yonghong Song <yhs@fb.com>
Differential Revision: https://reviews.llvm.org/D65259

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367062 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[FileCollector] add support for recording empty directories
Alex Lorenz [Thu, 25 Jul 2019 21:47:11 +0000 (21:47 +0000)]
[FileCollector] add support for recording empty directories

The file collector class is useful for constructing reproducers by
creating a snapshot of the files that are accessed. Sometimes it might
also be important to construct directories that don't necessarily have files,
but are still accessed by some tool that we want to make a reproducer for.
This is useful for instance for modeling the behavior of Clang's header search,
which scans through a number of directories it doesn't actually access when
looking for framework headers. This commit extends the file collector to allow
it to work with paths that are just directories, by constructing them as the
files are copied over.

Differential Revision: https://reviews.llvm.org/D65297

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367061 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][GlobalISel] Fix G_SELECT legalization fallback after r366943.
Amara Emerson [Thu, 25 Jul 2019 21:44:52 +0000 (21:44 +0000)]
[AArch64][GlobalISel] Fix G_SELECT legalization fallback after r366943.

Changes the order of legalization of G_ICMP suggested by Petar in D65079.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367060 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReland the "[NewPM] Port Sancov" patch from rL365838. No functional
Leonard Chan [Thu, 25 Jul 2019 20:53:15 +0000 (20:53 +0000)]
Reland the "[NewPM] Port Sancov" patch from rL365838. No functional
changes were made to the patch since then.

--------

[NewPM] Port Sancov

This patch contains a port of SanitizerCoverage to the new pass manager. This one's a bit hefty.

Changes:

- Split SanitizerCoverageModule into 2 SanitizerCoverage for passing over
  functions and ModuleSanitizerCoverage for passing over modules.
- ModuleSanitizerCoverage exists for adding 2 module level calls to initialization
  functions but only if there's a function that was instrumented by sancov.
- Added legacy and new PM wrapper classes that own instances of the 2 new classes.
- Update llvm tests and add clang tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367053 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PredicateInfo] Replace pointer comparisons with deterministic compares.
Florian Hahn [Thu, 25 Jul 2019 20:48:13 +0000 (20:48 +0000)]
[PredicateInfo] Replace pointer comparisons with deterministic compares.

Currently there are a few pointer comparisons in ValueDFS_Compare, which
can cause non-deterministic ordering when materializing values. There
are 2 cases this patch fixes:

1. Order defs before uses used to compare pointers, which guarantees
   defs before uses, but causes non-deterministic ordering between 2
   uses or 2 defs, depending on the allocation order. By converting the
   pointers to booleans, we can circumvent that problem.

2. comparePHIRelated was comparing the basic block pointers of edges,
   which also results in a non-deterministic order and is also not
   really meaningful for ordering. By ordering by their destination DFS
   numbers we guarantee a deterministic order.

For the example below, we can end up with 2 different uselist orderings,
when running `opt -mem2reg -ipsccp` hundreds of times. Because the
non-determinism is caused by allocation ordering, we cannot reproduce it
with ipsccp alone.

    declare i32 @hoge() local_unnamed_addr #0

    define dso_local i32 @ham(i8* %arg, i8* %arg1) #0 {
    bb:
      %tmp = alloca i32
      %tmp2 = alloca i32, align 4
      br label %bb19

    bb4:                                              ; preds = %bb20
      br label %bb6

    bb6:                                              ; preds = %bb4
      %tmp7 = call i32 @hoge()
      store i32 %tmp7, i32* %tmp
      %tmp8 = load i32, i32* %tmp
      %tmp9 = icmp eq i32 %tmp8, 912730082
      %tmp10 = load i32, i32* %tmp
      br i1 %tmp9, label %bb11, label %bb16

    bb11:                                             ; preds = %bb6
      unreachable

    bb13:                                             ; preds = %bb20
      br label %bb14

    bb14:                                             ; preds = %bb13
      %tmp15 = load i32, i32* %tmp
      br label %bb16

    bb16:                                             ; preds = %bb14, %bb6
      %tmp17 = phi i32 [ %tmp10, %bb6 ], [ 0, %bb14 ]
      br label %bb19

    bb18:                                             ; preds = %bb20
      unreachable

    bb19:                                             ; preds = %bb16, %bb
      br label %bb20

    bb20:                                             ; preds = %bb19
      indirectbr i8* null, [label %bb4, label %bb13, label %bb18]
    }

Reviewers: davide, efriedma

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D64866

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367049 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][DivRemPairs] Tests with rem in expanded form (PR42673)
Roman Lebedev [Thu, 25 Jul 2019 20:26:34 +0000 (20:26 +0000)]
[NFC][DivRemPairs] Tests with rem in expanded form (PR42673)

As discussed in https://bugs.llvm.org/show_bug.cgi?id=42673
there is a TTI hook hasDivRemOp() that matters here.
While -div-rem-pairs will decompose 'rem' if that hook returns false,
nothing does the opposite transform.

We can't to this in InstCombine, because it does not currently
access TTI, and i'm not sure we should change that.

We can't really do that in DAGCombine since it also currently does not
access TTI.

Therefore only DivRemPairs is left.

https://bugs.llvm.org/show_bug.cgi?id=42673

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367046 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Loop Peeling] Fix idom detection algorithm.
Serguei Katkov [Thu, 25 Jul 2019 19:31:50 +0000 (19:31 +0000)]
[Loop Peeling] Fix idom detection algorithm.

We'd like to determine the idom of exit block after peeling one iteration.
Let Exit is exit block.
Let ExitingSet - is a set of predecessors of Exit block. They are exiting blocks.
Let Latch' and ExitingSet' are copies after a peeling.
We'd like to find an idom'(Exit) - idom of Exit after peeling.
It is an evident that idom'(Exit) will be the nearest common dominator of ExitingSet and ExitingSet'.
idom(Exit) is a nearest common dominator of ExitingSet.
idom(Exit)' is a nearest common dominator of ExitingSet'.
Taking into account that we have a single Latch, Latch' will dominate Header and idom(Exit).
So the idom'(Exit) is nearest common dominator of idom(Exit)' and Latch'.
All these basic blocks are in the same loop, so what we find is
(nearest common dominator of idom(Exit) and Latch)'.

Reviewers: reames, fhahn
Reviewed By: reames
Subscribers: hiraditya, zzheng, llvm-commits
Differential Revision: https://reviews.llvm.org/D65292

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367044 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DDG] DirectedGraph as a base class for various dependence graphs such
Whitney Tsang [Thu, 25 Jul 2019 18:23:22 +0000 (18:23 +0000)]
[DDG] DirectedGraph as a base class for various dependence graphs such
as DDG and PDG.
Summary:
This is an implementation of a directed graph base class with explicit
representation of both nodes and edges. This implementation makes the
edges explicit because we expect to assign various attributes (such as
dependence type, distribution interference weight, etc) to the edges in
the derived classes such as DDG and DIG. The DirectedGraph consists of a
list of DGNode's. Each node consists of a (possibly empty) list of
outgoing edges to other nodes in the graph. A DGEdge contains a
reference to a single target node. Note that nodes do not know about
their incoming edges so the DirectedGraph class provides a function to
find all incoming edges to a given node.

This is the first patch in a series of patches that we are planning to
contribute upstream in order to implement Data Dependence Graph and
Program Dependence Graph.

More information about the proposed design can be found here:
https://ibm.ent.box.com/v/directed-graph-and-ddg
Authored By: bmahjour
Reviewer: Meinersbur, myhsum hfinkel, fhahn, jdoerfert, kbarton
Reviewed By: Meinersbur
Subscribers: mgorny, wuzish, jsji, lebedev.ri, dexonsmith, kristina,
llvm-commits, Whitney, etiotto
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D64088

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367043 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SimplifyCFG] avoid crashing after simplifying a switch (PR42737)
Sanjay Patel [Thu, 25 Jul 2019 17:01:12 +0000 (17:01 +0000)]
[SimplifyCFG] avoid crashing after simplifying a switch (PR42737)

Later code in TryToSimplifyUncondBranchFromEmptyBlock() assumes that
we have cleaned up unreachable blocks, but that was not happening
with this switch transform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367037 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMake GCC happy about attribute location
JF Bastien [Thu, 25 Jul 2019 16:58:15 +0000 (16:58 +0000)]
Make GCC happy about attribute location

It doesn't like function attributes on definitions, only declarations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367036 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix unused function from r367031
JF Bastien [Thu, 25 Jul 2019 16:50:10 +0000 (16:50 +0000)]
Fix unused function from r367031

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367035 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][CodeGen][X86][AArch64] div-rem pair reconstruction tests (PR42673)
Roman Lebedev [Thu, 25 Jul 2019 16:39:57 +0000 (16:39 +0000)]
[NFC][CodeGen][X86][AArch64] div-rem pair reconstruction tests (PR42673)

As discussed in https://bugs.llvm.org/show_bug.cgi?id=42673
there is a TTI hook hasDivRemOp() that matters here.
While -div-rem-pairs will decompose 'rem' if that hook returns false,
nothing does the opposite transform.

We can't to this in InstCombine, because it does not currently
access TTI, and i'm not sure we should change that.

We may be able to teach DivRemPairs to do this, but this really is a
per-target perf optimization, and we seem to do the opposite transform
in backend if hasDivRemOp() returned false: https://godbolt.org/z/ttt4HZ
I think it makes sense to be consistent.

https://bugs.llvm.org/show_bug.cgi?id=42673

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367034 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LOOPINFO] Introduce the loop guard API.
Whitney Tsang [Thu, 25 Jul 2019 16:13:18 +0000 (16:13 +0000)]
[LOOPINFO] Introduce the loop guard API.
Summary:
This is the first patch for the loop guard. We introduced
getLoopGuardBranch() and isGuarded().
This currently only works on simplified loop, as it requires a preheader
and a latch to identify the guard.
It will work on loops of the form:
/// GuardBB:
///   br cond1, Preheader, ExitSucc <== GuardBranch
/// Preheader:
///   br Header
/// Header:
///  ...
///   br Latch
/// Latch:
///   br cond2, Header, ExitBlock
/// ExitBlock:
///   br ExitSucc
/// ExitSucc:
Prior discussions leading upto the decision to introduce the loop guard
API: http://lists.llvm.org/pipermail/llvm-dev/2019-May/132607.html
Reviewer: reames, kbarton, hfinkel, jdoerfert, Meinersbur, dmgreen
Reviewed By: reames
Subscribers: wuzish, hiraditya, jsji, llvm-commits, bmahjour, etiotto
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D63885

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367033 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAllow prefetching from non-zero address spaces
JF Bastien [Thu, 25 Jul 2019 16:11:57 +0000 (16:11 +0000)]
Allow prefetching from non-zero address spaces

Summary:
This is useful for targets which have prefetch instructions for non-default address spaces.

<rdar://problem/42662136>

Subscribers: nemanjai, javed.absar, hiraditya, kbarton, jkorous, dexonsmith, cfe-commits, llvm-commits, RKSimon, hfinkel, t.p.northover, craig.topper, anemet

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D65254

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367032 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoCrashHandler: be careful about crashing while handling
JF Bastien [Thu, 25 Jul 2019 16:07:41 +0000 (16:07 +0000)]
CrashHandler: be careful about crashing while handling

Summary:
Looking at the current Apple-specific code for crash handling it does a few
silly things that I think we should avoid while handling crashes:

  * Try real hard not to allocate.
  * Set the global crash reporter string early so that any crash while
    generating the stack trace will still report some info.
  * Prevent reordering of operations in the current thread.

<rdar://problem/53503334>

Subscribers: hiraditya, jkorous, dexonsmith, llvm-commits, beanz, Bigcheese, thakis, lattner, jordan_rose

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65235

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367031 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[BPF] fix CO-RE incorrect index access string
Yonghong Song [Thu, 25 Jul 2019 16:01:26 +0000 (16:01 +0000)]
[BPF] fix CO-RE incorrect index access string

Currently, we expect the CO-RE offset relocation records
a string encoding the original getelementptr access index,
so kernel bpf loader can decode it correctly.

For example,
  struct s { int a; int b; };
  struct t { int c; int d; };
  #define _(x) (__builtin_preserve_access_index(x))
  int get_value(const void *addr1, const void *addr2);
  int test(struct s *arg1, struct t *arg2) {
    return get_value(_(&arg1->b), _(&arg2->d));
  }

We expect two offset relocations:
  reloc 1: type s, access index 0, 1
  reloc 2: type t, access index 0, 1

Two globals are created to retain access indexes for the
above two relocations with global variable names.
The first global has a name "0:1:". Unfortunately,
the second global has the name "0:1:.1" as the llvm
internals automatically add suffix ".1" to a global
with the same name. Later on, the BPF peels the last
character and record "0:1" and "0:1:." in the
relocation table.

This is not desirable. BPF backend could use the global
variable suffix knowledge to generate correct access str.
This patch rather took an approach not relying on
that knowledge. It generates "s:0:1:" and "t:0:1:" to
avoid global variable suffixes and later on generate
correct index access string "0:1" for both records.

Signed-off-by: Yonghong Song <yhs@fb.com>
Differential Revision: https://reviews.llvm.org/D65258

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367030 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[InstCombine] try to narrow a truncated load"
Vlad Tsyrklevich [Thu, 25 Jul 2019 15:37:57 +0000 (15:37 +0000)]
Revert "[InstCombine] try to narrow a truncated load"

This reverts commit bc4a63fd3c29c1a8ce22891bf34ee4dccfef578c, this is a
speculative revert to fix a number of sanitizer bots (like
sanitizer-x86_64-linux-bootstrap-ubsan) that have started to see stage2
compiler crashes, presumably due to a miscompile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367029 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PredicateInfo] Use SmallVector instead of SmallPtrSet.
Florian Hahn [Thu, 25 Jul 2019 15:35:10 +0000 (15:35 +0000)]
[PredicateInfo] Use SmallVector instead of SmallPtrSet.

We do not need the SmallPtrSet to avoid adding duplicates to
OpsToRename, because we already keep a ValueInfo mapping. If we see an
op for the first time, Infos will be empty and we can also add it to
OpsToRename.

We process operands by visiting BBs depth-first and then iterate over
all instructions & users, so the order should be deterministic.
Therefore we can skip one round of sorting, which we purely needed for
guaranteeing a deterministic order when iterating over the SmallPtrSet.

Reviewers: efriedma, davide

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D64816

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367028 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Run `unreachable-mbb-elimination` after isel to clean up PHIs.
Michael Liao [Thu, 25 Jul 2019 14:50:18 +0000 (14:50 +0000)]
[AMDGPU] Run `unreachable-mbb-elimination` after isel to clean up PHIs.

Summary:
- As LCSSA is turned on just before isel, it may create PHI of the flow,
  which is consumed by pseudo structurized CFG instructions. When that
  PHIs are eliminated in O0, COPY may be placed wrongly as the these
  pseudo structurized CFG instructions are considering prologue of MBB.
- Run extra `unreachable-mbb-elimination` at the end of isel to clean up
  PHIs.

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64353

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367023 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][SVE] Allow explicit size specifier for predicate operand
Momchil Velikov [Thu, 25 Jul 2019 13:56:04 +0000 (13:56 +0000)]
[AArch64][SVE] Allow explicit size specifier for predicate operand

... for the vector forms of `{SQ,UQ,}{INC,DEC}P` instructions. Also continue
supporting the exsting behaviour of not requiring an explicit size
specifier. The preferred disasembly is *with* the specifier.

This is implemented by redefining intruction forms to require vector predicates
with explicit size and adding aliases, which allow a predicate with no size.

Differential Revision: https://reviews.llvm.org/D65145

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367019 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Don't assert on v4f16 arguments to shader calling conventions
Matt Arsenault [Thu, 25 Jul 2019 13:55:07 +0000 (13:55 +0000)]
AMDGPU: Don't assert on v4f16 arguments to shader calling conventions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367018 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IR][PatternMatch] Introduce m_NegatedPower2() matcher
Roman Lebedev [Thu, 25 Jul 2019 13:34:24 +0000 (13:34 +0000)]
[IR][PatternMatch] Introduce m_NegatedPower2() matcher

Summary:
It is a good idea to do as much matching inside of `match()` as possible.
If some checking is done afterwards, and we don't fold because of it,
chances are we may have missed some commutative pattern.

Reviewers: spatel, craig.topper, RKSimon

Reviewed By: spatel, RKSimon

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64038

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367017 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IR][PatternMatch] introduce m_Unless() matcher
Roman Lebedev [Thu, 25 Jul 2019 13:34:14 +0000 (13:34 +0000)]
[IR][PatternMatch] introduce m_Unless() matcher

Summary:
I don't think it already exists? I don't see it at least.
It is important to have it because else we'll do some checks after `match()`,
and that may result in missed folds in commutative nodes.

Reviewers: spatel, craig.topper, RKSimon, majnemer

Reviewed By: spatel

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64037

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367016 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Utils] remove duplicated documentation comments; NFC
Sanjay Patel [Thu, 25 Jul 2019 13:11:21 +0000 (13:11 +0000)]
[Utils] remove duplicated documentation comments; NFC

http://llvm.org/docs/CodingStandards.html#doxygen-use-in-documentation-comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367015 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] concatSubVectors - remove unnecessary args. NFCI.
Simon Pilgrim [Thu, 25 Jul 2019 13:05:46 +0000 (13:05 +0000)]
[X86] concatSubVectors - remove unnecessary args. NFCI.

All these args can be cheaply recomputed and it makes it much easier to use the function as a quick helper.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367014 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] try to narrow a truncated load
Sanjay Patel [Thu, 25 Jul 2019 12:14:27 +0000 (12:14 +0000)]
[InstCombine] try to narrow a truncated load

trunc (load X) --> load (bitcast X to narrow type)

We have this transform in DAGCombiner::ReduceLoadWidth(), but the truncated
load pattern can interfere with other instcombine transforms, so I'd like to
allow the fold sooner.

Example:
https://bugs.llvm.org/show_bug.cgi?id=16739
...in that report, we have bitcasts bracketing these ops, so those could get
eliminated too.

We've generally ruled out widening of loads early in IR ( LoadCombine -
http://lists.llvm.org/pipermail/llvm-dev/2016-September/105291.html ), but
that reasoning may not apply to narrowing if we can preserve information
such as the dereferenceable range.

Differential Revision: https://reviews.llvm.org/D64432

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367011 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM][AArch64] Support for Cortex-A65 & A65AE, Neoverse E1 & N1
Pablo Barrio [Thu, 25 Jul 2019 10:59:45 +0000 (10:59 +0000)]
[ARM][AArch64] Support for Cortex-A65 & A65AE, Neoverse E1 & N1

Summary:
Add support for Cortex-A65, Cortex-A65AE, Neoverse E1 and Neoverse N1.
Neoverse E1 and Cortex-A65(&AE) only implement the AArch64 state of the
Arm architecture. Neoverse N1 implements both AArch32 and AArch64.

Cortex-A65:
https://developer.arm.com/ip-products/processors/cortex-a/cortex-a65

Cortex-A65AE:
https://developer.arm.com/ip-products/processors/cortex-a/cortex-a65ae

Neoverse E1:
https://developer.arm.com/ip-products/processors/neoverse/neoverse-e1

Neoverse N1:
https://developer.arm.com/ip-products/processors/neoverse/neoverse-n1

Patch by Diogo Sampaio and Pablo Barrio

Reviewers: samparker, LukeCheeseman, sbaranga, ostannard

Reviewed By: ostannard

Subscribers: ostannard, javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64406

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367007 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert rL366946 : [Remarks] Add support for serializing metadata for every remark...
Simon Pilgrim [Thu, 25 Jul 2019 10:20:39 +0000 (10:20 +0000)]
Revert rL366946 : [Remarks] Add support for serializing metadata for every remark streamer

This allows every serializer format to implement metaSerializer() and
return the corresponding meta serializer.
........
Fix windows build bots
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-win-fast
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367004 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRecommit "rL366894: [yaml2obj] - Allow custom fields for the SHT_UNDEF sections."
George Rimar [Thu, 25 Jul 2019 10:19:23 +0000 (10:19 +0000)]
Recommit "rL366894: [yaml2obj] - Allow custom fields for the SHT_UNDEF sections."

With fix: do not use `stat` tool.

Original commit message:

This is a follow-up refactoring patch for recently
introduced functionality which which reduces the code duplication
and also makes possible to redefine all possible fields of
the first SHT_NULL section (previously it was only possible to set
sh_link and sh_size).

Differential revision: https://reviews.llvm.org/D65140

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367003 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MC] Delete unused MCInstPrinter::markup overload and getPrintHexStyle
Fangrui Song [Thu, 25 Jul 2019 09:54:12 +0000 (09:54 +0000)]
[MC] Delete unused MCInstPrinter::markup overload and getPrintHexStyle

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367000 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IPSCCP] Add assertion to surface cases where we zap returns with overdefined users.
Florian Hahn [Thu, 25 Jul 2019 09:37:09 +0000 (09:37 +0000)]
[IPSCCP] Add assertion to surface cases where we zap returns with overdefined users.

We should only zap returns in functions, where all live users have a
replace-able value (are not overdefined). Unused return values should be
undefined.

This should make it easier to detect bugs like in PR42738.

Alternatively we could bail out of zapping the function returns, but I
think it would be better to address those divergences between function
and call-site values where they are actually caused.

Reviewers: davide, efriedma

Reviewed By: davide, efriedma

Differential Revision: https://reviews.llvm.org/D65222

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366998 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC][NFC] Make `getDefMIPostRA` public
Kai Luo [Thu, 25 Jul 2019 08:36:44 +0000 (08:36 +0000)]
[PowerPC][NFC] Make `getDefMIPostRA` public

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366995 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LV] Scalar Epilogue Lowering. NFC.
Sjoerd Meijer [Thu, 25 Jul 2019 08:06:02 +0000 (08:06 +0000)]
[LV] Scalar Epilogue Lowering. NFC.

This refactors boolean 'OptForSize' that was passed around in a lot of places.
It controlled folding of the tail loop, the scalar epilogue, into the main loop
but code-size reasons may not be the only reason to do this. Thus, this is a
first step to generalise the concept of tail-loop folding, and hence OptForSize
has been renamed and is using an enum ScalarEpilogueStatus that holds the
status how the epilogue should be lowered.

This will be followed up by D65197, that picks up the predicate loop hint and
performs the tail-loop folding.

Differential Revision: https://reviews.llvm.org/D64916

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366993 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC][NFC] Added `getDefMIPostRA` method
Kai Luo [Thu, 25 Jul 2019 07:47:52 +0000 (07:47 +0000)]
[PowerPC][NFC] Added `getDefMIPostRA` method

Summary:
In PostRA phase, we often have to find out the most recent definition
of a register.  This patch adds getDefMIPostRA so that other methods
can use it rather than implementing it repeatedly.

Differential Revision: https://reviews.llvm.org/D65131

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366990 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Clang] New loop pragma vectorize_predicate
Sjoerd Meijer [Thu, 25 Jul 2019 07:33:13 +0000 (07:33 +0000)]
[Clang] New loop pragma vectorize_predicate

This adds a new vectorize predication loop hint:

  #pragma clang loop vectorize_predicate(enable)

that can be used to indicate to the vectoriser that all (load/store)
instructions should be predicated (masked). This allows, for example, folding
of the remainder loop into the main loop.

This patch will be followed up with D64916 and D65197. The former is a
refactoring in the loopvectorizer and the groundwork to make tail loop folding
a more general concept, and in the latter the actual tail loop folding
transformation will be implemented.

Differential Revision: https://reviews.llvm.org/D64744

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366989 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MC] Add MCInstrAnalysis::evaluateMemoryOperandAddress
Seiya Nuta [Thu, 25 Jul 2019 06:57:09 +0000 (06:57 +0000)]
[MC] Add MCInstrAnalysis::evaluateMemoryOperandAddress

Summary:
Add a new method which tries to compute the target address referenced by an operand.

This patch supports x86_64 RIP-relative addressing for now.

It is necessary to print referenced symbol names in llvm-objdump.

Reviewers: andreadb, MaskRay, grosbach, jgalenson, craig.topper

Reviewed By: MaskRay, craig.topper

Subscribers: bcain, rupprecht, jhenderson, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63847

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366987 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[BasicAA] Temporarily disable two tests
George Burgess IV [Thu, 25 Jul 2019 06:53:59 +0000 (06:53 +0000)]
[BasicAA] Temporarily disable two tests

These tests are breaking three independent upstream buildbots (as well
downstream ones). These breakages have appeared mysteriously,
consistently, and during different revisions. Sadly, none of
{ASAN,TSAN,MSAN,UBSAN} flag anything, so the cause here is nonobvious.

Until we've figured this out, it seems best to disable these tests
entirely, so that the affected bots don't remain silent about any other,
unrelated failures.

Please see PR42719 for more information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366986 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objdump][NFC] Make the PrettyPrinter::printInst() output buffered
Seiya Nuta [Thu, 25 Jul 2019 06:38:27 +0000 (06:38 +0000)]
[llvm-objdump][NFC] Make the PrettyPrinter::printInst() output buffered

Summary:
Every time PrettyPrinter::printInst is called, stdout is flushed and it makes llvm-objdump slow. This patches adds a string
buffer to prevent stdout from being flushed.

Benchmark results (./llvm-objdump-master: without this patch,  ./bin/llvm-objcopy: with this patch):

  $ hyperfine --warmup 10 './llvm-objdump-master -d ./bin/llvm-objcopy' './bin/llvm-objdump -d ./bin/llvm-objcopy'
  Benchmark #1: ./llvm-objdump-master -d ./bin/llvm-objcopy
    Time (mean ± σ):      2.230 s ±  0.050 s    [User: 1.533 s, System: 0.682 s]
    Range (min … max):    2.115 s …  2.278 s    10 runs

  Benchmark #2: ./bin/llvm-objdump -d ./bin/llvm-objcopy
    Time (mean ± σ):     386.4 ms ±  13.0 ms    [User: 376.6 ms, System: 6.1 ms]
    Range (min … max):   366.1 ms … 407.0 ms    10 runs

  Summary
    './bin/llvm-objdump -d ./bin/llvm-objcopy' ran
      5.77 ± 0.23 times faster than './llvm-objdump-master -d ./bin/llvm-objcopy'

Reviewers: alexshap, Bigcheese, jhenderson, rupprecht, grimar, MaskRay

Reviewed By: jhenderson, MaskRay

Subscribers: dexonsmith, jhenderson, javed.absar, kristof.beyls, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366984 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[lit] Protect full test suite from FILECHECK_OPTS
Joel E. Denny [Thu, 25 Jul 2019 03:14:32 +0000 (03:14 +0000)]
[lit] Protect full test suite from FILECHECK_OPTS

lit's test suite calls lit multiple times for various sample test
suites.  `FILECHECK_OPTS` is safe for FileCheck calls in lit's test
suite.  It's not safe for FileCheck calls in the sample test suites,
whose output affects the results of lit's test suite.

Without this patch, only one such sample test suite is protected from
`FILECHECK_OPTS`, and I admit I haven't discovered other cases for
which I can produce false failures using `FILECHECK_OPTS`.  However,
it's hard to predict the future, especially false passes.  Thus, this
patch protects all existing and future sample test suites from
`FILECHECK_OPTS` (and the deprecated
`FILECHECK_DUMP_INPUT_ON_FAILURE`).

Reviewed By: probinson

Differential Revision: https://reviews.llvm.org/D65156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366980 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogithub-upload-release.py: Fix script name in examples
Tom Stellard [Thu, 25 Jul 2019 01:49:49 +0000 (01:49 +0000)]
github-upload-release.py: Fix script name in examples

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366978 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd github-release.py script
Tom Stellard [Thu, 25 Jul 2019 01:43:36 +0000 (01:43 +0000)]
Add github-release.py script

Summary:
This script can be used for uploading relases sources and binaries
to github.

Reviewers: hans

Reviewed By: hans

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64841

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366977 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC] exclude more icmps in LSR which is converted in later hardware loop pass
Chen Zheng [Thu, 25 Jul 2019 01:22:08 +0000 (01:22 +0000)]
[PowerPC] exclude more icmps in LSR which is converted in later hardware loop pass
Differential Revision: https://reviews.llvm.org/D64795

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366976 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[FileCollector] Update unit test to match coding style.
Jonas Devlieghere [Thu, 25 Jul 2019 00:46:58 +0000 (00:46 +0000)]
[FileCollector] Update unit test to match coding style.

I changed the FileCollector coding style but didn't update the
corresponding unit test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366973 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-lipo] Implement alignment function in -create
Shoaib Meenai [Thu, 25 Jul 2019 00:29:19 +0000 (00:29 +0000)]
[llvm-lipo] Implement alignment function in -create

Summary:
Removes hard coded valuse for alignment in -create.

Patch by Anusha Basana <anusha.basana@gmail.com>

Differential Revision: https://reviews.llvm.org/D64871

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366970 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Object] Add public MaxSectionAlignment to MachOUniversal
Shoaib Meenai [Thu, 25 Jul 2019 00:29:13 +0000 (00:29 +0000)]
[Object] Add public MaxSectionAlignment to MachOUniversal

Change MAXSECTALIGN to a public MaxSectionAlignment in MachOUniversal.
Will be used in a follow-up.

Patch by Anusha Basana <anusha.basana@gmail.com>

Differential Revision: https://reviews.llvm.org/D65117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366969 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-lipo] Add test for -verify_archs
Shoaib Meenai [Thu, 25 Jul 2019 00:29:07 +0000 (00:29 +0000)]
[llvm-lipo] Add test for -verify_archs

Add test to verify clean failure, exit code 1 for valid architecture not
present in the universal binary.

Patch by Anusha Basana <anusha.basana@gmail.com>

Differential Revision: https://reviews.llvm.org/D65251

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366968 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[FileCollector] Change coding style from LLDB to LLVM (NFC)
Jonas Devlieghere [Thu, 25 Jul 2019 00:17:39 +0000 (00:17 +0000)]
[FileCollector] Change coding style from LLDB to LLVM (NFC)

This patch changes the coding style of the FileCollector from the LLDB
to the LLVM coding style. Alex recently lifted it into LLVM and I
volunteered to do the conversion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366966 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Remarks][NFC] Rename remarks::Parser to remarks::RemarkParser
Francis Visoiu Mistrih [Thu, 25 Jul 2019 00:16:56 +0000 (00:16 +0000)]
[Remarks][NFC] Rename remarks::Parser to remarks::RemarkParser

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366965 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs] Split out a section on LoopInfo in the new loop documentation
Philip Reames [Wed, 24 Jul 2019 23:46:13 +0000 (23:46 +0000)]
[docs] Split out a section on LoopInfo in the new loop documentation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366964 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Remove dead code from ARMConstantIslands.
Eli Friedman [Wed, 24 Jul 2019 23:36:14 +0000 (23:36 +0000)]
[ARM] Remove dead code from ARMConstantIslands.

tLDRHi is not a pc-relative load; it can't directly refer to a
constant pool or jump table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366963 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Swap order of checks to improve compile time (NFC)
Evandro Menezes [Wed, 24 Jul 2019 23:31:04 +0000 (23:31 +0000)]
[InstCombine] Swap order of checks to improve compile time (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366962 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoApply a few more reviewer suggestions from D65164
Philip Reames [Wed, 24 Jul 2019 23:30:56 +0000 (23:30 +0000)]
Apply a few more reviewer suggestions from D65164

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366961 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDefine some basic terminology around loops in our documentation
Philip Reames [Wed, 24 Jul 2019 23:24:13 +0000 (23:24 +0000)]
Define some basic terminology around loops in our documentation

I've noticed a lot of confusion around this area recently with key terms being misused in a number of threads. To help reign that in, let's go ahead and document the current terminology and meaning thereof.

My hope is to grow this over time into a broader discussion of canonical loop forms - yes, there are more than one ... many more than one - but for the moment, simply having the key terminology is a good stopping place.

Note: I am landing this *without* an LGTM.  All feedback so far has been positive, and trying to apply all of the suggested changes/extensions would cause the review to never end.  Instead, I decided to land it with the obvious fixes made based on reviewer comments, then iterate from there.

Differential Revision: https://reviews.llvm.org/D65164

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366960 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][GlobalISel] Select immediate modes for ADD when selecting G_GEP
Jessica Paquette [Wed, 24 Jul 2019 23:11:01 +0000 (23:11 +0000)]
[AArch64][GlobalISel] Select immediate modes for ADD when selecting G_GEP

Before, we weren't able to select things like this for G_GEP:

add x0, x8, #8

And instead we'd materialize the 8.

This teaches GISel to do that. It gives some considerable code size savings
on 252.eon-- about 4%!

Differential Revision: https://reviews.llvm.org/D65248

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366959 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix unittest build issue in r366956
Alex Lorenz [Wed, 24 Jul 2019 23:10:35 +0000 (23:10 +0000)]
Fix unittest build issue in r366956

I marked the fields as private, but they're needed by the unittest.
I'll have to fix that up separarely in a follow-up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366958 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][GlobalISel] Don't try to use GISel if subtarget doesn't have neon or fp.
Amara Emerson [Wed, 24 Jul 2019 23:00:04 +0000 (23:00 +0000)]
[AArch64][GlobalISel] Don't try to use GISel if subtarget doesn't have neon or fp.

Throughout the legalizerinfo we currently make the assumption that the target
has neon and FP target features available. Fixing it will require a refactor of
the whole thing, so until then make sure we fall back.

Works around PR42734

Differential Revision: https://reviews.llvm.org/D65244

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366957 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Support] move FileCollector from LLDB to llvm/Support
Alex Lorenz [Wed, 24 Jul 2019 22:59:20 +0000 (22:59 +0000)]
[Support] move FileCollector from LLDB to llvm/Support

The file collector class is useful for creating reproducers,
not just for LLDB, but for other tools as well in LLVM/Clang.

Differential Revision: https://reviews.llvm.org/D65237

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366956 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold
Roman Lebedev [Wed, 24 Jul 2019 22:57:22 +0000 (22:57 +0000)]
[Codegen] (X & (C l>>/<< Y)) ==/!= 0  -->  ((X <</l>> Y) & C) ==/!= 0  fold

Summary:
This was originally reported in D62818.
https://rise4fun.com/Alive/oPH

InstCombine does the opposite fold, in hope that `C l>>/<< Y` expression
will be hoisted out of a loop if `Y` is invariant and `X` is not.
But as it is seen from the diffs here, if it didn't get hoisted,
the produced assembly is almost universally worse.

Much like with my recent "hoist add/sub by/from const" patches,
we should get almost universal win if we hoist constant,
there is almost always an "and/test by imm" instruction,
but "shift of imm" not so much, so we may avoid having to
materialize the immediate, and thus need one less register.
And since we now shift not by constant, but by something else,
the live-range of that something else may reduce.

Special care needs to be applied not to disturb x86 `BT` / hexagon `tstbit`
instruction pattern. And to not get into endless combine loop.

Reviewers: RKSimon, efriedma, t.p.northover, craig.topper, spatel, arsenm

Reviewed By: spatel

Subscribers: hiraditya, MaskRay, wuzish, xbolva00, nikic, nemanjai, jvesely, wdng, nhaehnle, javed.absar, tpr, kristof.beyls, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62871

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366955 91177308-0d34-0410-b5e6-96231b3b80d8