Ivan Grokhotkov [Thu, 4 May 2017 06:49:33 +0000 (14:49 +0800)]
vfs_fat: allocate FIL structures on the heap in vfs_fat_link
vfs_fat_link opened two files to perform copy operation. File structures
were allocated on the stack. When _MAX_SS setting was increased in
ffconf.h due to wear levelling feature, the size of these structures
increased to ~4k each (~8k total). This exceeds stack size allocated for
tasks in most typical cases.
This change makes file structures dynamically allocated.
Ivan Grokhotkov [Thu, 4 May 2017 06:46:11 +0000 (14:46 +0800)]
vfs_fat: fix prepend_drive_to_path
Originally, prepend_drive_to_path was designed to be a macro, and it
modified local path variables to point to a temporary buffers.
When it was converted into a function, modification to path variables
were no longer visible outside of this function.
In addition to that, prepend_drive_to_path allocated 2k bytes on the
stack for temporary path buffers. This is replaced with path buffers
allocated as part of vfs_fat context object. Locking is added around
parts of code which use these temporary buffers.
Additionally, _lock member of vfs_fat_ctx_t was placed after the
variable-sized files array, which caused the first entry in the
array to be never used. This change fixes the order of members
and adds comments.
Ivan Grokhotkov [Fri, 28 Apr 2017 11:57:42 +0000 (19:57 +0800)]
Merge branch 'bugfix/rtc_fast_freq_init' into 'master'
esp32: select 8M clock as RTC_FAST_CLK on startup
Even though RTC_CLK_CONFIG_DEFAULT correctly had RTC_FAST_FREQ_8M as the
fast clock, the bootloader modified fast_freq field to the currently
selected RTC_FAST_CLK (so that the clock choice is not affected by the
bootloader). The application startup code never switched to 8M clock,
which caused the default (XTAL/4) to be used as RTC_FAST_CLK. This had
caused a number of issues, such as touch pads not working in deep sleep.
Ivan Grokhotkov [Fri, 28 Apr 2017 11:55:26 +0000 (19:55 +0800)]
Merge branch 'bugfix/assert_on_pin_task_nonexistent_cpu' into 'master'
Assert when a new task is started on a nonexisting CPU
Previously, starting a task on a CPU ID higher than the amount of CPUs FreeRTOS is configured with would not start the task and possibly have unintended side effects due to some out-of-bounds array writes. Assert on this so the app aborts cleanly.
Ivan Grokhotkov [Fri, 28 Apr 2017 11:54:46 +0000 (19:54 +0800)]
Merge branch 'bugfix/fix_wifi_ebuf_sanity_check_not_pass_issue' into 'master'
esp32: update WiFi lib for ebuf sanity check fail issue
By default the WiFi canary check is disabled, before release 2.1, we only have canary check for AMPDU, in release2.1, we add sanity check for all kinds of dynamic ebuf, the checking is disabled by default for performance reason. We found some kinds of packets can't pass sanity check, this MR is to fix it.
Merge branch 'bugfix/adjust_lwip_options_and_update_wifi_lib' into 'master'
esp32/lwip: adjust some lwip options and update wifi lib
1. Modify TCP TX window from 2 to 4 to keep RX/TX window same size
２. Modify TCPIP task stack default size from 2048 to 2560 to avoid stack overflow
３. Update wifi lib for TCP performance optimization
I2S driver - fixed support for 24 and 32-bits, fixed tx/rx at the same time
- Modify sample can test with 24, 32-bits audio
- Add i2s sample README
- simply i2s_push function
- change sample rates, bits per sample, channel on fly
Merge branch 'feature/doc_get-started' into 'master'
doc: Getting Started guides
* [x] Redesign ReadTheDocs home page to cover the following sections:
* Get Started (new + revised contents, see below)
* API Reference
* H/W Reference
* API Guides (former "What Else?")
* Contribute
* Resources
* [x] Convert "Getting Started" guides from PDF to RST, review and update
* ESP32-DevKitC Getting Started Guide
* ESP-WROVER-KIT Getting Started Guide
* [x] Review installation manuals for Windows, Linux and MacOS
* Separate "Standard / cookie cutter" contents from "Advanced / customize this installation" contents
* Harmonize "Standard" installation instructions by providing distinct sections
* [x] Extract / update existing instructions common to all O/S - idf-template based
* (3) Get esp-idf
* (4) Start a Project
* (5) Connect
* (6) Build and Flash
* (7) Monitor
* [x] Correct partition table address from 0x4000 to 0x8000 in `docs/get-started/make-project.rst` and `README.md`
Merge branch 'feature/btdm_ble_bt_separa' into 'master'
Feature/btdm ble bt separa
@Jack @snake @igrokhotkov @angus @island please help to review the code.
Separate the bt/ble code. After the separate, can save 15k~25k ram & 240k~460k code size(depending on the menuconfig).
Merge branch 'feature/opt_scan_before_connect' into 'master'
optimize scan before station connecting to AP
1. Store the information of AP(ssid, password, bssid, channel, etc)
into nvs when station connects to AP successfully. If station
connects to the same AP next time, it will scan the stored channel of the AP
first.
2. Add a parameter of channel for scanning before connecting to AP.
If the channel is set to 0, station will scan full channels. If it
is set to 1~13, station will only scan the channel.
1. Store the information of AP(ssid, password, bssid, channel, etc)
into nvs when station connects to AP successfully. If station
connects to the same AP next time, it will scan the stored channel of the AP
first.
2. Add a parameter of channel for scanning before connecting to AP.
If it is set to 1~13, station will scan starting from the channel.
If the channel of AP is unknown, set it to 0.
Ivan Grokhotkov [Thu, 27 Apr 2017 04:42:56 +0000 (12:42 +0800)]
esp32: select 8M clock as RTC_FAST_CLK on startup
Even though RTC_CLK_CONFIG_DEFAULT correctly had RTC_FAST_FREQ_8M as the
fast clock, the bootloader modified fast_freq field to the currently
selected RTC_FAST_CLK (so that the clock choice is not affected by the
bootloader). The application startup code never switched to 8M clock,
which caused the default (XTAL/4) to be used as RTC_FAST_CLK. This had
caused a number of issues, such as touch pads not working in deep sleep.
Split common SPI stuff out of master driver; add slave driver; add workaround for DMA issue.
This merge req mainly adds a slave device. In order to do this, the original master driver is refactored into common code shared by master and slave modes, and a slave driver is added.
The other things added are:
- Added a workaround for a 'feature' of the ESP32 silicon that can lock up the receive DMA channel in some situations. This can only be fixed by resetting *both* DMA channels. The workaround implemented makes sure that the reset only happens when both channels are idle
- Got rid of the automatic choice between register- and DMA-based transfers. The master (and slave) code will now always go for a DMA transfer if a DMA channel is given, and always go for register-based transfers if no DMA channel is given.
- Add in a bunch of fixes for outstanding Github issues.
SPI: SPI master clock calculation: n has a minimum of 2 to allow for both a low and a high cycle. Fixes https://github.com/espressif/esp-idf/issues/491
Ivan Grokhotkov [Thu, 27 Apr 2017 02:43:58 +0000 (10:43 +0800)]
Merge branch 'bugfix/esp32_core_dump_sanity_checks' into 'master'
esp32: Core dump sanity checks
Adds sanity checks when doing core dump to flash
- CRC for core dump flash partition config
- Tasks with corrupted TCBs are skipped
- Assertions to check that nothing is written beyond core dump flash partition
- CRC for core dump flash partition config
- Tasks with corrupted TCBs are skipped
- Assertions to check that nothing is written beyond core dump flash partition
Ivan Grokhotkov [Wed, 26 Apr 2017 06:01:59 +0000 (14:01 +0800)]
Merge branch 'feature/32k_xtal' into 'master'
add support for 32k XTAL as RTC_SLOW_CLK source
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
function can be used instead to get an approximate RTC_SLOW_CLK
frequency
- Clock calibration is performed at startup. The value is saved and used
for timekeeping and when entering deep sleep.
- When using the 32k XTAL, startup code will wait for the oscillator to
start up. This can be possibly optimized by starting a separate task
to wait for oscillator startup, and performing clock switch in that
task.
- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.
- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
error.
- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
slow_clk_cycles argument would exceed certain value
- Improve 32k XTAL oscillator startup time by introducing bootstrapping
code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
pins to set better initial conditions for the oscillator.
Ivan Grokhotkov [Mon, 24 Apr 2017 10:36:47 +0000 (18:36 +0800)]
Add support for 32k XTAL as RTC_SLOW_CLK source
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
function can be used instead to get an approximate RTC_SLOW_CLK
frequency
- Clock calibration is performed at startup. The value is saved and used
for timekeeping and when entering deep sleep.
- When using the 32k XTAL, startup code will wait for the oscillator to
start up. This can be possibly optimized by starting a separate task
to wait for oscillator startup, and performing clock switch in that
task.
- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.
- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
error.
- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
slow_clk_cycles argument would exceed certain value
- Improve 32k XTAL oscillator startup time by introducing bootstrapping
code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
pins to set better initial conditions for the oscillator.
1.change the rowdata to rodata;
2.change BT_ACL_CONNECTIONS to Maximum BT/BLE connection count.
3. change the comments of bt_target.h:505 from 40 to 5.
Ivan Grokhotkov [Tue, 25 Apr 2017 11:46:11 +0000 (19:46 +0800)]
Merge branch 'feature/wear_levelling' into 'master'
wear levelling
This MR adds wear levelling component. It presents an interface similar to the interface of spi_flash and esp_partition. Inside, it stores data inside a partition to in a way that reduces worst case number of erase cycles for any given sector.
Also included are APIs similar to the ones provided for SDMMC to mount FAT filesystem on top of the wear levelling partition. A simple example shows how this API can be used.
component/bt:separate the SMP, GATT module set the macro output the function.
1. close classic bt, can save 233k code size;
2. close smp module, can save 136k code size;
3. close gattc module, can save 24k code size;
4. close gatts module, can save 16k code size;
4. close the bluedroid stack log, can save 120k code size.
Ivan Grokhotkov [Tue, 25 Apr 2017 08:30:36 +0000 (16:30 +0800)]
Merge branch 'feature/xtal_freq_autodetect' into 'master'
XTAL frequency detection, support for selecting XTAL frequency
This MR adds more robust XTAL frequency detection code (which gets run in the bootloader) and an option to set XTAL frequency in Kconfig. By default we still use autodetection, since it is more reliable than the one used in ROM code.
This will help with issues about XTAL frequency detection in high ambient temperature conditions.
Ivan Grokhotkov [Tue, 25 Apr 2017 08:27:12 +0000 (16:27 +0800)]
Merge branch 'bugfix/sdmmc_timeout' into 'master'
sdmmc: handle card removal when CD is not used
When SD card is removed during transaction, SDMMC peripheral can report
a range of errors, such as timeouts, CRC errors, start/end bit errors.
Under normal conditions (card is inserted), SDMMC peripheral also generates
command done or data done interrupts. When the card is removed, such
interrupts may not be always generated.
This change fixes handling of timeout interrupts and SBE interrupts.
It also adds a one second timeout into the event processing loop. This
timeout allows applications to recover in cases when the SDMMC peripheral
doesn’t generate command/data done event on card removal.
Merge branch 'bugfix/fatfs_sdmmc_cleanup' into 'master'
fat/sdmmc: unmount FATFS object on error
Failure to call f_mount(NULL,...) makes FATFS attempt to clean up the old
FS object upon next mount. If previous mount operation has failed, some
parts of FS object may not be fully initialized, which will cause errors
(such as attempting to delete a mutex which wasn’t allocated).
Ivan Grokhotkov [Mon, 24 Apr 2017 07:29:30 +0000 (15:29 +0800)]
soc: implement XTAL frequency detection
ROM code already implements XTAL frequency detection, but it uses the 8M
clock before the clock tuning parameters are initialized. With the
zero clock tuning parameter, 8M clock has significant frequency deviation
at high temperatures, which can lead to erroneous detection of 40 MHz
crystal as a 26 MHz one.
This change adds XTAL frequency detection code to rtc_clk_init routine,
and detection is performed after the 8M clock tuning parameter as been
initialized.
Merge branch 'bugfix/tw7105_tcp_stable_test_abort_issue' into 'master'
lwip: fix tcp stable test abort issue
This MR covers following changes:
1. Modify dhcp server timer to 1 seconds
2. Enable ETHARP_TRUST_IP_MAC. Consider following scenario: we are in throughput test or traffic stability test, if this option is disabled, then every 5 minutes, the IP/MAC entry in arch cache is aged out, however, the traffic continuously send to lwip from application, because there is no IP/MAC entry in ARP cache, then the packets have to be buffered in ARP queue and a ARP request is triggered, but the ARP queue can only holds 3 packets, the later packets will be dropped, then if the traffic is big, a lot of packets will be dropped here before we get the right ARP response. For TCP, this will trigger re-transmit, it's intolerable for some application, such as real time audio, if re-transmit happen, then performance of voice will be impact. For UDP, sometimes it may also cause problem, such as DHCP, if here we failed to send the DHCP here, we has to wait the DHCP timeout etc... so this option is enabled here by default.
Merge branch 'feature/add_limit_for_all_dynamic_ebuf' into 'master'
esp32: update wifi lib for limitting dynamic wifi buffer
Add limit for all dynamic wifi ebuf to avoid wifi run out of memory in some extreme scanrio.
The default max allocated dynamic tx buffer is 32
The default max allocated dynamic rx buffer is 64, make default value is bigger because when all packets we received are small packets, e.g. the length is 64Bytes, then 64K can hold 1000 packets, so 64 maybe a good candidate default value, anyway the customer can configure it via menuconfig.
The default dynamic wifi internal long/long-long mgmt is 32, generally 32 is enough for mgmt packet (beacon/auth/assoc/probe/null etc). Generally when all the 32 mgmt buffer is run out of memory, it means internal wifi state machine may has problem, we need to debug it.
There are some RODATAs of libphy.a that are called in ISR. So need
to put them into DRAM to avoid access them when R/W SPI flash. Due
to the RODATAs which are called in ISR haven't been picked out to
put into DRAM, put all of the RODATA of libphy.a into DRAM. This
will be optimized in the future.
Ivan Grokhotkov [Fri, 21 Apr 2017 11:40:45 +0000 (19:40 +0800)]
Merge branch 'bugfix/rtc_reg_fields' into 'master'
soc: allow REG_SET_FIELD to be used for bit fields
- Fixes an issue with `rtc_clk_apll_enable`: https://esp32.com/viewtopic.php?f=13&t=1673
- Fixes `rtc_clk_fast_freq_set` function always selecting XTAL/4 as fast clock source.
- Fixes regression in deep sleep current (7uA instead of 5uA).
Ivan Grokhotkov [Fri, 21 Apr 2017 11:38:46 +0000 (19:38 +0800)]
Merge branch 'bugfix/xtal_freq_after_wdt_reset' into 'master'
rtc_clk_init: handle case when XTAL frequency has already been set
On first reset, ROM code writes the estimated XTAL frequency into
RTC_APB_FREQ_REG (aka STORE5). If the application doesn’t specify exact
XTAL frequency (which is always the case for now), rtc_clk_init will
guess what kind of XTAL is used (26M or 40M), based on the estimated
frequency. Later, detected frequency is written into RTC_XTAL_FREQ_REG
(aka STORE4).
When the application switches clock source to PLL, APB frequency changes
and RTC_APB_FREQ_REG is updated. If the application encounters an RTC
WDT reset, RTC_APB_FREQ_REG will not be updated prior to reset. Once the
application starts up again, it will attempt to auto-detect XTAL
frequency based on RTC_APB_FREQ_REG, which now has value of 80000000.
This will fail, and rtc_clk_xtal_freq_estimate will fall back to the
default value of 26 MHz. Due to an incorrect XTAL frequency, PLL
initialization will also take incorrect path, and PLL will run at a
different frequency. Depending on the application this may cause just
garbage output on UART or a crash (if WiFi is used).
This change checks if RTC_XTAL_FREQ_REG has already been set before trying
to estimate XTAL frequency based on the value of RTC_APB_FREQ_REG, and
uses RTC_XTAL_FREQ_REG value if it is valid.
Base MAC address can be stored in default manufacture-defined or customer
pre-defined place in EFUSE and other place e.g. flash or EEPROM.
If choose to use base MAC address which is stored in other place, please
call esp_base_mac_addr_set_external() before initializing WiFi/BT/Ehternet.
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