Sam Parker [Wed, 11 Sep 2019 08:17:48 +0000 (08:17 +0000)]
[NFC][ARM] Add and modify tests
Add test for ParallelDSP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371594
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Fangrui Song [Wed, 11 Sep 2019 07:38:21 +0000 (07:38 +0000)]
[LTO] Avoid calling GlobalValue::getGUID (MD5) twice
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371593
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Tim Renouf [Wed, 11 Sep 2019 07:26:39 +0000 (07:26 +0000)]
[TLI][AMDGPU] AMDPAL does not have library functions
Configure TLI to say that r600/amdgpu does not have any library
functions, such that InstCombine does not do anything like turn sin/cos
into the library function @tan with sufficient fast math flags.
Differential Revision: https://reviews.llvm.org/D67406
Change-Id: I02f907d3e64832117ea9800e9f9285282856e5df
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371592
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Fangrui Song [Wed, 11 Sep 2019 07:23:35 +0000 (07:23 +0000)]
[llvm-objcopy] Simplify --prefix-alloc-sections
Handle --prefix-alloc-sections after --rename-sections so that --prefix-alloc-sections code
does not have to check if renaming has been performed.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D66931
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371591
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Hideto Ueno [Wed, 11 Sep 2019 07:00:33 +0000 (07:00 +0000)]
[Attributor] Implement "noalias" callsite argument deduction
Summary: Now, `nocapture` is deduced in Attributor therefore, this patch introduces deduction for `noalias` callsite argument using `nocapture`.
Reviewers: jdoerfert, sstefan1
Reviewed By: jdoerfert
Subscribers: lebedev.ri, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67286
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371590
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Hideto Ueno [Wed, 11 Sep 2019 06:52:11 +0000 (06:52 +0000)]
[Attributor][Fix] Manifest nocapture only in CSArgument or Argument
Summary:
We can query to Attributor whether the value is captured in the scope or not on the following way:
```
const auto & NoCapAA = A.getAAFor<AANoCapture>(*this, IRPosition::value(V));
```
And if V is CallSiteReturned then `getDeducedAttribute` will add `nocatpure` to the callsite returned value. It is not valid.
This patch checks the position is an argument or call site argument.
This is tested in D67286.
Reviewers: jdoerfert, sstefan1
Reviewed By: jdoerfert
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67342
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371589
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Alexey Lapshin [Wed, 11 Sep 2019 06:07:16 +0000 (06:07 +0000)]
[Debuginfo][Instcombiner] Do not clone dbg.declare.
TryToSinkInstruction() has a bug: While updating debug info for
sunk instruction, it could clone dbg.declare intrinsic.
That is wrong. There could be only one dbg.declare.
The fix is to not clone dbg.declare intrinsic and to update
it`s arguments, to not to point to sunk instruction.
Differential Revision: https://reviews.llvm.org/D67217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371587
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Fangrui Song [Wed, 11 Sep 2019 01:49:00 +0000 (01:49 +0000)]
[llvm-nm] Fix -DBUILD_SHARED_LIBS=ON builds after D66160/r371576
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371585
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Petr Hosek [Wed, 11 Sep 2019 01:09:16 +0000 (01:09 +0000)]
clang-misexpect: Profile Guided Validation of Performance Annotations in LLVM
This patch contains the basic functionality for reporting potentially
incorrect usage of __builtin_expect() by comparing the developer's
annotation against a collected PGO profile. A more detailed proposal and
discussion appears on the CFE-dev mailing list
(http://lists.llvm.org/pipermail/cfe-dev/2019-July/062971.html) and a
prototype of the initial frontend changes appear here in D65300
We revised the work in D65300 by moving the misexpect check into the
LLVM backend, and adding support for IR and sampling based profiles, in
addition to frontend instrumentation.
We add new misexpect metadata tags to those instructions directly
influenced by the llvm.expect intrinsic (branch, switch, and select)
when lowering the intrinsics. The misexpect metadata contains
information about the expected target of the intrinsic so that we can
check against the correct PGO counter when emitting diagnostics, and the
compiler's values for the LikelyBranchWeight and UnlikelyBranchWeight.
We use these branch weight values to determine when to emit the
diagnostic to the user.
A future patch should address the comment at the top of
LowerExpectIntrisic.cpp to hoist the LikelyBranchWeight and
UnlikelyBranchWeight values into a shared space that can be accessed
outside of the LowerExpectIntrinsic pass. Once that is done, the
misexpect metadata can be updated to be smaller.
In the long term, it is possible to reconstruct portions of the
misexpect metadata from the existing profile data. However, we have
avoided this to keep the code simple, and because some kind of metadata
tag will be required to identify which branch/switch/select instructions
are influenced by the use of llvm.expect
Patch By: paulkirth
Differential Revision: https://reviews.llvm.org/D66324
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371584
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David Blaikie [Wed, 11 Sep 2019 00:44:17 +0000 (00:44 +0000)]
Revert "llvm-reduce: Add pass to reduce parameters"
Looks to be failing on asan buildbots
This reverts commit r371567.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371580
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Petr Hosek [Wed, 11 Sep 2019 00:43:35 +0000 (00:43 +0000)]
Revert "Adding support for overriding LLVM_ENABLE_RUNTIMES for runtimes builds."
This reverts commit r371566: this doesn't correctly handle the case
where LLVM_ENABLE_RUNTIMES contains a list of values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371579
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Cyndy Ishida [Wed, 11 Sep 2019 00:13:01 +0000 (00:13 +0000)]
[Object][TextAPI] NFC, fix tapi lit tests
FileCheck command had wrong casing, which works fine on macOS, repairs the linux build bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371577
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Cyndy Ishida [Wed, 11 Sep 2019 00:00:53 +0000 (00:00 +0000)]
[llvm-nm] Add tapi file support
Summary:
This commit is the final one for adding tapi support to the llvm-nm implementation.
This commit also has accompanying tests the additions to lib/Object
Reviewers: ributzka, steven_wu
Reviewed By: ributzka
Subscribers: hiraditya, plotfi, dexonsmith, rupprecht, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66160
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371576
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Alina Sbirlea [Tue, 10 Sep 2019 23:36:43 +0000 (23:36 +0000)]
[MemorySSA] MemorySSA should not model debuginfo, and need not update it.
Reverts the change in r371084, but keeps the test.
After r371565, debuginfo cannot be modelled in MemorySSA, even with a
non-standard AA pipeline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371573
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Jessica Paquette [Tue, 10 Sep 2019 23:34:45 +0000 (23:34 +0000)]
[GlobalISel] When a tail call is emitted in a block, stop translating it
This fixes a crash in tail call translation caused by assume and lifetime_end
intrinsics.
It's possible to have instructions other than a return after a tail call which
will still have `Analysis::isInTailCallPosition` return true. (Namely,
lifetime_end and assume intrinsics.)
If we emit a tail call, we should stop translating instructions in the block.
Otherwise, we can end up emitting an extra return, or dead instructions in
general. This makes the verifier unhappy, and is generally unfortunate for
codegen.
This also removes the code from AArch64CallLowering that checks if we have a
tail call when lowering a return. This is covered by the new code now.
Also update call-translator-tail-call.ll to show that we now properly tail call
in the presence of lifetime_end and assume.
Differential Revision: https://reviews.llvm.org/D67415
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371572
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Jessica Paquette [Tue, 10 Sep 2019 23:25:12 +0000 (23:25 +0000)]
[AArch64][GlobalISel] Support sibling calls with mismatched calling conventions
Add support for sibcalling calls whose calling convention differs from the
caller's.
- Port over `CCState::resultsCombatible` from CallingConvLower.cpp into
CallLowering. This is used to verify that the way the caller and callee CC
handle incoming arguments matches up.
- Add `CallLowering::analyzeCallResult`. This is basically a port of
`CCState::AnalyzeCallResult`, but using `ArgInfo` rather than `ISD::InputArg`.
- Add `AArch64CallLowering::doCallerAndCalleePassArgsTheSameWay`. This checks
that the calling conventions are compatible, and that the caller and callee
preserve the same registers.
For testing:
- Update call-translator-tail-call.ll to show that we can now handle this.
- Add a GISel line to tailcall-ccmismatch.ll to show that we will not tail call
when the regmasks don't line up.
Differential Revision: https://reviews.llvm.org/D67361
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371570
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Alina Sbirlea [Tue, 10 Sep 2019 23:22:37 +0000 (23:22 +0000)]
Update ReleaseNotes: add enabling of MemorySSA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371569
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Amy Huang [Tue, 10 Sep 2019 23:15:38 +0000 (23:15 +0000)]
Reland "Change the X86 datalayout to add three address spaces
for 32 bit signed, 32 bit unsigned, and 64 bit pointers."
This reverts
57076d3199fc2b0af4a3736b7749dd5462cacda5.
Original review at https://reviews.llvm.org/D64931.
Review for added fix at https://reviews.llvm.org/D66843.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371568
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David Blaikie [Tue, 10 Sep 2019 23:10:10 +0000 (23:10 +0000)]
llvm-reduce: Add pass to reduce parameters
Patch by Diego Treviño!
Differential Revision: https://reviews.llvm.org/D65479
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371567
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Puyan Lotfi [Tue, 10 Sep 2019 22:55:47 +0000 (22:55 +0000)]
Adding support for overriding LLVM_ENABLE_RUNTIMES for runtimes builds.
On some platforms, certain runtimes are not supported. For runtimes builds of
those platforms it would be nice if we could disable certain runtimes (ie
libunwind on Windows).
Differential Revision: https://reviews.llvm.org/D67195
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371566
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Alina Sbirlea [Tue, 10 Sep 2019 22:35:27 +0000 (22:35 +0000)]
[MemorySSA] Do not create memoryaccesses for debug info intrinsics.
Summary:
Do not model debuginfo intrinsics in MemorySSA.
Regularly these are non-memory modifying instructions. With -disable-basicaa, they were being modelled as Defs.
Reviewers: george.burgess.iv
Subscribers: aprantl, Prazek, sanjoy.google, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67307
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371565
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David Blaikie [Tue, 10 Sep 2019 22:31:35 +0000 (22:31 +0000)]
llvm-reduce: Remove some unused headers/more narrowly include them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371564
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David Blaikie [Tue, 10 Sep 2019 22:10:00 +0000 (22:10 +0000)]
llvm-remove: Remove "using namespace" in header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371563
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David Blaikie [Tue, 10 Sep 2019 22:09:58 +0000 (22:09 +0000)]
llvm-reduce: Add pass to reduce Metadata
Patch by Diego Treviño!
Differential Revision: https://reviews.llvm.org/D65026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371562
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Eric Christopher [Tue, 10 Sep 2019 22:05:01 +0000 (22:05 +0000)]
Move LLVM_ENABLE_ABI_BREAKING_CHECKS variables to their own file
so that you don't have to link Error.o and all of its dependencies.
In more detail: global initializers in Error.o can't be elided with
-ffunction-sections/-gc-sections since they always need to be run
causing a fairly significant binary bloat if all you want is the
ABI breaking checks code.
Differential Revision: https://reviews.llvm.org/D67387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371561
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Philip Reames [Tue, 10 Sep 2019 21:33:53 +0000 (21:33 +0000)]
[Loads] Move generic code out of vectorizer into a location it might be reused [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371558
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Philip Reames [Tue, 10 Sep 2019 21:12:29 +0000 (21:12 +0000)]
[ValueTracking] Factor our common speculation suppression logic [NFC]
Expose a utility function so that all places which want to suppress speculation (when otherwise legal) due to ordering and/or sanitizer interaction can do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371556
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David Blaikie [Tue, 10 Sep 2019 20:52:14 +0000 (20:52 +0000)]
llvm-reduce: Simplify testing using -implicit-check-not
Also fix llvm-reduce to use the specified output file name directly,
without appending '.ll' to the name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371555
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Sanjay Patel [Tue, 10 Sep 2019 20:04:10 +0000 (20:04 +0000)]
[x86] add test for false dependency with AVX; NFC
Goes with D67363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371551
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Roman Lebedev [Tue, 10 Sep 2019 19:30:17 +0000 (19:30 +0000)]
[NFC][InstCombine] rewrite test added in r371537 to use non-null pointer instead
I only want to ensure that %offset is non-zero there,
it doesn't matter how that info is conveyed.
As filed in PR43267, the assumption way does not work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371550
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Philip Reames [Tue, 10 Sep 2019 18:43:15 +0000 (18:43 +0000)]
[X86] Updated target specific selection dag code to conservatively check for isAtomic in addition to isVolatile
See D66309 for context.
This is the first sweep of x86 target specific code to add isAtomic bailouts where appropriate. The intention here is to have the switch from AtomicSDNode to LoadSDNode/StoreSDNode be close to NFC; that is, I'm not looking to allow additional optimizations at this time.
Sorry for the lack of tests. As discussed in the review, most of these are vector tests (for which atomicity is not well defined) and I couldn't figure out to exercise the anyextend cases which aren't vector specific.
Differential Revision: https://reviews.llvm.org/D66322
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371547
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Roman Lebedev [Tue, 10 Sep 2019 18:40:00 +0000 (18:40 +0000)]
[NFC][InstSimplify] rewrite test added in r371537 to use non-null pointer instead
I only want to ensure that %offset is non-zero there,
it doesn't matter how that info is conveyed.
As filed in PR43267, the assumption way does not work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371546
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Matt Arsenault [Tue, 10 Sep 2019 17:57:33 +0000 (17:57 +0000)]
GlobalISel/TableGen: Handle REG_SEQUENCE patterns
The scalar f64 patterns don't work yet because they fail on multiple
results from the unused implicit def of scc in the result bit
operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371542
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Guozhi Wei [Tue, 10 Sep 2019 17:25:11 +0000 (17:25 +0000)]
[BPI] Adjust the probability for floating point unordered comparison
Since NaN is very rare in normal programs, so the probability for floating point unordered comparison should be extremely small. Current probability is 3/8, it is too large, this patch changes it to a tiny number.
Differential Revision: https://reviews.llvm.org/D65303
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371541
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Matt Arsenault [Tue, 10 Sep 2019 17:19:46 +0000 (17:19 +0000)]
AMDGPU/GlobalISel: Select G_FABS/G_FNEG
f64 doesn't work yet because tablegen currently doesn't handlde
REG_SEQUENCE.
This does regress some multi use VALU fneg cases since now the
immediate remains in an SGPR, and more moves are used for legalizing
the xor. This is a SIFixSGPRCopies deficiency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371540
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Matt Arsenault [Tue, 10 Sep 2019 17:17:05 +0000 (17:17 +0000)]
AMDGPU/GlobalISel: Select cvt pk intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371539
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Matt Arsenault [Tue, 10 Sep 2019 17:16:59 +0000 (17:16 +0000)]
AMDGPU/GlobalISel: Select llvm.amdgcn.sffbh
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371538
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Roman Lebedev [Tue, 10 Sep 2019 17:13:59 +0000 (17:13 +0000)]
[NFC][InstCombine][InstSimplify] PR43251 - and some patterns with offset != 0
https://rise4fun.com/Alive/21b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371537
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Matt Arsenault [Tue, 10 Sep 2019 16:42:37 +0000 (16:42 +0000)]
AMDGPU/GlobalISel: RegBankSelect for G_ZEXTLOAD/G_SEXTLOAD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371536
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Matt Arsenault [Tue, 10 Sep 2019 16:42:31 +0000 (16:42 +0000)]
AMDGPU/GlobalISel: Legalize constant 32-bit loads
Legalize by casting to a 64-bit constant address. This isn't how the
DAG implements it, but it should.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371535
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Sam Elliott [Tue, 10 Sep 2019 16:24:03 +0000 (16:24 +0000)]
[RISCV] Support llvm-objdump -M no-aliases and -M numeric
Summary:
Now that llvm-objdump allows target-specific options, we match the
`no-aliases` and `numeric` options for RISC-V, as supported by GNU objdump.
This is done by overriding the variables used for the command-line options, so
that the command-line options are still supported.
This patch updates all tests using `llvm-objdump -riscv-no-aliases` to use
`llvm-objdump -M no-aliases`.
Reviewers: luismarques, asb
Reviewed By: luismarques, asb
Subscribers: pzheng, hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66139
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371534
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Matt Arsenault [Tue, 10 Sep 2019 16:20:14 +0000 (16:20 +0000)]
AMDGPU/GlobalISel: First pass at attempting to legalize load/stores
There's still a lot more to do, but this handles decomposing due to
alignment. I've gotten it to the point where nothing crashes or
infinite loops the legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371533
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Sam Elliott [Tue, 10 Sep 2019 15:55:55 +0000 (15:55 +0000)]
[RISCV] Add Option for Printing Architectural Register Names
Summary:
This is an option primarily to use during testing. Instead of always
printing registers using their ABI names, this allows a user to request they
are printed with their architectural name.
This is then used in the register constraint tests to ensure the mapping
between architectural and abi names is correct.
Reviewers: asb, luismarques
Reviewed By: asb
Subscribers: pzheng, hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65950
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371531
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Sanjay Patel [Tue, 10 Sep 2019 15:42:22 +0000 (15:42 +0000)]
[x86] add a test for BreakFalseDeps; NFC
As discussed in D67363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371528
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Djordje Todorovic [Tue, 10 Sep 2019 14:48:52 +0000 (14:48 +0000)]
Revert "[utils] Implement the llvm-locstats tool"
This reverts commit rL371520.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371527
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Sanjay Patel [Tue, 10 Sep 2019 14:29:02 +0000 (14:29 +0000)]
[ARM] add test for BreakFalseDeps with minsize attribute; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371526
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Simon Pilgrim [Tue, 10 Sep 2019 14:28:29 +0000 (14:28 +0000)]
[X86] Add AVX partial dependency tests as noted on D67363
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371525
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Sanjay Patel [Tue, 10 Sep 2019 14:26:25 +0000 (14:26 +0000)]
[ARM] auto-generate complete test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371524
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Florian Hahn [Tue, 10 Sep 2019 14:20:20 +0000 (14:20 +0000)]
[VectorUtils] Remove unused include. [NFC]
Patch by Francesco Petrogalli <francesco.petrogalli@arm.com>
Reviewers: fhahn
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D67365
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371523
91177308-0d34-0410-b5e6-
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David Zarzycki [Tue, 10 Sep 2019 14:19:52 +0000 (14:19 +0000)]
[CMake] Don't pass all LLVM_COMPILE_FLAGS to the C compiler
GCC (unlike clang!) warns about C++ flags when compiling C.
https://reviews.llvm.org/D67171
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371521
91177308-0d34-0410-b5e6-
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Djordje Todorovic [Tue, 10 Sep 2019 13:47:03 +0000 (13:47 +0000)]
[utils] Implement the llvm-locstats tool
The tool reports verbose output for the DWARF debug location coverage.
The llvm-locstats for each variable or formal parameter DIE computes what
percentage from the code section bytes, where it is in scope, it has
location description. The line 0 shows the number (and the percentage) of
DIEs with no location information, but the line 100 shows the number (and
the percentage) of DIEs where there is location information in all code
section bytes (where the variable or parameter is in the scope). The line
50..59 shows the number (and the percentage) of DIEs where the location
information is in between 50 and 59 percentage of its scope covered.
The tool will be very useful for tracking improvements regarding the
"debugging optimized code" support with LLVM ecosystem.
Differential Revision: https://reviews.llvm.org/D66526
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371520
91177308-0d34-0410-b5e6-
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Roman Lebedev [Tue, 10 Sep 2019 13:29:40 +0000 (13:29 +0000)]
[NFC][InstCombine] PR43251 - valid for other predicates too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371519
91177308-0d34-0410-b5e6-
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Florian Hahn [Tue, 10 Sep 2019 13:10:28 +0000 (13:10 +0000)]
[InstCombine] Use SimplifyFMulInst to simplify multiply in fma.
This allows us to fold fma's that multiply with 0.0. Also, the
multiply by 1.0 case is handled there as well. The fneg/fabs cases
are not handled by SimplifyFMulInst, so we need to keep them.
Reviewers: spatel, anemet, lebedev.ri
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D67351
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371518
91177308-0d34-0410-b5e6-
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Florian Hahn [Tue, 10 Sep 2019 13:05:34 +0000 (13:05 +0000)]
[InstCombine] Precommit tests for D67351.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371517
91177308-0d34-0410-b5e6-
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Sanjay Patel [Tue, 10 Sep 2019 13:00:31 +0000 (13:00 +0000)]
[BreakFalseDeps] fix typos/grammar in documentation comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371516
91177308-0d34-0410-b5e6-
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Martin Storsjo [Tue, 10 Sep 2019 12:31:40 +0000 (12:31 +0000)]
[Object] Implement relocation resolver for COFF ARM/ARM64
Adding testscases for this via llvm-dwarfdump.
Also add testcases for the existing resolver support for X86.
Differential Revision: https://reviews.llvm.org/D67340
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371515
91177308-0d34-0410-b5e6-
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Haojian Wu [Tue, 10 Sep 2019 12:17:49 +0000 (12:17 +0000)]
Fix the "git modified" issue on the preserve-comments-crlf.s.
Summary:
rL371473 corrected the line ending (to crlf) in preserve-comments-crlf.s, but it causes a wired issue on git
repository (I ran git pull today, it showed a local change of that file even I did not change anything).
Reviewers: gribozavr
Reviewed By: gribozavr
Subscribers: llvm-commits, cfe-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67391
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371513
91177308-0d34-0410-b5e6-
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Guillaume Chatelet [Tue, 10 Sep 2019 12:00:43 +0000 (12:00 +0000)]
[Alignment][NFC] Use llvm::Align for TargetLowering::getPrefLoopAlignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Reviewed By: courbet
Subscribers: wuzish, arsenm, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, MaskRay, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67386
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371511
91177308-0d34-0410-b5e6-
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Igor Kudrin [Tue, 10 Sep 2019 11:54:32 +0000 (11:54 +0000)]
Reland [DWARF] Add a unit test for DWARFUnit::getLength().
This is a follow-up of rL369529, where the return value of
DWARFUnit::getLength() was changed from uint32_t to uint64_t.
The test checks that a unit header with Length > 4G can be successfully
parsed and the value of the Length field is not truncated.
Differential Revision: https://reviews.llvm.org/D67276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371510
91177308-0d34-0410-b5e6-
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Alexander Timofeev [Tue, 10 Sep 2019 10:58:57 +0000 (10:58 +0000)]
[AMDGPU]: PHI Elimination hooks added for custom COPY insertion.
Reviewers: rampitec, vpykhtin
Differential Revision: https://reviews.llvm.org/D67101
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371508
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Dmitri Gribenko [Tue, 10 Sep 2019 10:39:09 +0000 (10:39 +0000)]
Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline.""
This reverts commit r371502, it broke tests
(clang/test/CodeGenCXX/auto-var-init.cpp).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371507
91177308-0d34-0410-b5e6-
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Djordje Todorovic [Tue, 10 Sep 2019 10:37:28 +0000 (10:37 +0000)]
[llvm-dwarfdump] Add additional stats fields
The additional fields will be parsed by the llvm-locstats tool in order to
produce more human readable output of the DWARF debug location quality
generated.
Differential Revision: https://reviews.llvm.org/D66525
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371506
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Igor Kudrin [Tue, 10 Sep 2019 10:17:48 +0000 (10:17 +0000)]
Revert "[DWARF] Add a unit test for DWARFUnit::getLength()" because it broke ASAN bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371505
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Clement Courbet [Tue, 10 Sep 2019 10:00:15 +0000 (10:00 +0000)]
[ExpandMemCmp] Add lit.local.cfg
To prevent AArch64 tests from running when the target is not compiled.
Fixes r371502:
/home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/test/Transforms/ExpandMemCmp/AArch64/memcmp.ll:11:15: error: CHECK-NEXT: expected string not found in input
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[S1:%.*]] to i64*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371503
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Clement Courbet [Tue, 10 Sep 2019 09:18:00 +0000 (09:18 +0000)]
Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
With a fix for sanitizer breakage (see explanation in D60318).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371502
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Fangrui Song [Tue, 10 Sep 2019 09:16:34 +0000 (09:16 +0000)]
[yaml2obj] Set p_align to the maximum sh_addralign of contained sections
The address difference between two sections in a PT_LOAD is a constant.
Consider a hypothetical case (pagesize can be very small, say, 4).
```
.text sh_addralign=4
.text.hot sh_addralign=16
```
If we set p_align to 4, the PT_LOAD will be loaded at an address which
is a multiple of 4. The address of .text.hot is guaranteed to be a
multiple of 4, but not necessarily a multiple of 16.
This patch deletes the constraint
if (SHeader->sh_offset == PHeader.p_offset)
Reviewed By: grimar, jhenderson
Differential Revision: https://reviews.llvm.org/D67260
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371501
91177308-0d34-0410-b5e6-
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Igor Kudrin [Tue, 10 Sep 2019 09:03:24 +0000 (09:03 +0000)]
[DWARF] Add a unit test for DWARFUnit::getLength().
This is a follow-up of rL369529, where the return value of
DWARFUnit::getLength() was changed from uint32_t to uint64_t.
The test checks that a unit header with Length > 4G can be successfully
parsed and the value of the Length field is not truncated.
Differential Revision: https://reviews.llvm.org/D67276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371499
91177308-0d34-0410-b5e6-
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Guillaume Chatelet [Tue, 10 Sep 2019 09:01:18 +0000 (09:01 +0000)]
[Alignment] Use Align for TargetLowering::MinStackArgumentAlignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: sdardis, nemanjai, hiraditya, kbarton, jrtc27, MaskRay, atanasyan, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67288
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371498
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Craig Topper [Tue, 10 Sep 2019 07:56:02 +0000 (07:56 +0000)]
[LegalizeTypes] Teach SoftenFloatOp_SELECT_CC to handle operand 2 or 3 being softened.
This can only happen on X86 when fp128 is a legal type, but we
go through softening to generate libcalls. This causes fp128 to
be softened to fp128 instead of an integer type. This can be
removed if D67128 lands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371493
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Nico Weber [Tue, 10 Sep 2019 06:31:59 +0000 (06:31 +0000)]
gn build: Merge r371488
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371489
91177308-0d34-0410-b5e6-
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Petr Hosek [Tue, 10 Sep 2019 06:25:13 +0000 (06:25 +0000)]
Revert "clang-misexpect: Profile Guided Validation of Performance Annotations in LLVM"
This reverts commit r371484: this broke sanitizer-x86_64-linux-fast bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371488
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Craig Topper [Tue, 10 Sep 2019 05:49:53 +0000 (05:49 +0000)]
[X86] Add broadcast load unfolding support for VCMPPS/PD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371487
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 10 Sep 2019 05:49:48 +0000 (05:49 +0000)]
[X86] Add broadcast load unfold tests for VCMPPS/PD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371486
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Nico Weber [Tue, 10 Sep 2019 03:18:25 +0000 (03:18 +0000)]
gn build: Merge r371484
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371485
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Petr Hosek [Tue, 10 Sep 2019 03:11:39 +0000 (03:11 +0000)]
clang-misexpect: Profile Guided Validation of Performance Annotations in LLVM
This patch contains the basic functionality for reporting potentially
incorrect usage of __builtin_expect() by comparing the developer's
annotation against a collected PGO profile. A more detailed proposal and
discussion appears on the CFE-dev mailing list
(http://lists.llvm.org/pipermail/cfe-dev/2019-July/062971.html) and a
prototype of the initial frontend changes appear here in D65300
We revised the work in D65300 by moving the misexpect check into the
LLVM backend, and adding support for IR and sampling based profiles, in
addition to frontend instrumentation.
We add new misexpect metadata tags to those instructions directly
influenced by the llvm.expect intrinsic (branch, switch, and select)
when lowering the intrinsics. The misexpect metadata contains
information about the expected target of the intrinsic so that we can
check against the correct PGO counter when emitting diagnostics, and the
compiler's values for the LikelyBranchWeight and UnlikelyBranchWeight.
We use these branch weight values to determine when to emit the
diagnostic to the user.
A future patch should address the comment at the top of
LowerExpectIntrisic.cpp to hoist the LikelyBranchWeight and
UnlikelyBranchWeight values into a shared space that can be accessed
outside of the LowerExpectIntrinsic pass. Once that is done, the
misexpect metadata can be updated to be smaller.
In the long term, it is possible to reconstruct portions of the
misexpect metadata from the existing profile data. However, we have
avoided this to keep the code simple, and because some kind of metadata
tag will be required to identify which branch/switch/select instructions
are influenced by the use of llvm.expect
Patch By: paulkirth
Differential Revision: https://reviews.llvm.org/D66324
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371484
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Kai Luo [Tue, 10 Sep 2019 02:28:24 +0000 (02:28 +0000)]
[PowerPC][NFC] Update test assertions using update_llc_test_checks.py
Summary:
This patch is made due to https://reviews.llvm.org/rL371289 where typo
fixes failed.
Differential Revision: https://reviews.llvm.org/D67317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371483
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Mehdi Amini [Tue, 10 Sep 2019 01:26:36 +0000 (01:26 +0000)]
Revert [git-llvm] Do not reinvent `@{upstream}`
This reverts r371290 (git commit
7faffd544b16f851a632d6b8f93e3c8485ff34bb)
The change wasnt NFC and broke some users' workflow. Reverting while figuring
out the best alternative to move forward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371480
91177308-0d34-0410-b5e6-
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Nico Weber [Tue, 10 Sep 2019 01:11:30 +0000 (01:11 +0000)]
gn build: Merge r371466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371479
91177308-0d34-0410-b5e6-
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Nico Weber [Tue, 10 Sep 2019 00:48:20 +0000 (00:48 +0000)]
gn build: (manually) merge r371429
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371477
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Jan Korous [Tue, 10 Sep 2019 00:29:35 +0000 (00:29 +0000)]
[llvm][ADT][NFC] Add test for makeArrayRef(std::array)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371475
91177308-0d34-0410-b5e6-
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Reid Kleckner [Tue, 10 Sep 2019 00:06:52 +0000 (00:06 +0000)]
Remove some unnecessary REQUIRES: shell lines
This means these tests will run on Windows. Replace one with
UNSUPPORTED: system-windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371473
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Matt Arsenault [Mon, 9 Sep 2019 23:30:11 +0000 (23:30 +0000)]
AMDGPU/GlobalISel: Fix insert point when lowering fminnum/fmaxnum
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371471
91177308-0d34-0410-b5e6-
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Richard Smith [Mon, 9 Sep 2019 23:07:25 +0000 (23:07 +0000)]
Fix incorrect demangling of call operator of lambda with explicit
template parameters due to registering template parameters twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371469
91177308-0d34-0410-b5e6-
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Austin Kerbow [Mon, 9 Sep 2019 23:06:13 +0000 (23:06 +0000)]
AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, dstuttard, tpr, t-tye, hiraditya, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67374
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371467
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Reid Kleckner [Mon, 9 Sep 2019 23:04:25 +0000 (23:04 +0000)]
[Windows] Replace TrapUnreachable with an int3 insertion pass
This is an alternative to D66980, which was reverted. Instead of
inserting a pseudo instruction that optionally expands to nothing, add a
pass that inserts int3 when appropriate after basic block layout.
Reviewers: hans
Differential Revision: https://reviews.llvm.org/D67201
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371466
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Aditya Nandakumar [Mon, 9 Sep 2019 22:51:41 +0000 (22:51 +0000)]
[GlobalISel]: Fix a bug where we could dereference None
getConstantVRegVal returns None when dealing with constants > 64 bits.
Don't assume we always have a value in GISelKnownBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371465
91177308-0d34-0410-b5e6-
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Richard Smith [Mon, 9 Sep 2019 22:26:04 +0000 (22:26 +0000)]
Simplify demangler rule for lambda-expressions to match discussion on
cxx-abi list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371462
91177308-0d34-0410-b5e6-
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Evgeniy Stepanov [Mon, 9 Sep 2019 22:24:57 +0000 (22:24 +0000)]
LangRef: mention MSan's problem with speculative conditional branches.
Summary:
This short blurb aims to disallow optimizations like we had to revert
(under MSan) in
https://reviews.llvm.org/D21165
https://bugs.llvm.org/show_bug.cgi?id=28054
https://reviews.llvm.org/D67205
Reviewers: vitalybuka, efriedma
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67244
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371461
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Philip Reames [Mon, 9 Sep 2019 21:33:59 +0000 (21:33 +0000)]
[Tests] Fix a typo in a test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371456
91177308-0d34-0410-b5e6-
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Philip Reames [Mon, 9 Sep 2019 21:32:16 +0000 (21:32 +0000)]
[Tests] Precommit test case for D67372
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371455
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Mon, 9 Sep 2019 21:30:11 +0000 (21:30 +0000)]
Fix MSVC "not all control paths return a value" warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371454
91177308-0d34-0410-b5e6-
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Philip Reames [Mon, 9 Sep 2019 20:54:13 +0000 (20:54 +0000)]
[LoopVectorize] Leverage speculation safety to avoid masked.loads
If we're vectorizing a load in a predicated block, check to see if the load can be speculated rather than predicated. This allows us to generate a normal vector load instead of a masked.load.
To do so, we must prove that all bytes accessed on any iteration of the original loop are dereferenceable, and that all loads (across all iterations) are properly aligned. This is equivelent to proving that hoisting the load into the loop header in the original scalar loop is safe.
Note: There are a couple of code motion todos in the code. My intention is to wait about a day - to be sure this sticks - and then perform the NFC motion without furthe review.
Differential Revision: https://reviews.llvm.org/D66688
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371452
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Philip Reames [Mon, 9 Sep 2019 20:26:52 +0000 (20:26 +0000)]
[Tests] Add anyextend tests for unordered atomics
Motivated by work on changing our representation of unordered atomics in SelectionDAG, but as an aside, all our lowerings for O3 are terrible. Even the ones which ignore the atomicity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371449
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Douglas Yung [Mon, 9 Sep 2019 20:12:29 +0000 (20:12 +0000)]
Relax opcode checks in test to check for only a number instead of a specific number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371447
91177308-0d34-0410-b5e6-
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Philip Reames [Mon, 9 Sep 2019 20:06:19 +0000 (20:06 +0000)]
[SDAG] Add a isSimple cover functon to MemSDNode, just as we have in IR/MI [NFC]
Uses are in reviews D66322 and D66318. Submitted separately to control rebuild times.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371445
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Francis Visoiu Mistrih [Mon, 9 Sep 2019 19:47:25 +0000 (19:47 +0000)]
[Remarks] Fix warning for uint8_t < 0 comparison
http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/19109/steps/build-stage1-compiler/logs/stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371443
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Philip Reames [Mon, 9 Sep 2019 19:23:22 +0000 (19:23 +0000)]
Introduce infrastructure for an incremental port of SelectionDAG atomic load/store handling
This is the first patch in a large sequence. The eventual goal is to have unordered atomic loads and stores - and possibly ordered atomics as well - handled through the normal ISEL codepaths for loads and stores. Today, there handled w/instances of AtomicSDNodes. The result of which is that all transforms need to be duplicated to work for unordered atomics. The benefit of the current design is that it's harder to introduce a silent miscompile by adding an transform which forgets about atomicity. See the thread on llvm-dev titled "FYI: proposed changes to atomic load/store in SelectionDAG" for further context.
Note that this patch is NFC unless the experimental flag is set.
The basic strategy I plan on taking is:
introduce infrastructure and a flag for testing (this patch)
Audit uses of isVolatile, and apply isAtomic conservatively*
piecemeal conservative* update generic code and x86 backedge code in individual reviews w/tests for cases which didn't check volatile, but can be found with inspection
flip the flag at the end (with minimal diffs)
Work through todo list identified in (2) and (3) exposing performance ops
(*) The "conservative" bit here is aimed at minimizing the number of diffs involved in (4). Ideally, there'd be none. In practice, getting it down to something reviewable by a human is the actual goal. Note that there are (currently) no paths which produce LoadSDNode or StoreSDNode with atomic MMOs, so we don't need to worry about preserving any behaviour there.
We've taken a very similar strategy twice before with success - once at IR level, and once at the MI level (post ISEL).
Differential Revision: https://reviews.llvm.org/D66309
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371441
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Matt Arsenault [Mon, 9 Sep 2019 18:57:51 +0000 (18:57 +0000)]
AMDGPU/GlobalISel: Legalize G_BUILD_VECTOR v2s16
Handle it the same way as G_BUILD_VECTOR_TRUNC. Arguably only
G_BUILD_VECTOR_TRUNC should be legal for this, but G_BUILD_VECTOR will
probably be more convenient in most cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371440
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Matt Arsenault [Mon, 9 Sep 2019 18:43:29 +0000 (18:43 +0000)]
AMDGPU: Make VReg_1 size be 1
This was getting chosen as the preferred 32-bit register class based
on how TableGen selects subregister classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371438
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Matt Arsenault [Mon, 9 Sep 2019 18:29:45 +0000 (18:29 +0000)]
AMDGPU/GlobalISel: Select llvm.amdgcn.class
Also fixes missing SubtargetPredicate on f16 class instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371436
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