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llvm
5 years ago[Alignment][NFC] Instructions::getLoadStoreAlignment
Guillaume Chatelet [Mon, 21 Oct 2019 14:49:28 +0000 (14:49 +0000)]
[Alignment][NFC] Instructions::getLoadStoreAlignment

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69256

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375416 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Extra qdadd patterns
David Green [Mon, 21 Oct 2019 14:06:49 +0000 (14:06 +0000)]
[ARM] Extra qdadd patterns

This adds some new qdadd patterns to go along with the other recently added
qadd's.

Differential Revision: https://reviews.llvm.org/D68999

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375414 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Alignment][NFC] Add a helper function to DataLayout
Guillaume Chatelet [Mon, 21 Oct 2019 13:58:33 +0000 (13:58 +0000)]
[Alignment][NFC] Add a helper function to DataLayout

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69258

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375413 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs][llvm-ar] Update llvm-ar command guide
Owen Reynolds [Mon, 21 Oct 2019 13:13:31 +0000 (13:13 +0000)]
[docs][llvm-ar] Update llvm-ar command guide

The llvm-ar command guide had not been updated in some time, it was
missing current functionality and contained information that was out
of date. This change:
- Updates the use of reStructuredText directives, as seen in other tools
  command guides.
- Updates the command synopsis.
- Updates the descriptions of the tool behaviour.
- Updates the options section.
- Adds details of MRI script functionality.
- Removes the sections "Standards" and "File Format"

Differential Revision: https://reviews.llvm.org/D68998

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375412 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Add qadd lowering from a sadd_sat
David Green [Mon, 21 Oct 2019 12:33:46 +0000 (12:33 +0000)]
[ARM] Add qadd lowering from a sadd_sat

This lowers a sadd_sat to a qadd by treating it as legal. Also adds qsub at the
same time.

The qadd instruction sets the q flag, but we already have many cases where we
do not model this in llvm.

Differential Revision: https://reviews.llvm.org/D68976

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375411 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Alignment][NFC] TargetCallingConv::setByValAlign
Guillaume Chatelet [Mon, 21 Oct 2019 12:05:33 +0000 (12:05 +0000)]
[Alignment][NFC] TargetCallingConv::setByValAlign

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69248

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375410 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoSimplify usage of setFPAttrs.
Jay Foad [Mon, 21 Oct 2019 11:32:41 +0000 (11:32 +0000)]
Simplify usage of setFPAttrs.

In some cases using the return value of setFPAttrs simplifies the code.
In other cases it complicates the code with ugly casts, so stop doing
it. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375409 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm/Object] - Make ELFObjectFile::getRelocatedSection return Expected<section_iterator>
George Rimar [Mon, 21 Oct 2019 11:06:38 +0000 (11:06 +0000)]
[llvm/Object] - Make ELFObjectFile::getRelocatedSection return Expected<section_iterator>

It returns just a section_iterator currently and have a report_fatal_error call inside.
This change adds a way to return errors and handle them on caller sides.

The patch also changes/improves current users and adds test cases.

Differential revision: https://reviews.llvm.org/D69167

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375408 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Alignment][NFC] TargetCallingConv::setOrigAlign and TargetLowering::getABIAlignmentF...
Guillaume Chatelet [Mon, 21 Oct 2019 11:01:55 +0000 (11:01 +0000)]
[Alignment][NFC] TargetCallingConv::setOrigAlign and TargetLowering::getABIAlignmentForCallingConv

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: sdardis, hiraditya, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69243

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375407 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix llvm signal tests build.
David Carlier [Mon, 21 Oct 2019 10:44:20 +0000 (10:44 +0000)]
Fix llvm signal tests build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375406 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[obj2yaml] - Fix a comment. NFC.
George Rimar [Mon, 21 Oct 2019 10:40:43 +0000 (10:40 +0000)]
[obj2yaml] - Fix a comment. NFC.

I forgot to address this nit before committing..

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375405 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[obj2yaml] - Stop triggering UB when dumping corrupted strings.
George Rimar [Mon, 21 Oct 2019 10:38:03 +0000 (10:38 +0000)]
[obj2yaml] - Stop triggering UB when dumping corrupted strings.

We have a following code to find quote type:

if (isspace(S.front()) || isspace(S.back()))
...

Problem is that:

"int isspace( int ch ): The behavior is undefined if the value of
ch is not representable as unsigned char and is not equal to EOF."
(https://en.cppreference.com/w/cpp/string/byte/isspace)

This patch shows how this UB can be triggered and fixes an issue.

Differential revision: https://reviews.llvm.org/D69160

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375404 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MemCpyOpt] Fixing Incorrect Code Motion while Handling Aggregate Type Values
Sam Elliott [Mon, 21 Oct 2019 10:00:34 +0000 (10:00 +0000)]
[MemCpyOpt] Fixing Incorrect Code Motion while Handling Aggregate Type Values

Summary:
When MemCpyOpt is handling aggregate type values, if an instruction (let's call it P) between the targeting load (L) and store (S) clobbers the source pointer of L, it will try to hoist S before P. This process will also hoist S's data dependency instructions.

However, the current implementation has a bug that if one of S's dependency instructions is //also// a user of P, MemCpyOpt will not prevent it from being hoisted above P and cause a use-before-define error. For example, in the newly added test file (i.e. `aggregate-type-crash.ll`), it will try to hoist both `store %my_struct %1, %my_struct* %3` and its dependent, `%3 = bitcast i8* %2 to %my_struct*`, above `%2 = call i8* @my_malloc(%my_struct* %0)`. Creating the following BB:
```
entry:
  %1 = bitcast i8* %4 to %my_struct*
  %2 = bitcast %my_struct* %1 to i8*
  %3 = bitcast %my_struct* %0 to i8*
  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %2, i8* align 4 %3, i64 8, i1 false)
  %4 = call i8* @my_malloc(%my_struct* %0)
  ret void
```
Where there is a use-before-define error between `%1` and `%4`.

Update: The compiler for the Pony Programming Language [also encounter the same bug](https://github.com/ponylang/ponyc/issues/3140)

Patch by Min-Yih Hsu (myhsu)

Reviewers: eugenis, pcc, dblaikie, dneilson, t.p.northover, lattner

Reviewed By: eugenis

Subscribers: lenary, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66060

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375403 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Lower sadd_sat to qadd8 and qadd16
David Green [Mon, 21 Oct 2019 09:53:38 +0000 (09:53 +0000)]
[ARM] Lower sadd_sat to qadd8 and qadd16

Lower the target independent signed saturating intrinsics to qadd8 and qadd16.
This custom lowers them from a sadd_sat, catching the node early before it is
promoted. It also adds a QADD8b and QADD16b node to mean the bottom "lane" of a
qadd8/qadd16, so that we can call demand bits on it to show that it does not
use the upper bits.

Also handles QSUB8 and QSUB16.

Differential Revision: https://reviews.llvm.org/D68974

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375402 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Add and adjust saturation tests for upcoming qadd changes. NFC
David Green [Mon, 21 Oct 2019 09:43:37 +0000 (09:43 +0000)]
[ARM] Add and adjust saturation tests for upcoming qadd changes. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375401 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoUse Align for TFL::TransientStackAlignment
Guillaume Chatelet [Mon, 21 Oct 2019 08:31:25 +0000 (08:31 +0000)]
Use Align for TFL::TransientStackAlignment

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: arsenm, dschuff, jyknight, sdardis, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, fedor.sergeev, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69216

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375398 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][InstCombine] Fixup comments
Roman Lebedev [Mon, 21 Oct 2019 08:21:54 +0000 (08:21 +0000)]
[NFC][InstCombine] Fixup comments

As noted in post-commit review of rL375378375378.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375397 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CVP] Deduce no-wrap on `mul`
Roman Lebedev [Mon, 21 Oct 2019 08:21:44 +0000 (08:21 +0000)]
[CVP] Deduce no-wrap on `mul`

Summary:
`ConstantRange::makeGuaranteedNoWrapRegion()` knows how to deal with `mul`
since rL335646, there is exhaustive test coverage.
This is already used by CVP's `processOverflowIntrinsic()`,
and by SCEV's `StrengthenNoWrapFlags()`

That being said, currently, this doesn't help much in the end:
| statistic                              |     old |     new | delta | percentage |
| correlated-value-propagation.NumMulNSW |       4 |     275 |   271 |   6775.00% |
| correlated-value-propagation.NumMulNUW |       4 |    1323 |  1319 |  32975.00% |
| correlated-value-propagation.NumMulNW  |       8 |    1598 |  1590 |  19875.00% |
| correlated-value-propagation.NumNSW    |    5715 |    5986 |   271 |      4.74% |
| correlated-value-propagation.NumNUW    |    9193 |   10512 |  1319 |     14.35% |
| correlated-value-propagation.NumNW     |   14908 |   16498 |  1590 |     10.67% |
| instcount.NumAddInst                   |  275871 |  275869 |    -2 |      0.00% |
| instcount.NumBrInst                    |  708234 |  708232 |    -2 |      0.00% |
| instcount.NumMulInst                   |   43812 |   43810 |    -2 |      0.00% |
| instcount.NumPHIInst                   |  316786 |  316784 |    -2 |      0.00% |
| instcount.NumTruncInst                 |   62165 |   62167 |     2 |      0.00% |
| instcount.NumUDivInst                  |    2528 |    2526 |    -2 |     -0.08% |
| instcount.TotalBlocks                  |  842995 |  842993 |    -2 |      0.00% |
| instcount.TotalInsts                   | 7376486 | 7376478 |    -8 |      0.00% |
(^ test-suite plain, tests still pass)

Reviewers: nikic, reames, luqmana, sanjoy, timshen

Reviewed By: reames

Subscribers: hiraditya, javed.absar, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69203

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375396 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Allow values with multiple users in SimplifyDemandedVectorElts
Piotr Sobczak [Mon, 21 Oct 2019 08:12:47 +0000 (08:12 +0000)]
[InstCombine] Allow values with multiple users in SimplifyDemandedVectorElts

Summary:
Allow for ignoring the check for a single use in SimplifyDemandedVectorElts
to be able to simplify operands if DemandedElts is known to contain
the union of elements used by all users.
It is a responsibility of a caller of SimplifyDemandedVectorElts to
supply correct DemandedElts.

Simplify a series of extractelement instructions if only a subset of
elements is used.

Reviewers: reames, arsenm, majnemer, nhaehnle

Reviewed By: nhaehnle

Subscribers: wdng, jvesely, nhaehnle, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67345

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375395 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Merge r375390
GN Sync Bot [Mon, 21 Oct 2019 08:06:38 +0000 (08:06 +0000)]
gn build: Merge r375390

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375393 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LLDB] [Windows] Initial support for ARM register contexts
Martin Storsjo [Mon, 21 Oct 2019 08:02:34 +0000 (08:02 +0000)]
[LLDB] [Windows] Initial support for ARM register contexts

Differential Revision: https://reviews.llvm.org/D69226

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375392 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IR] Fix mayReadFromMemory() for writeonly calls
Yevgeny Rouban [Mon, 21 Oct 2019 06:52:08 +0000 (06:52 +0000)]
[IR] Fix mayReadFromMemory() for writeonly calls

Current implementation of Instruction::mayReadFromMemory()
returns !doesNotAccessMemory() which is !ReadNone. This
does not take into account that the writeonly attribute
also indicates that the call does not read from memory.

The patch changes the predicate to !doesNotReadMemory()
that reflects the intended behavior.

Differential Revision: https://reviews.llvm.org/D69086

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375389 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[BPF] fix indirect call assembly code
Yonghong Song [Mon, 21 Oct 2019 03:22:03 +0000 (03:22 +0000)]
[BPF] fix indirect call assembly code

Currently, for indirect call, the assembly code printed out as
  callx <imm>
This is not right, it should be
  callx <reg>

Fixed the issue with proper format.

Differential Revision: https://reviews.llvm.org/D69229

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375386 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Attributor][FIX] Silence sign-compare warning
Johannes Doerfert [Mon, 21 Oct 2019 01:29:10 +0000 (01:29 +0000)]
[Attributor][FIX] Silence sign-compare warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375384 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Attributor] Teach AANoCapture to use information in-flight more aggressively
Johannes Doerfert [Mon, 21 Oct 2019 00:48:42 +0000 (00:48 +0000)]
[Attributor] Teach AANoCapture to use information in-flight more aggressively

AAReturnedValues, AAMemoryBehavior, and AANoUnwind, can provide
information that helps during the tracking or even justifies no-capture.
We now use this information and enable no-capture in some test cases
designed a long while a ago for these cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375382 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Check Subtarget.hasSSE3() before calling shouldUseHorizontalOp and emitting...
Craig Topper [Sun, 20 Oct 2019 23:54:19 +0000 (23:54 +0000)]
[X86] Check Subtarget.hasSSE3() before calling shouldUseHorizontalOp and emitting X86ISD::FHADD in LowerUINT_TO_FP_i64.

This was a regression from r375341.

Fixes PR43729.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375381 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IndVars] Add a todo to reflect a further oppurtunity identified in D69009
Philip Reames [Sun, 20 Oct 2019 23:44:01 +0000 (23:44 +0000)]
[IndVars] Add a todo to reflect a further oppurtunity identified in D69009

Nikita pointed out an oppurtunity, might as well document it in the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375380 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IndVars] Eliminate loop exits with equivalent exit counts
Philip Reames [Sun, 20 Oct 2019 23:38:02 +0000 (23:38 +0000)]
[IndVars] Eliminate loop exits with equivalent exit counts

We can end up with two loop exits whose exit counts are equivalent, but whose textual representation is different and non-obvious. For the sub-case where we have a series of exits which dominate one another (common), eliminate any exits which would iterate *after* a previous exit on the exiting iteration.

As noted in the TODO being removed, I'd always thought this was a good idea, but I've now seen this in a real workload as well.

Interestingly, in review, Nikita pointed out there's let another oppurtunity to leverage SCEV's reasoning.  If we kept track of the min of dominanting exits so far, we could discharge exits with EC >= MDE.  This is less powerful than the existing transform (since later exits aren't considered), but potentially more powerful for any case where SCEV can prove a >= b, but neither a == b or a > b.  I don't have an example to illustrate that oppurtunity, but won't be suprised if we find one and return to handle that case as well.

Differential Revision: https://reviews.llvm.org/D69009

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375379 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] conditional sign-extend of high-bit-extract: 'or' pattern.
Roman Lebedev [Sun, 20 Oct 2019 20:52:06 +0000 (20:52 +0000)]
[InstCombine] conditional sign-extend of high-bit-extract: 'or' pattern.

In this pattern, all the "magic" bits that we'd `add` are all
high sign bits, and in the value we'd be adding to they are all unset,
not unexpectedly, so we can have an `or` there:
https://rise4fun.com/Alive/ups

It is possible that `haveNoCommonBitsSet()` should be taught about this
pattern so that we never have an `add` variant, but the reasoning would
need to be recursive (because of that `select`), so i'm not really sure
that would be worth it just yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375378 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][InstCombine] conditional sign-extend of high-bit-extract: 'and' pat. can be...
Roman Lebedev [Sun, 20 Oct 2019 20:51:37 +0000 (20:51 +0000)]
[NFC][InstCombine] conditional sign-extend of high-bit-extract: 'and' pat. can be 'or' pattern.

In this pattern, all the "magic" bits that we'd add are all
high sign bits, and in the value we'd be adding to they are all unset,
not unexpectedly, so we can have an `or` there:
https://rise4fun.com/Alive/ups

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375377 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Merge r375375
GN Sync Bot [Sun, 20 Oct 2019 20:44:56 +0000 (20:44 +0000)]
gn build: Merge r375375

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375376 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReverted r375254 as it has broken some build bots for a long time.
Vladimir Vereschaka [Sun, 20 Oct 2019 20:39:33 +0000 (20:39 +0000)]
Reverted r375254 as it has broken some build bots for a long time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375375 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Fold uadd.sat(a, b) == 0 and usub.sat(a, b) == 0
Nikita Popov [Sun, 20 Oct 2019 20:19:42 +0000 (20:19 +0000)]
[InstCombine] Fold uadd.sat(a, b) == 0 and usub.sat(a, b) == 0

This adds folds for comparing uadd.sat/usub.sat with zero:

 * uadd.sat(a, b) == 0 => a == 0 && b == 0 => (a | b) == 0
 * usub.sat(a, b) == 0 => a <= b

And inverted forms for !=.

Differential Revision: https://reviews.llvm.org/D69224

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375374 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix buildbot error in SIRegisterInfo.cpp.
Zinovy Nis [Sun, 20 Oct 2019 20:01:16 +0000 (20:01 +0000)]
Fix buildbot error in SIRegisterInfo.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375373 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Add tests for uadd/sub.sat(a, b) == 0; NFC
Nikita Popov [Sun, 20 Oct 2019 19:50:31 +0000 (19:50 +0000)]
[InstCombine] Add tests for uadd/sub.sat(a, b) == 0; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375372 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Shift amount reassociation in shifty sign bit test (PR43595)
Roman Lebedev [Sun, 20 Oct 2019 19:38:50 +0000 (19:38 +0000)]
[InstCombine] Shift amount reassociation in shifty sign bit test (PR43595)

Summary:
This problem consists of several parts:
* Basic sign bit extraction - `trunc? (?shr %x, (bitwidth(x)-1))`.
  This is trivial, and easy to do, we have a fold for it.
* Shift amount reassociation - if we have two identical shifts,
  and we can simplify-add their shift amounts together,
  then we likely can just perform them as a single shift.
  But this is finicky, has one-use restrictions,
  and shift opcodes must be identical.

But there is a super-pattern where both of these work together.
to produce sign bit test from two shifts + comparison.
We do indeed already handle this in most cases.
But since we get that fold transitively, it has one-use restrictions.
And what's worse, in this case the right-shifts aren't required to be
identical, and we can't handle that transitively:

If the total shift amount is bitwidth-1, only a sign bit will remain
in the output value. But if we look at this from the perspective of
two shifts, we can't fold - we can't possibly know what bit pattern
we'd produce via two shifts, it will be *some* kind of a mask
produced from original sign bit, but we just can't tell it's shape:
https://rise4fun.com/Alive/cM0 https://rise4fun.com/Alive/9IN

But it will *only* contain sign bit and zeros.
So from the perspective of sign bit test, we're good:
https://rise4fun.com/Alive/FRz https://rise4fun.com/Alive/qBU
Superb!

So the simplest solution is to extend `reassociateShiftAmtsOfTwoSameDirectionShifts()` to also have a
sudo-analysis mode that will ignore extra-uses, and will only check
whether a) those are two right shifts and b) they end up with bitwidth(x)-1
shift amount and return either the original value that we sign-checking,
or null.

This does not have any functionality change for
the existing `reassociateShiftAmtsOfTwoSameDirectionShifts()`.

All that being said, as disscussed in the review, this yet again
increases usage of instsimplify in instcombine as utility.
Some day that may need to be reevaluated.

https://bugs.llvm.org/show_bug.cgi?id=43595

Reviewers: spatel, efriedma, vsk

Reviewed By: spatel

Subscribers: xbolva00, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68930

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375371 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ConstantRange] makeGuaranteedNoWrapRegion(): `shl` support
Roman Lebedev [Sun, 20 Oct 2019 19:36:55 +0000 (19:36 +0000)]
[ConstantRange] makeGuaranteedNoWrapRegion(): `shl` support

Summary:
If all the shifts amount are already poison-producing,
then we can add more poison-producing flags ontop:
https://rise4fun.com/Alive/Ocwi

Otherwise, we should only consider the possible range of shift amts that don't result in poison.

For unsigned range not not overflow, we must not shift out any set bits,
and the actual limit for `x` can be computed by backtransforming
the maximal value we could ever get out of the `shl` - `-1` through
`lshr`. If the `x` is any larger than that then it will overflow.

Likewise for signed range, but just in signed domain..

This is based on the general idea outlined by @nikic in https://reviews.llvm.org/D68672#1714990

Reviewers: nikic, sanjoy

Reviewed By: nikic

Subscribers: hiraditya, llvm-commits, nikic

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375370 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ConstantRange] Optimize nowrap region test, remove redundant tests; NFC
Nikita Popov [Sun, 20 Oct 2019 18:59:14 +0000 (18:59 +0000)]
[ConstantRange] Optimize nowrap region test, remove redundant tests; NFC

Enumerate one less constant range in TestNoWrapRegionExhaustive,
which was unnecessary. This allows us to bump the bit count from
3 to 5 while keeping reasonable timing.

Drop four tests for multiply nowrap regions, as these cover subsets
of the exhaustive test. They do use a wider bitwidth, but I don't
think it's worthwhile to have them additionally now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375369 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Increase vcc liveness scan threshold
Matt Arsenault [Sun, 20 Oct 2019 17:44:17 +0000 (17:44 +0000)]
AMDGPU: Increase vcc liveness scan threshold

Avoids a test regression in a future patch. Also add debug printing on
this case, so I waste less time debugging folds in the future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375367 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Split flat offsets that don't fit in DAG
Matt Arsenault [Sun, 20 Oct 2019 17:34:44 +0000 (17:34 +0000)]
AMDGPU: Split flat offsets that don't fit in DAG

We handle it this way for some other address spaces.

Since r349196, SILoadStoreOptimizer has been trying to do this. This
is after SIFoldOperands runs, which can change the addressing
patterns. It's simpler to just split this earlier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375366 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Fix missing OPERAND_IMMEDIATE
Matt Arsenault [Sun, 20 Oct 2019 16:56:10 +0000 (16:56 +0000)]
AMDGPU: Fix missing OPERAND_IMMEDIATE

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375365 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Add baseline tests for flat offset splitting
Matt Arsenault [Sun, 20 Oct 2019 16:33:21 +0000 (16:33 +0000)]
AMDGPU: Add baseline tests for flat offset splitting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375364 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Don't re-get the subtarget
Matt Arsenault [Sun, 20 Oct 2019 16:26:26 +0000 (16:26 +0000)]
AMDGPU: Don't re-get the subtarget

It's already available in the class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375363 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[yaml2obj][obj2yaml] - Do not create a symbol table by default.
George Rimar [Sun, 20 Oct 2019 14:47:17 +0000 (14:47 +0000)]
[yaml2obj][obj2yaml] - Do not create a symbol table by default.

This patch tries to resolve problems faced in D68943
and uses some of the code written by Konrad Wilhelm Kleine
in that patch.

Previously, yaml2obj tool always created a .symtab section.
This patch changes that. With it we only create it when
have a "Symbols:" tag in the YAML document or when
we need to create it because it is used by another section(s).

obj2yaml follows the new behavior and does not print "Symbols:"
anymore when there is no symbol table.

Differential revision: https://reviews.llvm.org/D69041

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375361 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix minor warning in DWARFVerifier.
Zinovy Nis [Sun, 20 Oct 2019 07:55:50 +0000 (07:55 +0000)]
Fix minor warning in DWARFVerifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375357 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Don't error on calls to null or undef
Matt Arsenault [Sun, 20 Oct 2019 07:46:04 +0000 (07:46 +0000)]
AMDGPU: Don't error on calls to null or undef

Calls to constants should probably be generally handled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375356 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SCEV] Simplify umin/max of zext and sext of the same value
Philip Reames [Sat, 19 Oct 2019 17:23:02 +0000 (17:23 +0000)]
[SCEV] Simplify umin/max of zext and sext of the same value

This is a common idiom which arises after induction variables are widened, and we have two or more exit conditions.  Interestingly, we don't have instcombine or instsimplify support for this either.

Differential Revision: https://reviews.llvm.org/D69006

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375349 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Pulled out helper to decode target shuffle element sentinel values to 'Zeroable...
Simon Pilgrim [Sat, 19 Oct 2019 16:58:24 +0000 (16:58 +0000)]
[X86] Pulled out helper to decode target shuffle element sentinel values to 'Zeroable' known undef/zero bits. NFCI.

Renamed 'resolveTargetShuffleAndZeroables' to 'resolveTargetShuffleFromZeroables' to match.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375348 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[TargetLowering][DAGCombine][MSP430] add/use hook for Shift Amount Threshold (1/2)
Sanjay Patel [Sat, 19 Oct 2019 16:57:02 +0000 (16:57 +0000)]
[TargetLowering][DAGCombine][MSP430] add/use hook for Shift Amount Threshold (1/2)

Provides a TLI hook to allow targets to relax the emission of shifts, thus enabling
codegen improvements on targets with no multiple shift instructions and cheap selects
or branches.

Contributes to a Fix for PR43559:
https://bugs.llvm.org/show_bug.cgi?id=43559

Patch by: @joanlluch (Joan LLuch)

Differential Revision: https://reviews.llvm.org/D69116

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375347 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Add dependency on GlobalISel for unit tests to fix shared libs build
Nemanja Ivanovic [Sat, 19 Oct 2019 16:40:26 +0000 (16:40 +0000)]
[ARM] Add dependency on GlobalISel for unit tests to fix shared libs build

The unit test uses GlobalISel but the dependency is not listed in the
CMakeLists.txt file which causes failures in shared libs build with GCC.

This just adds the dependency.

Differential revision: https://reviews.llvm.org/D69064

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375346 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MSP430] Shift Amount Threshold in DAGCombine (Baseline Tests); NFC
Sanjay Patel [Sat, 19 Oct 2019 16:29:32 +0000 (16:29 +0000)]
[MSP430] Shift Amount Threshold in DAGCombine (Baseline Tests); NFC

Patch by: @joanlluch (Joan LLuch)

Differential Revision: https://reviews.llvm.org/D69099

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375345 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] lowerV16I8Shuffle - tryToWidenViaDuplication - undef unpack args
Simon Pilgrim [Sat, 19 Oct 2019 13:18:02 +0000 (13:18 +0000)]
[X86][SSE] lowerV16I8Shuffle - tryToWidenViaDuplication - undef unpack args

tryToWidenViaDuplication lowers using the shuffle_v8i16(unpack_v16i8(shuffle_v8i16(x),shuffle_v8i16(x))) pattern, but the unpack only needs the even/odd 16i8 args if the original v16i8 shuffle mask references the even/odd elements - which isn't true for many extension style shuffles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375342 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] LowerUINT_TO_FP_i64 - only use HADDPD for size/fast-hops
Simon Pilgrim [Sat, 19 Oct 2019 11:53:48 +0000 (11:53 +0000)]
[X86][SSE] LowerUINT_TO_FP_i64 - only use HADDPD for size/fast-hops

We were always generating a single source HADDPD, but really we should only do this if shouldUseHorizontalOp says its a good idea.

Differential Revision: https://reviews.llvm.org/D69175

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375341 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoExplicit in the doc the current list of projects (with easy copy and paste)
Sylvestre Ledru [Sat, 19 Oct 2019 09:55:24 +0000 (09:55 +0000)]
Explicit in the doc the current list of projects (with easy copy and paste)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375339 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMake it clear in the doc that 'all' in LLVM_ENABLE_PROJECTS does install ALL projects
Sylvestre Ledru [Sat, 19 Oct 2019 09:27:14 +0000 (09:27 +0000)]
Make it clear in the doc that 'all' in LLVM_ENABLE_PROJECTS does install ALL projects

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375337 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAvoid including CodeView/SymbolRecord.h from MCStreamer.h
Reid Kleckner [Sat, 19 Oct 2019 01:44:09 +0000 (01:44 +0000)]
Avoid including CodeView/SymbolRecord.h from MCStreamer.h

Move the types needed out so they can be forward declared instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375325 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Remove optnone from a test
Matt Arsenault [Sat, 19 Oct 2019 01:34:59 +0000 (01:34 +0000)]
AMDGPU: Remove optnone from a test

It's not clear why the test had this. I'm unable to break the original
case with the original patch reverted with or without optnone.

This avoids a failure in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375321 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoPrune a LegacyDivergenceAnalysis and MachineLoopInfo include each
Reid Kleckner [Sat, 19 Oct 2019 01:31:09 +0000 (01:31 +0000)]
Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each

Now X86ISelLowering doesn't depend on many IR analyses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375320 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoPrune Analysis includes from SelectionDAG.h
Reid Kleckner [Sat, 19 Oct 2019 01:07:48 +0000 (01:07 +0000)]
Prune Analysis includes from SelectionDAG.h

Only forward declarations are needed here. Follow-on to r375311.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375319 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMove endian constant from Host.h to SwapByteOrder.h, prune include
Reid Kleckner [Sat, 19 Oct 2019 00:48:11 +0000 (00:48 +0000)]
Move endian constant from Host.h to SwapByteOrder.h, prune include

Works on this dependency chain:
  ArrayRef.h ->
  Hashing.h -> --CUT--
  Host.h ->
  StringMap.h / StringRef.h

ArrayRef is very popular, but Host.h is rarely needed. Move the
IsBigEndianHost constant to SwapByteOrder.h. Clients of that header are
more likely to need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375316 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoPrune two MachineInstr.h includes, fix up deps
Reid Kleckner [Sat, 19 Oct 2019 00:22:07 +0000 (00:22 +0000)]
Prune two MachineInstr.h includes, fix up deps

MachineInstr.h included AliasAnalysis.h, which includes a world of IR
constructs mostly unneeded in CodeGen. Prune it. Same for
DebugInfoMetadata.h.

Noticed with -ftime-trace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375311 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoLiveIntervals: Fix handleMoveUp with subreg def moving across a def
Matt Arsenault [Fri, 18 Oct 2019 23:24:25 +0000 (23:24 +0000)]
LiveIntervals: Fix handleMoveUp with subreg def moving across a def

If a subregister def was moved across another subregister def and
another use, the main range was not correctly updated. The end point
of the moved interval ended too early and missed the use from theh
other lanes in the subreg def.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375300 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Build compiler-rt code with -fvisibility=hidden.
Peter Collingbourne [Fri, 18 Oct 2019 22:52:17 +0000 (22:52 +0000)]
gn build: Build compiler-rt code with -fvisibility=hidden.

This matches the CMake build.

Differential Revision: https://reviews.llvm.org/D69202

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375299 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] move PHI nodes to AGPR class
Stanislav Mekhanoshin [Fri, 18 Oct 2019 22:48:45 +0000 (22:48 +0000)]
[AMDGPU] move PHI nodes to AGPR class

If all uses of a PHI are in AGPR register class we should
avoid unneeded copies via VGPRs.

Differential Revision: https://reviews.llvm.org/D69200

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375297 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SampleFDO] Add profile remapping support for profile on-demand loading used
Wei Mi [Fri, 18 Oct 2019 22:35:20 +0000 (22:35 +0000)]
[SampleFDO] Add profile remapping support for profile on-demand loading used
by ExtBinary format profile

Profile on-demand loading was added for ExtBinary format profile in rL374233,
but currently profile on-demand loading doesn't work well with profile
remapping. The patch adds the support.

Suppose a function in the current module has outline instance in the profile.
The function name in the module is different from the name of the outline
instance, but remapper knows the two names are equal. When loading profile
on-demand, the outline instance has to be loaded with remapper's help.

At the same time SampleProfileReaderItaniumRemapper is changed from a proxy
of SampleProfileReader to a helper member in SampleProfileReader.

Differential Revision: https://reviews.llvm.org/D68901

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375295 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Remove -amdgpu-spill-sgpr-to-smem.
Jay Foad [Fri, 18 Oct 2019 21:48:22 +0000 (21:48 +0000)]
[AMDGPU] Remove -amdgpu-spill-sgpr-to-smem.

Summary: The implementation was never completed and never used except in tests.

Reviewers: arsenm, mareko

Subscribers: qcolombet, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69163

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375293 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CVP] setDeducedOverflowingFlags(): actually inc per-opcode stats
Roman Lebedev [Fri, 18 Oct 2019 21:19:26 +0000 (21:19 +0000)]
[CVP] setDeducedOverflowingFlags(): actually inc per-opcode stats

This is really embarrassing. Those are pointers, so that offsets the
pointers, not the statistics pointed-by the pointer...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375290 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Merge r375288
GN Sync Bot [Fri, 18 Oct 2019 21:11:20 +0000 (21:11 +0000)]
gn build: Merge r375288

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375289 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDisable exit-on-SIGPIPE in lldb
Vedant Kumar [Fri, 18 Oct 2019 21:05:30 +0000 (21:05 +0000)]
Disable exit-on-SIGPIPE in lldb

Occasionally, during test teardown, LLDB writes to a closed pipe.
Sometimes the communication is inherently unreliable, so LLDB tries to
avoid being killed due to SIGPIPE (it calls `signal(SIGPIPE, SIG_IGN)`).
However, LLVM's default SIGPIPE behavior overrides LLDB's, causing it to
exit with IO_ERR.

Opt LLDB out of the default SIGPIPE behavior. I expect that this will
resolve some LLDB test suite flakiness (tests randomly failing with
IO_ERR) that we've seen since r344372.

rdar://55750240

Differential Revision: https://reviews.llvm.org/D69148

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375288 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Fix register parsing in .seh_* in Intel syntax
Reid Kleckner [Fri, 18 Oct 2019 21:01:41 +0000 (21:01 +0000)]
[X86] Fix register parsing in .seh_* in Intel syntax

Previously, the parser checked for a '%' prefix to indicate a register.
In Intel syntax mode, LLVM does not print a '%' prefix on registers, so
LLVM could not parse its own assembly output. Instead, require that
register numbers be integer literals, or at least start with an integer
literal, which is consistent with .cfi_* directive register parsing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375287 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][CVP] Some tests for `mul` no-wrap deduction
Roman Lebedev [Fri, 18 Oct 2019 20:36:19 +0000 (20:36 +0000)]
[NFC][CVP] Some tests for `mul` no-wrap deduction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375285 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Allow multivalue signatures in object files
Thomas Lively [Fri, 18 Oct 2019 20:27:30 +0000 (20:27 +0000)]
[WebAssembly] Allow multivalue signatures in object files

Summary:
Also changes the wasm YAML format to reflect the possibility of having
multiple return types and to put the returns after the params for
consistency with the binary encoding.

Reviewers: aheejin, sbc100

Subscribers: dschuff, jgravelle-google, hiraditya, sunfish, arphaman, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375283 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GISel][CallLowering] Make isIncomingArgumentHandler a pure virtual method
Quentin Colombet [Fri, 18 Oct 2019 20:13:42 +0000 (20:13 +0000)]
[GISel][CallLowering] Make isIncomingArgumentHandler a pure virtual method

The default implementation of isIncomingArgumentHandler could lead
to generating incorrect code.
Make it a pure virtual method, so that targets know they have to
override it to produce correct code.

NFC

Differential Revision: https://reviews.llvm.org/D69187

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375277 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CVP] After proving that @llvm.with.overflow()/@llvm.sat() don't overflow, also try...
Roman Lebedev [Fri, 18 Oct 2019 19:32:47 +0000 (19:32 +0000)]
[CVP] After proving that @llvm.with.overflow()/@llvm.sat() don't overflow, also try to prove other no-wrap

Summary:
CVP, unlike InstCombine, does not run till exaustion.
It only does a single pass.

When dealing with those special binops, if we prove that they can
safely be demoted into their usual binop form,
we do set the no-wrap we deduced. But when dealing with usual binops,
we try to deduce both no-wraps.

So if we convert e.g. @llvm.uadd.with.overflow() to `add nuw`,
we won't attempt to check whether it can be `add nuw nsw`.

This patch proposes to call `processBinOp()` on newly-created binop,
which is identical to what we do for div/rem already.

Reviewers: nikic, spatel, reames

Reviewed By: nikic

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69183

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375273 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[examples] Fix some comments in the LLJITWithJITLink example
Lang Hames [Fri, 18 Oct 2019 18:35:02 +0000 (18:35 +0000)]
[examples] Fix some comments in the LLJITWithJITLink example

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375269 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Relax 32-bit SGPR register class
Matt Arsenault [Fri, 18 Oct 2019 18:26:37 +0000 (18:26 +0000)]
AMDGPU: Relax 32-bit SGPR register class

Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This
will allow the register coalescer to do a better job eliminating
copies to m0.

For GlobalISel, as a terrible hack, use SGPR_32 for things that should
use SCC until booleans are solved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375267 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[examples] Add an example of how to use JITLink and small-code-model with LLJIT.
Lang Hames [Fri, 18 Oct 2019 18:25:15 +0000 (18:25 +0000)]
[examples] Add an example of how to use JITLink and small-code-model with LLJIT.

JITLink is LLVM's newer jit-linker. It is an alternative to (and hopefully
eventually a replacement for) LLVM's older jit-linker, RuntimeDyld. Unlike
RuntimeDyld which requries JIT'd code to be complied with the large code
model, JITlink can link code compiled with the small code model, which is
the native code model for a number of targets (including all supported MachO
targets).

This example shows how to:

-- Create a JITLink InProcessMemoryManager
-- Set the code model to small
-- Use a JITLink backed ObjectLinkingLayer as the linking layer for LLJIT
   (rather than the default RTDyldObjectLinkingLayer).

Note: This example will only work on platforms supported by JITLink. As of
this commit that's MachO/x86-64 and MachO/arm64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375266 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Fix SMEM WAR hazard for gfx10 readlane
Austin Kerbow [Fri, 18 Oct 2019 18:20:30 +0000 (18:20 +0000)]
AMDGPU: Fix SMEM WAR hazard for gfx10 readlane

Summary: Hazard recognizer fails to see hazard with V_READLANE_B32_gfx10.

Reviewers: rampitec

Reviewed By: rampitec

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69172

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375265 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[lit] Reduce value of synthesized timeouts
Julian Lettner [Fri, 18 Oct 2019 17:59:46 +0000 (17:59 +0000)]
[lit] Reduce value of synthesized timeouts

Large timeout values (one year, positive infinity) trip up Python on
Windows with "OverflowError: timeout value is too large".  One week
seems to work and is still large enough in practice.

Thanks to Simon Pilgrim for helping me test this.
https://reviews.llvm.org/rL375171

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375264 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[lit] Remove unnecessary tracking of test_index
Julian Lettner [Fri, 18 Oct 2019 17:31:48 +0000 (17:31 +0000)]
[lit] Remove unnecessary tracking of test_index

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375263 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[lit] Only send back test result from worker process
Julian Lettner [Fri, 18 Oct 2019 17:31:45 +0000 (17:31 +0000)]
[lit] Only send back test result from worker process

Avoid sending back the whole run.Test object (which needs to be pickled)
from the worker process when we are only interested in the test result.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375262 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Codegen] Link MIRParser into CodeGenTests to fix MachineSizeOptsTest building
Roman Lebedev [Fri, 18 Oct 2019 17:18:21 +0000 (17:18 +0000)]
[Codegen] Link MIRParser into CodeGenTests to fix MachineSizeOptsTest building

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375261 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][CVP] Add @llvm.*.sat tests where we could prove both no-overflows
Roman Lebedev [Fri, 18 Oct 2019 17:18:12 +0000 (17:18 +0000)]
[NFC][CVP] Add @llvm.*.sat tests where we could prove both no-overflows

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375260 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agogn build: Merge r375254
GN Sync Bot [Fri, 18 Oct 2019 16:52:12 +0000 (16:52 +0000)]
gn build: Merge r375254

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375256 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PGO][PGSO] SizeOpts changes.
Hiroshi Yamauchi [Fri, 18 Oct 2019 16:46:01 +0000 (16:46 +0000)]
[PGO][PGSO] SizeOpts changes.

Summary:
(Split of off D67120)

SizeOpts/MachineSizeOpts changes for profile guided size optimization.

Reviewers: davidxl

Subscribers: mgorny, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69070

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375254 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] combineX86ShufflesRecursively - pull out isTargetShuffleVariableMask. NFCI.
Simon Pilgrim [Fri, 18 Oct 2019 16:39:01 +0000 (16:39 +0000)]
[X86] combineX86ShufflesRecursively - pull out isTargetShuffleVariableMask. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375253 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IR] Reimplement FPMathOperator::classof as a whitelist.
Jay Foad [Fri, 18 Oct 2019 16:16:36 +0000 (16:16 +0000)]
[IR] Reimplement FPMathOperator::classof as a whitelist.

Summary:
This makes it much easier to verify that the implementation matches the
documentation. It uncovered a bug in the unit tests where we were
accidentally setting fast math flags on a load instruction.

Reviewers: spatel, wristow, arsenm, hfinkel, aemerson, efriedma, cameron.mcinally, mcberg2017, jmolloy

Subscribers: wdng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69176

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375252 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoUpdate docs for fast-math flags.
Jay Foad [Fri, 18 Oct 2019 16:07:09 +0000 (16:07 +0000)]
Update docs for fast-math flags.

This adds fneg, phi and select to the list of operations that may use
fast-math flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375250 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoUpdate MinidumpYAML to use minidump::Exception for exception stream
Joseph Tremoulet [Fri, 18 Oct 2019 14:56:19 +0000 (14:56 +0000)]
Update MinidumpYAML to use minidump::Exception for exception stream

Reviewers: labath, jhenderson, clayborg, MaskRay, grimar

Reviewed By: grimar

Subscribers: lldb-commits, grimar, MaskRay, hiraditya, llvm-commits

Tags: #llvm, #lldb

Differential Revision: https://reviews.llvm.org/D68657

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375242 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32
Dmitry Preobrazhensky [Fri, 18 Oct 2019 14:49:53 +0000 (14:49 +0000)]
[AMDGPU][MC][GFX10] Added sdwa/dpp versions of v_cndmask_b32

See https://bugs.llvm.org/show_bug.cgi?id=43608

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D69096

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375241 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DFAPacketizer] Fix large compile-time regression for VLIW targets
James Molloy [Fri, 18 Oct 2019 14:48:35 +0000 (14:48 +0000)]
[DFAPacketizer] Fix large compile-time regression for VLIW targets

D68992 / rL375086 refactored the packetizer and removed a bunch of logic. Unfortunately it creates an Automaton object whenever a DFAPacketizer is required. These objects have no longevity, and in particular on a debug build the population of the Automaton's transition map from the underlying table is very slow (because it is called ~10 times per MachineFunction, in the testcase I'm looking at).

This patch changes Automaton to wrap its underlying constant data in std::shared_ptr, which allows trivial copy construction. The DFAPacketizer creation function now creates a static archetypical Automaton and copies that whenever a new DFAPacketizer is required.

This takes a testcase down from ~20s to ~0.5s in debug mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375240 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd ExceptionStream to llvm::Object::minidump
Joseph Tremoulet [Fri, 18 Oct 2019 14:43:15 +0000 (14:43 +0000)]
Add ExceptionStream to llvm::Object::minidump

Summary:
This will allow updating MinidumpYAML and LLDB to use this common
definition.

Reviewers: labath, jhenderson, clayborg

Reviewed By: labath

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68656

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375239 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoOne more attempt to fix PS4 buildbot after r375219
Eugene Leviant [Fri, 18 Oct 2019 14:11:19 +0000 (14:11 +0000)]
One more attempt to fix PS4 buildbot after r375219

PS4 buildbot seems to be dropping variable names for some reason

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375237 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAttempt to fix PS4 buildbot after r375219
Eugene Leviant [Fri, 18 Oct 2019 13:52:51 +0000 (13:52 +0000)]
Attempt to fix PS4 buildbot after r375219

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375235 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r375152 as it is causing failures on EXPENSIVE_CHECKS bot
Nemanja Ivanovic [Fri, 18 Oct 2019 13:38:46 +0000 (13:38 +0000)]
Revert r375152 as it is causing failures on EXPENSIVE_CHECKS bot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375233 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SCEV] Removing deprecated comment in ScalarEvolutionExpander
Victor Campos [Fri, 18 Oct 2019 13:33:45 +0000 (13:33 +0000)]
[SCEV] Removing deprecated comment in ScalarEvolutionExpander

Removing a comment in the ScalarEvolutionExpander.cpp file that was about the
class SCEVSDivExpr, which has been long gone from LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375232 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa
Dmitry Preobrazhensky [Fri, 18 Oct 2019 13:31:53 +0000 (13:31 +0000)]
[AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa

See https://bugs.llvm.org/show_bug.cgi?id=43607

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D69095

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375231 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][CVP] Count all the no-wraps we proved
Roman Lebedev [Fri, 18 Oct 2019 13:20:16 +0000 (13:20 +0000)]
[NFC][CVP] Count all the no-wraps we proved

Summary:
It looks like this is the only missing statistic in the CVP pass.
Since we prove NSW and NUW separately i'd think we should count them separately too.

Reviewers: nikic, spatel, reames

Reviewed By: spatel

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68740

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375230 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Adding support for PMMIR_EL1 register
Victor Campos [Fri, 18 Oct 2019 12:40:29 +0000 (12:40 +0000)]
[AArch64] Adding support for PMMIR_EL1 register

Summary:
The PMMIR_EL1 register is present in Armv8.4 with PMU extension.
This patch adds support for it.

Reviewers: t.p.northover, dnsampaio

Reviewed By: dnsampaio

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68940

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375228 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][SVE] Add SPLAT_VECTOR ISD Node
Graham Hunter [Fri, 18 Oct 2019 11:48:35 +0000 (11:48 +0000)]
[AArch64][SVE] Add SPLAT_VECTOR ISD Node

Adds a new ISD node to replicate a scalar value across all elements of
a vector. This is needed for scalable vectors, since BUILD_VECTOR cannot
be used.

Fixes up default type legalization for scalable vectors after the
new MVT type ranges were introduced.

At present I only use this node for scalable vectors. A DAGCombine has
been added to transform a BUILD_VECTOR into a SPLAT_VECTOR if all
elements are the same, but only if the default operation action of
Expand has been overridden by the target.

I've only added result promotion legalization for scalable vector
i8/i16/i32/i64 types in AArch64 for now.

Reviewers: t.p.northover, javed.absar, greened, cameron.mcinally, jmolloy

Reviewed By: jmolloy

Differential Revision: https://reviews.llvm.org/D47775

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@375222 91177308-0d34-0410-b5e6-96231b3b80d8