Meador Inge [Sat, 10 Nov 2012 03:11:06 +0000 (03:11 +0000)]
Add more functions to the target library information.
In the process of migrating optimizations from the simplify-libcalls pass
to the instcombine pass I noticed that a few functions are missing from
the target library information. These functions need to be available for
querying in the instcombine library call simplifiers. More functions will
probably be added in the future as more simplifiers are migrated to
instcombine.
Nadav Rotem [Fri, 9 Nov 2012 07:09:44 +0000 (07:09 +0000)]
Add support for memory runtime check. When we can, we calculate array bounds.
If the arrays are found to be disjoint then we run the vectorized version of
the loop. If they are not, we run the scalar code.
Michael Liao [Thu, 8 Nov 2012 07:28:54 +0000 (07:28 +0000)]
Add support of RTM from TSX extension
- Add RTM code generation support throught 3 X86 intrinsics:
xbegin()/xend() to start/end a transaction region, and xabort() to abort a
tranaction region
Add a relocation visitor to lib object. This works via caching relocated
values in a map that can be passed to consumers. Add a testcase that
ensures this works for llvm-dwarfdump.
Andrew Trick [Wed, 7 Nov 2012 07:05:09 +0000 (07:05 +0000)]
misched: Heuristics based on the machine model.
misched is disabled by default. With -enable-misched, these heuristics
balance the schedule to simultaneously avoid saturating processor
resources, expose ILP, and minimize register pressure. I've been
analyzing the performance of these heuristics on everything in the
llvm test suite in addition to a few other benchmarks. I would like
each heuristic check to be verified by a unit test, but I'm still
trying to figure out the best way to do that. The heuristics are still
in considerable flux, but as they are refined we should be rigorous
about unit testing the improvements.
Bill Wendling [Wed, 7 Nov 2012 04:42:18 +0000 (04:42 +0000)]
When we're updating the subprogram scope DIE, we want to determine if we're
updating an abstract DIE or not. If we are, then we use that. Its children will
be added on later, as well as the object pointer attribute. Otherwise, this
function may be called with a concrete DIE twice and adding the children and
object pointer attribute to it twice.
<rdar://problem/12401423&12600340>
Chad Rosier [Wed, 7 Nov 2012 00:13:01 +0000 (00:13 +0000)]
[arm fast-isel] Appease the machine verifier by using the proper register
classes. For my test case the number of errors drop from 356 to 21.
Part of rdar://12594152
Chad Rosier [Tue, 6 Nov 2012 23:05:24 +0000 (23:05 +0000)]
Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering all
registers. Previously, the register we being marked as implicitly defined, but
not killed. In some cases this would cause the register scavenger to spill a
dead register.
Also, use an empty register mask to simplify the logic and to reduce the memory
footprint.
rdar://12592448
Chad Rosier [Tue, 6 Nov 2012 22:52:42 +0000 (22:52 +0000)]
[regallocfast] Make sure the MachineRegisterInfo is aware of clobbers from a
register masks. This is an obvious and necessary fix for a soon to be committed
patch. No test case possible at this time. Reviewed by Jakob.
[c-index-test] When building with BUILD_CLANG_ONLY=YES, include c-index-test.
It is part of libclang and has other uses besides running the clang tests.
Andrew Kaylor [Tue, 6 Nov 2012 18:51:59 +0000 (18:51 +0000)]
Add interface for object-based JIT events.
This patch adds the interface to expose events from MCJIT when an object is emitted or freed and implements the MCJIT functionality to send those events. The IntelJITEventListener implementation is left empty for now. It will be fleshed out in a future patch.
Andrew Trick [Tue, 6 Nov 2012 07:10:38 +0000 (07:10 +0000)]
misched: TargetSchedule interface for machine resources.
Expose the processor resources defined by the machine model to the
scheduler and other clients through the TargetSchedule interface.
Normalize each resource count with respect to other kinds of
resources. This allows scheduling heuristics to balance resources
against other kinds of resources and latency.
Andrew Kaylor [Mon, 5 Nov 2012 20:57:16 +0000 (20:57 +0000)]
Add a method to indicate section address re-assignment is finished.
Prior to this patch RuntimeDyld attempted to re-apply relocations every time reassignSectionAddress was called (via MCJIT::mapSectionAddress). In addition to being inefficient and redundant, this led to a problem when a section was temporarily moved too far away from another section with a relative relocation referencing the section being moved. To fix this, I'm adding a new method (finalizeObject) which the client can call to indicate that it is finished rearranging section addresses so the relocations can safely be applied.
Ulrich Weigand [Mon, 5 Nov 2012 19:39:45 +0000 (19:39 +0000)]
On PowerPC64, integer return values (as well as arguments) are supposed
to be extended to a full register. This is modeled in the IR by marking
the return value (or argument) with a signext or zeroext attribute.
However, while these attributes are respected for function arguments,
they are currently ignored for function return values by the PowerPC
back-end. This patch updates PPCCallingConv.td to ask for the promotion
to i64, and fixes LowerReturn and LowerCallResult to implement it.
The new test case verifies that both arguments and return values are
properly extended when passing them; and also that the optimizers
understand incoming argument and return values are in fact guaranteed
by the ABI to be extended.
The patch caused a spurious breakage in CodeGen/PowerPC/coalesce-ext.ll,
since the test case used a "ret" instruction to create a use of an i32
value at the end of the function (to set up data flow as required for
what the test is intended to test). Since there's now an implicit
promotion to i64, that data flow no longer works as expected. To fix
this, this patch now adds an extra "add" to ensure we have an appropriate
use of the i32 value.
Hal Finkel [Mon, 5 Nov 2012 18:18:42 +0000 (18:18 +0000)]
Add support for the PowerPC-specific inline asm Z constraint and y modifier.
The Z constraint specifies an r+r memory address, and the y modifier expands
to the "r, r" in the asm string. For this initial implementation, the base
register is forced to r0 (which has the special meaning of 0 for r+r addressing
on PowerPC) and the full address is taken in the second register. In the
future, this should be improved.
Richard Osborne [Mon, 5 Nov 2012 10:48:24 +0000 (10:48 +0000)]
Don't infer whether a value is captured in the current function from the
'nocapture' attribute.
The nocapture attribute only specifies that no copies are made that
outlive the function. This isn't the same as there being no copies at all.
This fixes PR14045.
Duncan Sands [Sat, 3 Nov 2012 14:04:04 +0000 (14:04 +0000)]
Fix the IntegersSubsetTest unit test when compiled with gcc-4.7. The issue here
is that the unit test doesn't have IntTy equal to APInt, instead it uses a class
derived from APInt. When, as in these lines, an IntTy& reference is returned
but is assigned to an APInt&, the compiler destroys the temporary the IntTy& was
referring to, leaving the APInt& referring to garbage. This causes the unittest
to fail systematically on my machine; it can also be caught by running the test
under valgrind.
Akira Hatanaka [Fri, 2 Nov 2012 23:36:01 +0000 (23:36 +0000)]
[mips] Do not reserve all 64-bit registers, but only the ones which need to be
reserved. Without this fix, RegScavenger::getRegsAvailable incorrectly
returns an empty set of integer registers.
Fix a build problem with xlc. The error message was
"../llvm-git/utils/TableGen/CodeGenSchedule.cpp", line 1594.12: 1540-0218 (S) The call does not match any parameter list for "operator+".
"../llvm-git/include/llvm/ADT/STLExtras.h", line 130.1: 1540-1283 (I) "template <class _Iterator, class Func> llvm::operator+(mapped_iterator<_Iterator,Func>::difference_type, const mapped_iterator<_Iterator,Func> &)" is not a viable candidate.
Akira Hatanaka [Fri, 2 Nov 2012 20:56:25 +0000 (20:56 +0000)]
[mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive
"set .noat" so that the assembler doesn't issue warnings when register $AT is
used.
projects / llvm / log