Daniel Sanders [Tue, 2 Jun 2015 20:32:50 +0000 (20:32 +0000)]
[mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only.
Summary:
Following on from r209907 which made personality encodings indirect, do the
same for TType encodings. This fixes the case where a try/catch block needs
to generate references to, for example, std::exception in the
.gcc_except_table.
Previous attempts at committing this broke the buildbots due to bugs in IAS.
These bugs have now been fixed so trying again.
DebugInfo: Really support 2^16 arguments in a subprogram
As a follow-up to r235955, actually support up to 65535 arguments in a
subprogram. r235955 missed assembly support, having only tested the new
limit via C++ unit tests. Code patch by Amjad Aboud.
Sanjay Patel [Tue, 2 Jun 2015 15:28:15 +0000 (15:28 +0000)]
make reciprocal estimate code generation more flexible by adding command-line options (2nd try)
The first try (r238051) to land this was reverted due to bot failures
that were hopefully addressed by r238788.
This patch adds a TargetRecip class for processing many recip codegen possibilities.
The class is intended to handle both command-line options to llc as well
as options passed in from a front-end such as clang with the -mrecip option.
The x86 backend is updated to use the new functionality.
Only -mcpu=btver2 with -ffast-math should see a functional change from this patch.
All other x86 CPUs continue to *not* use reciprocal estimates by default with -ffast-math.
AVX-512: Shorten implementation of lowerV16X32VectorShuffle()
using lowerVectorShuffleWithSHUFPS() and other shuffle-helpers routines.
Added matching of VALIGN instruction.
Summary:
With this change we are able to realign the stack dynamically, whenever it
contains objects with alignment requirements that are larger than the
alignment specified from the given ABI.
We have to use the $fp register as the frame pointer when we perform
dynamic stack realignment. In complex stack frames, with variably-sized
objects, we reserve additionally the callee-saved register $s7 as the
base pointer in order to reference locals.
Toma Tabacu [Tue, 2 Jun 2015 10:34:10 +0000 (10:34 +0000)]
[mips] [IAS] Reformat mips-expansions.s. NFC.
Summary:
Make mips-expansions.s more readable by grouping the instructions with their respective CHECK's.
This test is going to get a lot bigger soon and it will become essentially unreadable if the current formatting is kept.
I've also made the comments more useful and accurate, and I've restricted the RUN lines to under 80 columns.
The existing code would unnecessarily break LDRD/STRD apart with
non-adjacent registers, on thumb2 this is not necessary.
Ideally on thumb2 we shouldn't match for ldrd/strd pre-regalloc anymore
as there is not reason to set register hints anymore, changing that is
something for a future patch however.
Matthias Braun [Mon, 1 Jun 2015 22:31:17 +0000 (22:31 +0000)]
AArch64: Use CMP;CCMP sequences for and/or/setcc trees.
Previously CCMP/FCCMP instructions were only used by the
AArch64ConditionalCompares pass for control flow. This patch uses them
for SELECT like instructions as well by matching patterns in ISelLowering.
Owen Anderson [Mon, 1 Jun 2015 22:24:01 +0000 (22:24 +0000)]
Move the name pointer out of Value into a map that lives on the
LLVMContext. Production builds of clang do not set names on most
Value's, so this is wasted space on almost all subclasses of Value.
This reduces the size of all Value subclasses by 8 bytes on 64 bit
hosts.
The one tricky part of this change is averting compile time regression
by keeping Value::hasName() fast. This required stealing bits out of
NumOperands.
With this change, peak memory usage on verify-uselistorder-nodbg.lto.bc
is decreased by approximately 2.3% (~3MB absolute on my machine).
Matthias Braun [Mon, 1 Jun 2015 21:26:26 +0000 (21:26 +0000)]
LiveRangeEdit: Fix liveranges not shrinking on subrange kill.
If a dead instruction we may not only have a last-use in the main live
range but also in a subregister range if subregisters are tracked. We
need to partially rebuild live ranges in both cases.
The testcase only broke when subregister liveness was enabled. I
commited it in the current form because there is currently no flag to
enable/disable subregister liveness.
Frederic Riss [Mon, 1 Jun 2015 21:12:45 +0000 (21:12 +0000)]
[dsymutil] Use YAMLIO to dump debug map.
Doing so will allow us to also accept a YAML debug map in input as using
YAMLIO gives us the parsing for free. Being able to have textual debug
maps will in turn allow much more control over the tests, because 1/
no need to check-in a binary containing the debug map and 2/ it will allow
to use the same objects/IR files with made-up debug-maps to test
different scenari.
Make the C++ LTO API easier to use from C++ clients.
Start using C++ types such as StringRef and MemoryBuffer in the C++ LTO
API. In doing so, clarify the ownership of the native object file: the caller
now owns it, not the LTOCodeGenerator. The C libLTO library has been modified
to use a derived class of LTOCodeGenerator that owns the object file.
lit: Allow configurations to restrict the set of tests to run
By setting limit_to_features to a non empty list of features a configuration can
restrict the set of tests to run to only include tests that require a feature in
this list.
Owen Anderson [Mon, 1 Jun 2015 17:26:30 +0000 (17:26 +0000)]
Disable MachineSink on convergent operations, similar to how IR Sink is
restricted. No test because no in-tree target currently has convergent
MachineInstr's.
[mips][FastISel] Clobber HI0/LO0 registers in MUL instructions.
Summary:
The contents of the HI/LO registers are unpredictable after the execution of
the MUL instruction. In addition to implicitly defining these registers in the
MUL instruction definition, we have to mark those registers as dead too.
Without this the fast register allocator is running out of registers when the
MUL instruction is followed by another one that tries to allocate the AC0
register.
Hans Wennborg [Mon, 1 Jun 2015 15:37:58 +0000 (15:37 +0000)]
Drop remaining Dragonegg support in release scripts
r236077 and r236081 dropped Dragonegg support from the release scripts
but left some pieces. The most notable change is that Dragonegg won't
be tagged any more.
Artur Pilipenko [Mon, 1 Jun 2015 14:53:55 +0000 (14:53 +0000)]
Add isConstant argument to MDBuilder::createTBAAStructTagNode
According to the TBAA description struct-path tag node can have an optional IsConstant field. Add corresponding argument to MDBuilder::createTBAAStructTagNode.
Greg Bedwell [Mon, 1 Jun 2015 12:41:55 +0000 (12:41 +0000)]
In MSVC builds embed a VERSIONINFO resource in our exe and DLL files.
This embeds Windows version information into our executables and DLLs.
The most visible place to view this data is in the details tab of the file
properties window in Windows explorer.
AVX-512: Implemented vector shuffle lowering for v8i64 and v8f64 types.
I removed the vector-shuffle-512-v8.ll, it is auto-generated test, not valid any more.
David Blaikie [Mon, 1 Jun 2015 03:09:34 +0000 (03:09 +0000)]
[opaque pointer type] Explicitly store the pointee type of the result of a GEP
Alternatively, this type could be derived on-demand whenever
getResultElementType is called - if someone thinks that's the better
choice (simple time/space tradeoff), I'm happy to give it a go.
David Majnemer [Mon, 1 Jun 2015 00:15:08 +0000 (00:15 +0000)]
[PHITransAddr] Don't translate unreachable values
Unreachable values may use themselves in strange ways due to their
dominance property. Attempting to translate through them can lead to
infinite recursion, crashing LLVM. Instead, claim that we weren't able
to translate the value.
Keno Fischer [Sun, 31 May 2015 23:37:04 +0000 (23:37 +0000)]
[DWARF] Fix a bug in line info handling
This fixes a bug in the line info handling in the dwarf code, based on a
problem I when implementing RelocVisitor support for MachO.
Since addr+size will give the first address past the end of the function,
we need to back up one line table entry. Fix this by looking up the
end_addr-1, which is the last address in the range. Note that this also
removes a duplicate output from the llvm-rtdyld line table dump. The
relevant line is the end_sequence one in the line table and has an offset
of the first address part the end of the range and hence should not be
included.
Also factor out the common functionality into a separate function.
This comes up on MachO much more than on ELF, since MachO
doesn't store the symbol size separately, hence making
said situation always occur.
Tim Northover [Sun, 31 May 2015 19:22:07 +0000 (19:22 +0000)]
ARM: recommit r237590: allow jump tables to be placed as constant islands.
The original version didn't properly account for the base register
being modified before the final jump, so caused miscompilations in
Chromium and LLVM. I've fixed this and tested with an LLVM self-host
(I don't have the means to build & test Chromium).
The general idea remains the same: in pathological cases jump tables
can be too far away from the instructions referencing them (like other
constants) so they need to be movable.
Keno Fischer [Sat, 30 May 2015 19:44:53 +0000 (19:44 +0000)]
Add RelocVisitor support for MachO
This commit adds partial support for MachO relocations to RelocVisitor.
A simple test case is added to show that relocations are indeed being
applied and that using llvm-dwarfdump on MachO files no longer errors.
Correctness is not yet tested, due to an unrelated bug in DebugInfo,
which will be fixed with appropriate testcase in a followup commit.
projects / llvm / log