Darian Leung [Mon, 30 Oct 2017 11:42:16 +0000 (19:42 +0800)]
unit_tests/Update unit test timer divider
This commit updates various test cases throughout esp-idf such that
the values used for timer divider pass the assertions in the timer component.
Timer divider values must be between 2 to 65536
esp32de [Tue, 28 Mar 2017 20:00:58 +0000 (04:00 +0800)]
feat(adc2): append adc2 support and api and the lock with WIFI module
append adc support and api
- esp_err_t adc2_config_width(adc_bits_width_t width_bit);
- esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten);
- int adc2_get_voltage(adc2_channel_t channel);
Kedar Sovani [Wed, 25 Oct 2017 06:42:10 +0000 (12:12 +0530)]
[pthread] Perform init_routine execution outside of the mutex
The mutex is common across all the threads. It needn't be held across
the init_routine() call as long as the 'once' behaviour is guaranteed
Saw a deadlock case, where init_routine of one thread was waiting for
the completion of init_routine in another thread.
t2: wait for command
t1: pthread_once:
lock once_mux
init_routine:
inform thread t2
wait for signal from t2
t2: received command
pthread_once
lock once_mux (already held by t1)
---- Deadlock ----
Wangjialin [Wed, 18 Oct 2017 04:04:59 +0000 (12:04 +0800)]
bugfix(uart): set default tx idle num
Reported from:
https://github.com/espressif/esp-idf/issues/703
https://github.com/espressif/esp-idf/issues/917
In uart driver we didn't change the default value of tx idle num, so there would be a delay after tx FIFO is empty.
1. Add API to set tx idle interval before next data transmission. (The UART hardware can add an interval after tx FIFO is empty).
2. Set default tx idle interval to zero.
3. Add hardware disable in uart driver delete function.
Tian Hao [Fri, 20 Oct 2017 09:09:03 +0000 (17:09 +0800)]
component/bt : fix bug of sw interrupt cause to run btdm to different cpu core.
1. add sw interrupt cause osi to controller.
2. modify the kconfig to improve the option view.
3. add option of the cpu core which bluedroid run.
4. add option of the cpu core which bluetooth controller run.
bugfix(i2c): add I2C hardware reset if the hw FSM get stuck
Reported from different sources from github or bbs:
https://github.com/espressif/esp-idf/issues/680
https://github.com/espressif/esp-idf/issues/922
We tested reading several sensor or other I2C slave devices, if the power and SDA/SCL wires are in proper condition, everything works find with reading the slave.
If we remove the power supply for the slave during I2C is reading, or directly connect SDA or SCL to ground, this would cause the I2C FSM get stuck in wrong state, all we can do is the reset the I2C hardware in this case.
After this commit, no matter whether the power supply of I2C slave is removed or SDA / SCL are shorted to ground, the driver can recover from wrong state.
We are not sure whether this the save issue with the reported one yet, but to make the driver more robust.
Further information:
1. For I2C master mode, we have tested different situations, e.g., to short the SDA/SCL directly to GND/VCC, to short the SDA to SCL, to un-plug the slave device, to power off the slave device. Under all of those situations, this version of driver can recover and keep working.
2. Some slave device will die by accident and keep the SDA in low level, in this case, master should send several clock to make the slave release the bus.
3. Slave mode of ESP32 might also get in wrong state that held the SDA low, in this case, master device could send a stop signal to make esp32 slave release the bus.
Modifications:
1. Disable I2C_MASTER_TRAN_COMP interrupt to void extra interrupt.
2. Disable un-used timeout interrupt for slave.
3. Add bus reset if error detected for master mode.
4. Add bus clear if SDA level is low when error detected.
5. Modify the argument type of i2c_set_pin.
6. add API to set timeout value
7. add parameter check for timing APIs
This commit makes configUSE_TRACE_FACILITY and
configUSE_STATS_FORMATTING_FUNCTIONS configurable in kconfig. Test cases fro the
functions enabled by the two configurations above have also been added.
Test cases for the following functions have been added...
Ivan Grokhotkov [Wed, 18 Oct 2017 04:18:38 +0000 (12:18 +0800)]
soc: correct values of SOC_BYTE_ACCESSIBLE_LOW, SOC_MEM_INTERNAL_LOW
Internal byte accessible memory starts with Internal ROM 1 at 0x3FF90000.
Region of RTC fast memory starting at 0x3FF80000 is not used in IDF as
it is mapped to PRO CPU only.
Angus Gratton [Thu, 19 Oct 2017 07:59:04 +0000 (15:59 +0800)]
heap: Fix race condition causing malloc() to fail under some conditions
During a call to multi_heap_malloc(), if both these conditions were true:
- That heap only has one block large enough for the allocation
(this is always the case if the heap is unfragmented).
- Another allocation is simultaneously occurring in the same heap.
... multi_heap_malloc() could incorrectly return NULL.
This caused IDF heap_caps_malloc() and malloc() to also fail, particularly
often if only one or two heaps had space for the allocation (otherwise
heap_caps_malloc() fails over to the next heap).
Angus Gratton [Wed, 18 Oct 2017 06:54:55 +0000 (14:54 +0800)]
heap: Fix spurious heap_caps_check_integrity() errors in Comprehensive mode
Heap was not being locked before poisoning, so heap_caps_check_integrity()
would sometimes race with checking the poison bytes and print unnecessary
errors.
Deng Xin [Tue, 17 Oct 2017 06:57:45 +0000 (14:57 +0800)]
esp32: fix some wifi bugs
1. Fix WiFi timer enable twice issue
2. Fix a softAP compatibility issue
3. Fix ebuf alloc counter issue
4. remove nvs_flash_init() in esp_wifi_init()
5. Fix scan only find few APs after set bssid
6. Fix can not connect to hidden SoftAP
7. Remove group key entry before connecting ot AP
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