Peter Johnson [Fri, 11 Apr 2008 01:37:46 +0000 (01:37 -0000)]
Move BITS==64 condition out of the CPU field (where it really doesn't belong)
and into a new misc_flags field. This doesn't take any more space,
simplifies the code, and allows adding additional conditions like this in
the future.
Found and fixed a bug in CPU field generation (not copying a set variable
in gen_x86_insn.py).
Peter Johnson [Fri, 4 Apr 2008 02:10:24 +0000 (02:10 -0000)]
PCOMUcc should have been PCOMccU.
Fix up condition code naming and add aliases to match SSE5 added to GNU
binutils as follows:
COMcc:
- swapped uneq, unlt, and unle with neq, nlt, and nle
- added unge, ungt, ne, uge, ugt, nge, ngt, une, ge, and gt aliases
PCOMcc:
- added ne alias (for neq)
Peter Johnson [Thu, 27 Mar 2008 05:35:36 +0000 (05:35 -0000)]
Fix #136: Unbreak ..@ non-local-label mechanism.
Add testcase for this.
Also fix $-prefixed labels to match non-$-prefixed label behavior
(this has been broken for a very long time).
Peter Johnson [Fri, 15 Feb 2008 06:06:57 +0000 (06:06 -0000)]
Pass size directly to yasm_value_finalize_expr() rather than setting
afterwards. This fixes the value full-mask case for immediate operands:
e.g. "mov ax, word (label & 0xffff)".
Peter Johnson [Sat, 9 Feb 2008 03:35:07 +0000 (03:35 -0000)]
Enable use of sym@FOO constructs in GAS parser.
To do this, restructure how special symbols are handled between the parser
and object format. Instead of creating special symbols with the right
names, instead have the parser call the object format to see if a match
is found into the special symbols, which are no longer stored in the
symbol table.
Peter Johnson [Fri, 8 Feb 2008 18:59:46 +0000 (18:59 -0000)]
Support masking of relocatable values with an AND of the full value width to
avoid warnings. This is primarily useful in bin object format output.
db label ; if label is >255, warns.
db label & 0xff ; okay, no warning.
Masks other than full-sized 1s are still not supported:
db label & 0x7f ; too complex error
Peter Johnson [Fri, 8 Feb 2008 18:26:40 +0000 (18:26 -0000)]
Fix #130: Add SAFESEH directive for indicating SEH handlers in win32 output.
Unlike in MASM, no command-line switch is required.
Usage:
extern handler (or handler: to define locally)
safeseh handler
Peter Johnson [Sat, 2 Feb 2008 19:23:17 +0000 (19:23 -0000)]
Revert r2029. According to both AMD64 and Intel 64 instruction set
references, REX + 90h opcode is not NOP, but a valid XCHG:
"The x86 architecture commonly uses the XCHG EAX, EAX instruction (opcode
90h) as a one-byte NOP. In 64-bit mode, the processor treats opcode 90h as
a true NOP only if it would exchange rAX with itself. Without this special
handling, the instruction would zero-extend the upper 32 bits of RAX, and
thus it would not be a true nooperation. Opcode 90h can still be used to
exchange rAX and r8 if the appropriate REX prefix is used."
Peter Johnson [Sat, 19 Jan 2008 08:59:19 +0000 (08:59 -0000)]
Make jmp with seg:off equ behave the same as NASM.
Formerly:
foo equ 1:2
jmp foo
would result in a far jump. Now, an explicit "far" is required:
jmp far foo
to generate a far jump.
In addition, the direct use of seg:off in immediates and effective
addresses will result in an error; the use of EQU'ed seg:off values
is still legal (and will still result in just the offset). This
behavior is more sane and also matches NASM behavior.
Thus:
foo equ 1:2
mov ax, foo ; okay, just 2
mov ax, [foo] ; okay, just 2
mov ax, 1:2 ; illegal
mov ax, [1:2] ; illegal
Peter Johnson [Tue, 4 Dec 2007 06:55:11 +0000 (06:55 -0000)]
Fix #125: Improve reporting of operand and expression syntax errors.
Now instead of the generic "expression syntax error", more informative
error messages such as the following are reported:
- unexpected `:' after instruction
- expected expression after `%'
- expected operand, got `%'
Peter Johnson [Wed, 28 Nov 2007 07:21:08 +0000 (07:21 -0000)]
Fix #119. Quite a few SSE/SSE2 instructions assumed 128-bit memory sizes
instead of the correct 64-bit or 32-bit sizes (e.g. xmm/m64 or similar).
It worked fine when no memory size was specified, but it should also work
with the correct size modifier.
Peter Johnson [Wed, 14 Nov 2007 08:33:32 +0000 (08:33 -0000)]
Add NASM-compatible multi-section binary support to bin object format.
This allows for arbitrary load (LMA) and execution (VMA) addresses.
The following new section attributes are supported:
- start (LMA start address)
- follows (follow another section's last LMA)
- align (LMA alignment)
- vstart (VMA start address)
- vfollows (follow another section's last VMA)
- valign (VMA alignment)
In addition, sections can be designed progbits or nobits.
The following special symbols are generated for program use:
- section.<sectname>.start (LMA start address)
- section.<sectname>.vstart (VMA start address)
- section.<sectname>.length (section length)
The ORG directive adjusts the file offset relative to LMA, so that if
ORG=0x100, a section with LMA=0x100 will be at file offset 0.
VMA addresses are the same as LMA addresses unless otherwise specified.
Full map file support is supported via the [MAP] directive. The map output
filename can be set either as a parameter to the [MAP] directive or on the
command line with --mapfile=<filename>. MAP options are BRIEF, SECTIONS,
SEGMENTS, SYMBOLS, and ALL (all of the above). If no filename is specified
either on the command line or in the source file, the map is output to
standard output.
Full documentation will be added to the Yasm manual in the near future.
This implementation supports several configurations NASM does not, for
instance http://osdir.com/ml/lang.nasm.devel/2004-12/msg00032.html .
It is also fully 64-bit aware.
Peter Johnson [Sat, 3 Nov 2007 04:37:44 +0000 (04:37 -0000)]
Support use of EQU values within NASM preprocessor.
Note: label values are still not supported, and probably never will be,
as yasm is single-pass parsing, and only reads the source file once.
Someday we may add specific support for relatively common %if-%error
idioms.
Peter Johnson [Sat, 3 Nov 2007 04:27:35 +0000 (04:27 -0000)]
Change preprocessor interface from block-oriented to line-oriented.
This will make certain types of parser-preprocessor synchronization
easier for upcoming feature enhancements.
Due to additional complexity in GAS (rept), internally GAS converts
lines back into blocks.
Peter Johnson [Tue, 16 Oct 2007 07:40:21 +0000 (07:40 -0000)]
Fix #118: Don't use getcwd(NULL, 0), as it's platform-specific behavior.
Instead write our own yasm__getcwd() which retries getcwd() with
increasing buffer sizes until the path fits (as the initial size is 1024,
in basically all cases it'll succeed on the first try).
Peter Johnson [Thu, 20 Sep 2007 05:15:29 +0000 (05:15 -0000)]
Follow NASM after all in only turning off default RIP-rel for FS and GS,
not all segment registers. FS and GS are the only ones which can have
a segment base != 0.
Peter Johnson [Wed, 19 Sep 2007 07:47:10 +0000 (07:47 -0000)]
Support NASM's upcoming RIP-relative syntax, with a few differences.
This adds a "default" directive that takes either "rel" or "abs". This
sets whether the default mode for simple displacements is RIP-relative (rel)
or not (abs). The default without a directive is "abs".
Also added is corresponding "rel" and "abs" effective address modifiers
to override whatever default is set:
[rel label] is RIP-relative
[abs label] is not.
In default rel mode, [label] defaults to the former, in default abs mode,
the latter. Also, segment overrides (note difference from NASM below) are
abs regardless of mode, unless explicitly overridden with rel:
[fs:label] is always abs
[rel fs:label] is always rel
However, we have a number of differences from NASM in this handling due to
what I feel to be yasm's more sane handling of [dword ...] and [qword ...].
In yasm, these set the displacement size, rather than the address size; the
latter is set using a a32/a64 prefix. I feel this is more sane as in 64-bit
mode the two can be different in the MovOffs (A0/A1 mov *ax) case.
Also, yasm disables default-rel mode if any segment register is used, not
just FS or GS as NASM currently does.
See modules/arch/x86/tests/riprel1.asm and
modules/arch/x86/tests/riprel2.asm for examples, as well as my recent
posting to the nasm-devel mailing list on SF.
Peter Johnson [Mon, 17 Sep 2007 02:58:05 +0000 (02:58 -0000)]
Make CPU feature flags and registers case insensitive again.
This was accidentally removed in [1929].
Add test case for these so it doesn't happen again.
Peter Johnson [Sun, 16 Sep 2007 20:41:16 +0000 (20:41 -0000)]
Add support for IEEE-754r "half precision" (16-bit) float format.
This format is used by SSE5.
Update minor tests; more extensive tests will be added soon.
Peter Johnson [Thu, 13 Sep 2007 06:35:24 +0000 (06:35 -0000)]
Change modifiers from a prioritized shifted sequence into an ordered array.
Move GAS suffixes to a separate field in x86_insn_info rather than
having them embedded in the modifier field.
Peter Johnson [Wed, 12 Sep 2007 04:15:33 +0000 (04:15 -0000)]
Run gen_x86_insn.py from vc and vc8 builds.
Users who build out of SVN will need to install Python, but this is painless even for
Windows users
(go to http://www.python.org/download/ and download and install the appropriate MSI)
Delete generated files from SVN; these are massive and annoying to keep updated
(massive diffs).
Peter Johnson [Tue, 11 Sep 2007 04:49:53 +0000 (04:49 -0000)]
Shrink the size of the x86_insn_info structure, particularly on 64-bit
systems, by combining operand lists into a single array (and trying to find
overlaps where possible). This saves about 4K even on a 32-bit system.
Also shrink the generated gperf code by outputting the number of info
structures directly rather than using NELEMS().
Peter Johnson [Mon, 10 Sep 2007 07:15:50 +0000 (07:15 -0000)]
Change genperf to take input and output filenames rather than outputting to
standard output. This makes for better error handling behavior with make
(redirecting the standard output could leave empty files behind on error).
Peter Johnson [Mon, 10 Sep 2007 07:03:53 +0000 (07:03 -0000)]
Check in generated files from the Python script added in [1937].
While I prefer not to have generated files in the source repository,
do this for now in the interest of sanity on the Windows side (to allow
building directly from a SVN checkout).
An alternative might be to require Python on Windows when building from
SVN. If at some point we decide to go that route, it will be easy enough
to remove these files and add the necessary bits to Mkfiles/vc and
Mkfiles/vc8.
Peter Johnson [Mon, 10 Sep 2007 06:59:47 +0000 (06:59 -0000)]
Change x86 instruction tables to be automatically generated.
This combines the C and perfect hash tables into a single source file,
and allows for easier future changes to the source-level structures.
The Python-built files are included in the distribution so that Python
is not added as a dependency.
The generated code has been verified equal against the old tables,
excepting a number of bugfixes.
Most of the bugs fixed are in the CPU field, plus a few GAS suffix fixes.
Peter Johnson [Sat, 8 Sep 2007 02:13:25 +0000 (02:13 -0000)]
Windows build fixes:
* modules.vcproj: Add x86cpu.c, x86regtmod.c, and lc3b arch files to fix build.
* x85geninsn.c: Clean up a couple of unused variables.
* genperf.c: Use sprintf instead of snprintf; convert filename backslashes to slashes.
projects / yasm / log