Sanjay Patel [Fri, 16 Aug 2019 23:10:34 +0000 (23:10 +0000)]
[CodeGenPrepare] Fix use-after-free
If OptimizeExtractBits() encountered a shift instruction with no operands at all,
it would erase the instruction, but still return false.
This previously didn’t matter because its caller would always return after
processing the instruction, but https://reviews.llvm.org/D63233 changed the
function’s caller to fall through if it returned false, which would then cause
a use-after-free detectable by ASAN.
This change makes OptimizeExtractBits return true if it removes a shift
instruction with no users, terminating processing of the instruction.
Eli Friedman [Fri, 16 Aug 2019 22:20:14 +0000 (22:20 +0000)]
[ARM] Preserve liveness in ARMConstantIslands.
We currently don't use liveness information after this point, but it can
be useful to catch bugs using -verify-machineinstrs, and optimizations
could potentially use this information in the future.
[Attributor] Fix: Do not partially resolve returned calls.
By partially resolving returned calls we did not record that they were
not fully resolved which caused odd behavior down the line. We could
also end up with some, but not all, returned values of the callee in the
returned values map of the caller, another odd behavior we want to
avoid.
[CaptureTracking] Allow null to be in either icmp operand
Summary:
Before we required the comparison against null to be "canonical", hence
null to be operand #1. This patch allows null to be in either operand,
similar to the handling of loaded globals that follows.
[Attributor] Add all missing attribute definitions/symbols
As a preparation to "on-demand" abstract attribute generation we need
implementations for all attributes (as they can be queried and then
created on-demand where we now fail to find one).
[Attributor] Towards a more structured deduction pattern
Summary:
This is the first commit aiming to structure the attribute deduction.
The base idea is that we have default propagation patterns as listed
below on top of which we can add specific, e.g., context sensitive,
logic.
Deduction patterns used in this patch:
- argument states are determined from call site argument states,
see AAAlignArgument and AAArgumentFromCallSiteArguments.
- call site argument states are determined as if they were floating
values, see AAAlignCallSiteArgument and AAAlignFloating.
- floating value states are determined by traversing the def-use chain
and combining the states determined for the leaves, see
AAAlignFloating and genericValueTraversal.
- call site return states are determined from function return states,
see AAAlignCallSiteReturned and AACallSiteReturnedFromReturned.
- function return states are determined from returned value states,
see AAAlignReturned and AAReturnedFromReturnedValues.
Through this strategy all logic for alignment is concentrated in the
AAAlignFloating::updateImpl method.
Note: This commit works on its own but is part of a larger change that
involves "on-demand" creation of abstract attributes that will
participate in the fixpoint iteration. Without this part, we sometimes
do not have an AAAlign abstract attribute to query, loosing information
we determined before. All tests have appropriate FIXMEs and the
information will be recovered once we added all parts.
[Attributor][NFC] Introduce aliases for call site attributes
Until we have call site specific liveness and/or value information there
is no need to do call site specific deduction. Though, we need the
symbols in follow up patches that make Attributor::getAAFor return a
reference.
[Attributor] Introduce initialize calls and move code to keep attributes concise
Summary:
This patch should not change the behavior except that the added
initialize methods might indicate an optimistic fixpoint earlier. The
code movement is done to keep the attribute definitions in a single
block where it makes sense. No functional changes intended there.
Sanjay Patel [Fri, 16 Aug 2019 18:51:30 +0000 (18:51 +0000)]
[InstCombine] canonicalize a scalar-select-of-vectors to vector select
This pattern may arise more frequently with an enhancement to SLP vectorization suggested in PR42755:
https://bugs.llvm.org/show_bug.cgi?id=42755
...but we should handle this pattern to make things easier for the backend either way.
For all in-tree targets that I looked at, codegen for typical vector sizes looks better when we change
to a vector select, so this is safe to do without a cost model (in other words, as a target-independent
canonicalization).
For example, if the condition of the select is a scalar, we end up with something like this on x86:
Guanzhong Chen [Fri, 16 Aug 2019 18:21:08 +0000 (18:21 +0000)]
[WebAssembly] Forbid use of EM_ASM with setjmp/longjmp
Summary:
We tried to support EM_ASM with setjmp/longjmp in binaryen. But with dynamic
linking thrown into the mix, the code is no longer understandable and cannot
be maintained. We also discovered more bugs in the EM_ASM handling code.
To ensure maintainability and correctness of the binaryen code, EM_ASM will
no longer be supported with setjmp/longjmp. This is probably fine since the
support was added recently and haven't be published.
Amara Emerson [Fri, 16 Aug 2019 18:06:53 +0000 (18:06 +0000)]
[AArch64][GlobalISel] Lower G_SHUFFLE_VECTOR with 1 elt src and 1 elt mask.
Again, it's weird that these are allowed. Since lowering support was added in
r368709 we started crashing on compiling the neon intrinsics test in the test
suite. This fixes the lowering to fold the 1 elt src/mask case into copies.
Eventually we need to generalize combineExtractWithShuffle to handle all faux shuffles and handle truncate (and X86ISD::VTRUNC etc.) there, but we're not ready yet (still creates nodes on the fly, incomplete DemandedElts support, bad use of recursive Depth limit).
Paul Walker [Fri, 16 Aug 2019 17:29:53 +0000 (17:29 +0000)]
[AArch64InstrInfo] Stop getInstSizeInBytes returning non-zero for meta instructions.
Recommit with fixes for mac builders.
Summary:
AArch64InstrInfo::getInstSizeInBytes is incorrectly treating meta
instructions (e.g. CFI_INSTRUCTION) as normal instructions and
giving them a size of 4.
This results in branch relaxation calculating block sizes wrong.
Branch relaxation also considers alignment and thus a single
mistake can result in later blocks being incorrectly sized even
when they themselves do not contain meta instructions.
The net result is we might not relax a branch whose destination is
not within range.
[SLPVectorizer] Make the scheduler aware of the TreeEntry operands.
Summary:
The scheduler's dependence graph gets the use-def dependencies by accessing the operands of the instructions in a bundle. However, buildTree_rec() may change the order of the operands in TreeEntry, and the scheduler is currently not aware of this. This is not causing any functional issues currently, because reordering is restricted to the operands of a single instruction. Once we support operand reordering across multiple TreeEntries, as shown here: http://www.llvm.org/devmtg/2019-04/slides/Poster-Porpodas-Supernode_SLP.pdf , the scheduler will need to get the correct operands from TreeEntry and not from the individual instructions.
In short, this patch:
- Connects the scheduler's bundle with the corresponding TreeEntry. It introduces new TE and Lane fields in ScheduleData.
- Moves the location where the operands of the TreeEntry are initialized. This used to take place in newTreeEntry() setting one operand at a time, but is now moved pre-order just before the recursion of buildTree_rec(). This is required because the scheduler needs to access both operands of the TreeEntry in tryScheduleBundle().
- Updates the scheduler to access the instruction operands through the TreeEntry operands instead of accessing the instruction operands directly.
All uses of llvm::make_unique should have been replaced with
std::make_unique. This patch represents the last part of the migration
and removes the utility from LLVM.
Jordan Rose [Fri, 16 Aug 2019 17:17:45 +0000 (17:17 +0000)]
Fix llvm-config support for CMake build-mode-style builds
At some point we and/or CMake changed our build-mode-style builds from
$LLVM_OBJ_ROOT/bin/$CMAKE_CFG_INTDIR/
to
$LLVM_OBJ_ROOT/$CMAKE_CFG_INTDIR/bin/
which is way easier to use. But no one updated llvm-config.
Guozhi Wei [Fri, 16 Aug 2019 16:26:12 +0000 (16:26 +0000)]
[CodeGen/Analysis] Intrinsic llvm.assume should not block tail call optimization
In function Analysis.cpp:isInTailCallPosition, instructions between call and ret are checked to see if they block tail call optimization. If an instruction is an intrinsic call, only llvm.lifetime_end is allowed and other intrinsic functions block tail call. When compiling tcmalloc, we found llvm.assume between a hot function call and ret, it blocks the optimization. But llvm.assume doesn't generate instructions, it should not block tail call.
Cyndy Ishida [Fri, 16 Aug 2019 15:30:48 +0000 (15:30 +0000)]
[TextAPI] Update reader to be supported by lib/Object
Summary:
To be able to use the TextAPI/Reader for tbd file consumption (by libObject)
it gets passed a MemoryBufferRef which isn't castable to MemoryBuffer.
Updated the tests to expect that input as well.
Roman Lebedev [Fri, 16 Aug 2019 15:10:41 +0000 (15:10 +0000)]
[InstCombine] Shift amount reassociation in bittest: trunc-of-shl (PR42399)
Summary:
This is continuation of D63829 / https://bugs.llvm.org/show_bug.cgi?id=42399
I thought naive pattern would solve my issue, but nope, it involved truncation,
thus more folds needed.. This isn't really the fold i'm interested in,
i need trunc-of-lshr, but i'we decided to start with `shl` because it's simpler.
In this case, no extra legality checks are needed:
https://rise4fun.com/Alive/CAb
We should be careful about not increasing instruction count,
since we need to produce `zext` because `and` is done in wider type.
Paul Walker [Fri, 16 Aug 2019 14:17:52 +0000 (14:17 +0000)]
[AArch64InstrInfo] Stop getInstSizeInBytes returning non-zero for meta instructions.
Summary:
AArch64InstrInfo::getInstSizeInBytes is incorrectly treating meta
instructions (e.g. CFI_INSTRUCTION) as normal instructions and
giving them a size of 4.
This results in branch relaxation calculating block sizes wrong.
Branch relaxation also considers alignment and thus a single
mistake can result in later blocks being incorrectly sized even
when they themselves do not contain meta instructions.
The net result is we might not relax a branch whose destination is
not within range.
David Green [Fri, 16 Aug 2019 13:42:39 +0000 (13:42 +0000)]
[ARM] Correct register for narrowing and widening MVE loads and stores.
The widening and narrowing MVE instructions like VLDRH.32 are only permitted to
use low tGPR registers. This means that if they are used for a stack slot,
where the register used is only decided during frame setup, we need to be able
to correctly pick a thumb1 register over a normal GPR.
This attempts to add the required logic into eliminateFrameIndex and
rewriteT2FrameIndex, only picking the FrameReg if it is a valid register for
the operands register class, and picking a valid scratch register for the
register class.
It looks like this commit adds invalid predecessors to MBBs. The example
below fails the verifier after MachineBlockPlacement (run llc
-verify-machineinstrs):
Bjorn Pettersson [Fri, 16 Aug 2019 13:16:48 +0000 (13:16 +0000)]
[DAGCombiner] Add simple folds for SMULFIX/UMULFIX/SMULFIXSAT
Summary:
Add the following DAGCombiner folds for mulfix being
one of SMULFIX/UMULFIX/SMULFIXSAT:
(mulfix x, undef, scale) -> 0
(mulfix x, 0, scale) -> 0
Bjorn Pettersson [Fri, 16 Aug 2019 13:16:38 +0000 (13:16 +0000)]
[X86] Add test case for future MULFIX DAG combine folds. NFC
Add some test cases displaying the lack of DAG combine
folds for SMULFIX/UMULFIX/SMULFIXSAT when either
multiplicand is undef or zero.
It seems like widening vector legalization for X86 can
introduce fixed point multiplication of undef values.
So that is one way that such operations could appear
during ISel.
Multiplication with zero is probably more unlikely, and
could potentially be handled by InstCombine. But I do
not think it would hurt to do such folds in DAGCombiner.
This patch only adds the test case. The folds will be
added in a follow up patch.
David Green [Fri, 16 Aug 2019 13:06:49 +0000 (13:06 +0000)]
[ARM] Don't pretend we know how to generate MVE VLDn
We don't yet know how to generate these instructions for MVE. And in the case
of VLD3, we don't even have the instruction. For the moment don't tell the
vectoriser that we have VLD4, just to end up serialising the results.
cppcheck + MSVC analyzer both over zealously warn that we might dereference a null Bundle pointer - add an assertion to check for null to silence the warning, plus its a good idea to check that we succeeded in finding a schedule bundle anyway....
Jeremy Morse [Fri, 16 Aug 2019 10:04:17 +0000 (10:04 +0000)]
[DebugInfo] Handle complex expressions with spills in LiveDebugValues
In r369026 we disabled spill-recognition in LiveDebugValues for anything
that has a complex expression. This is because it's hard to recover the
complex expression once the spill location is baked into it.
This patch re-enables spill-recognition and slightly adjusts the DBG_VALUE
insts that LiveDebugValues tracks: instead of tracking the last DBG_VALUE
for a variable, it tracks the last _unspilt_ DBG_VALUE. The spill-restore
code is then able to access and copy the original complex expression; but
the rest of LiveDebugValues has to be aware of the slight semantic shift,
and produce a new spilt location if a spilt location is propagated between
blocks.
The test added produces an incorrect variable location (see FIXME), which
will be the subject of future work.
Tim Northover [Fri, 16 Aug 2019 09:34:27 +0000 (09:34 +0000)]
AssumptionCache: remove old affected values after RAUW.
If they're left in the cache then they can't be removed efficiently when the
cache is notified to unlink a @llvm.assume call, and that can lead to values
from different functions entirely remaining there.
In r368879 I made an attempt to guess the path style from the files in
the line table. After some consideration I now think this is a poor
idea. This patch undoes that behavior and instead adds an optional
argument to specify the path style. This allows us to make that decision
elsewhere where we have more information. In case of LLDB based on the
Unit.
Volkan Keles [Thu, 15 Aug 2019 23:45:45 +0000 (23:45 +0000)]
[GlobalISel] CSEMIRBuilder: Add support for G_GEP
Summary:
This patch adds G_GEP to `shouldCSEOpc` so that it can be CSEd. It also refactors
`translateGetElementPtr` by replacing `createGenericVirtualRegister` calls with types.
Eli Friedman [Thu, 15 Aug 2019 23:35:53 +0000 (23:35 +0000)]
[ARM][LowOverheadLoops] Fix generated code for "revert".
Two issues:
1. t2CMPri shouldn't use CPSR if it isn't predicated. This doesn't
really have any visible effect at the moment, but it might matter in the
future.
2. The t2CMPri generated for t2WhileLoopStart might need to use a
register that isn't LR.
My team found this because we have a patch to track register liveness
late in the pass pipeline. I'll look into upstreaming it to help catch
issues like this earlier.
David L. Jones [Thu, 15 Aug 2019 23:24:14 +0000 (23:24 +0000)]
[NewPM][PassInstrumentation] Fix test added in r369024.
llvm-lto2 doesn't treat "-" as stdout, so the test added in r369024 creates a
file named "-.0". This patch makes the test look more like other tests that use
llvm-lto2.
[Support] Re-introduce the RWMutexImpl for macOS < 10.12
In r369018, Benjamin replaced the custom RWMutex implementation with
their C++14 counterpart. Unfortunately, std::shared_timed_mutex is only
available on macOS 10.12 and later. This prevents LLVM from compiling
even on newer versions of the OS when you have an older deployment
target. This patch reintroduced the old RWMutexImpl but guards it by the
macOS availability macro.
[Bugpoint redesign] Added Pass to Remove Global Variables
Summary:
This pass tries to remove Global Variables, as well as their derived uses. For example if a variable `@x` is used by `%call1` and `%call2`, both these uses and the definition of `@x` are deleted. Moreover if `%call1` or `%call2` are used elsewhere those uses are also deleted, and so on recursively.
I'm still uncertain if this pass should remove derived uses, I'm open to suggestions.
[Bugpoint redesign] Output option can now print to STDOUT
Summary:
This also changes all the outs() statements to errs() so the output and
progress streams don't get mixed.
This has been added because D64176 had flaky tests, which I believe were because the reduced file was being catted into `FileCheck`, instead of being pass from STDOUT directly.
Hubert Tong [Thu, 15 Aug 2019 22:23:53 +0000 (22:23 +0000)]
[AIX] For XL, pick GCC-compatible std & default warning options
Summary:
LLVM now requires C++14. For IBM XL compilers with C++14 support, this
can be done with the GCC-style options. The relevant block in the CMake
file is split up into smaller parts as part of this patch to allow the
common cases to be shared.
[Support] Re-introduce the RWMutexImpl for macOS < 10.12
In r369018, Benjamin replaced the custom RWMutex implementation with
their C++14 counterpart. Unfortunately, std::shared_timed_mutex is only
available on macOS 10.12 and later. This prevents LLVM from compiling
even on newer versions of the OS when you have an older deployment
target. This patch reintroduced the old RWMutexImpl but guards it by the
macOS availability macro.
Alina Sbirlea [Thu, 15 Aug 2019 21:20:08 +0000 (21:20 +0000)]
[MemorySSA] Remove restrictive asserts.
The verification I added has overly restrictive asserts.
Unreachable blocks can have any incoming value in practice, after an
update due to a "replaceAllUses" call when the repalced entry is
LiveOnEntry.
JF Bastien [Thu, 15 Aug 2019 20:38:42 +0000 (20:38 +0000)]
Fix nm on GCC 5.1 after the C++14 move
Summary:
As in D66306, fix the invocation of std::sort with std::function by not using
std::function, since it's easier to read and is broken in libstdc++ from GCC 5.1
(see https://gcc.gnu.org/PR65942).
Daniel Sanders [Thu, 15 Aug 2019 19:22:08 +0000 (19:22 +0000)]
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
Summary:
This clang-tidy check is looking for unsigned integer variables whose initializer
starts with an implicit cast from llvm::Register and changes the type of the
variable to llvm::Register (dropping the llvm:: where possible).
Partial reverts in:
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
X86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegister
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
HexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned&
MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const Register
PPCFastISel.cpp - No Register::operator-=()
PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned&
MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructor
Manual fixups in:
ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned&
HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/Register
HexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register.
PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned&
Revert [Bugpoint redesign] Added Pass to Remove Global Variables
This reverts r368918 because it was unstable!
It broke these builds:
* http://lab.llvm.org:8011/builders/lld-x86_64-ubuntu-fast/builds/4649
* http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/builds/29966
* http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/builds/29964
But surprisingly this passed:
* http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/builds/29965
Matt Arsenault [Thu, 15 Aug 2019 18:58:25 +0000 (18:58 +0000)]
MVT: Add v3i16/v3f16 vectors
AMDGPU has some buffer intrinsics which theoretically could use
this. Some of the generated tables include the 3 and 4 element vector
versions of these rounded to 64-bits, which is ambiguous. Add these to
help the table disambiguate these.
Assertion change is for the path odd sized vectors now take for R600.
v3i16 is widened to v4i16, which then needs to be promoted to v4i32.
Jeremy Morse [Thu, 15 Aug 2019 17:49:46 +0000 (17:49 +0000)]
[DebugInfo] Avoid crash from dropped fragments in LiveDebugValues
This patch avoids a crash caused by DW_OP_LLVM_fragments being dropped
from DIExpressions by LiveDebugValues spill-restore code. The appearance
of a previously unseen fragment configuration confuses LDV, as documented
in PR42773, and reproduced by the test function this patch adds (Crashes
on a x86_64 debug build).
To avoid this, on spill restore, we now use fragment information from the
spilt-location-expression.
In addition, when spilling, we now don't spill any DBG_VALUE with a complex
expression, as it can't be safely restored and will definitely lead to an
incorrect variable location. The discussion of this is in D65368.
Mark Lacey [Thu, 15 Aug 2019 17:47:53 +0000 (17:47 +0000)]
[CallGraph] Refine call graph for indirect calls with !callees metadata
For indirect call sites having a small set of possible callees,
!callees metadata can be used to indicate what those callees are.
This patch updates the call graph and lazy call graph analyses so
that they consider this metadata when encountering call sites. For
the call graph, it adds a new external call graph node to the graph
for each unique !callees metadata node. A call graph edge connects
an indirect call site with the external node associated with the
!callees metadata that is attached to it. And there is an edge from
this external node to each of the callees indicated by the metadata.
Similarly, for the lazy call graph, the patch adds Ref edges from a
caller to the possible callees indicated by the metadata.
The primary purpose of the patch is to facilitate iterating over the
functions in a module such that all of the callees indicated by a
given !callees metadata node will be visited prior to the functions
containing call sites annotated by that node. This property is
required by optimizations performing a bottom-up traversal of the
SCC DAG. For example, the inliner can be made to inline through an
indirect call. If the call site is annotated with !callees metadata,
this patch ensures that the inliner will have visited all of the
callees prior to the caller, allowing it to reliably compute the
cost of inlining one or more of the potential callees.
Original patch by @mssimpso. I've made some small changes to get it
to apply, build, and pass tests on the top of tree, as well as
some minor tweaks to formatting and functionality.
Taewook Oh [Thu, 15 Aug 2019 17:47:44 +0000 (17:47 +0000)]
[NewPM][PassInstrumentation] IR printing support for (Thin)LTO
Summary: IR printing has not been correctly supported with (Thin)LTO if the new pass manager is enabled. Previously we only get outputs from backend(codegen) passes, as they are still under legacy pass manager even when the new pass manager is enabled. This patch addresses the issue and enables IR printing for optimization passes with new pass manager + (Thin)LTO setting.
projects / llvm / log