]> granicus.if.org Git - llvm/log
llvm
7 years ago[APInt] In slt/sgt(uint64_t), only call getMinSignedBits if the APInt is not a single...
Craig Topper [Thu, 20 Apr 2017 06:04:03 +0000 (06:04 +0000)]
[APInt] In slt/sgt(uint64_t), only call getMinSignedBits if the APInt is not a single word.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300824 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Call the slow case counting methods directly in isMask/isShiftedMask. We...
Craig Topper [Thu, 20 Apr 2017 06:04:01 +0000 (06:04 +0000)]
[APInt] Call the slow case counting methods directly in isMask/isShiftedMask. We already handled the single word case. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300823 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SelectionDAG] Fix another place that was passing a large value to APInt::lshrInPlace.
Craig Topper [Thu, 20 Apr 2017 04:55:01 +0000 (04:55 +0000)]
[SelectionDAG] Fix another place that was passing a large value to APInt::lshrInPlace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300821 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SelectionDAG] Use getActiveBits() and countTrailingZeros() to avoid creating tempora...
Craig Topper [Thu, 20 Apr 2017 04:23:43 +0000 (04:23 +0000)]
[SelectionDAG] Use getActiveBits() and countTrailingZeros() to avoid creating temporary APInts with lshr and trunc. NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300819 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRecommit "[APInt] Add back the asserts that check that the APInt shift methods aren...
Craig Topper [Thu, 20 Apr 2017 03:49:18 +0000 (03:49 +0000)]
Recommit "[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth."

This includes a fix to clamp a right shift of larger than BitWidth in DAG combining.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300816 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r300811 "[APInt] Add back the asserts that check that the APInt shift methods...
Craig Topper [Thu, 20 Apr 2017 02:46:21 +0000 (02:46 +0000)]
Revert r300811 "[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth."

This is failing a self host debug build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300813 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Implement APInt::intersects without creating a temporary APInt in the multiwo...
Craig Topper [Thu, 20 Apr 2017 02:11:27 +0000 (02:11 +0000)]
[APInt] Implement APInt::intersects without creating a temporary APInt in the multiword case

Summary: This is a simple question we should be able to answer without creating a temporary to hold the AND result. We can also get an early out as soon as we find a word that intersects.

Reviewers: RKSimon, hans, spatel, davide

Reviewed By: hans, davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32253

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300812 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Add back the asserts that check that the APInt shift methods aren't called...
Craig Topper [Thu, 20 Apr 2017 02:03:09 +0000 (02:03 +0000)]
[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth.

The underlying tcShiftRight/tcShiftLeft functions support the larger bit widths but the APInt interface shouldn't rely on that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300811 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDo not run frame verification if target does not use frame instructions
Serge Pavlov [Thu, 20 Apr 2017 01:34:04 +0000 (01:34 +0000)]
Do not run frame verification if target does not use frame instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300807 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[libFuzzer] XFAIL fuzzer-oom.test on Darwin."
Ahmed Bougacha [Thu, 20 Apr 2017 00:16:13 +0000 (00:16 +0000)]
Revert "[libFuzzer] XFAIL fuzzer-oom.test on Darwin."

This reverts commit r300127.

r300759 implemented StopTheWorld for Darwin, so the test passes again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300801 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] extend help for -minimize_crash to cover ASAN_OPTIONS=dedup_token_length=3
Kostya Serebryany [Wed, 19 Apr 2017 23:58:05 +0000 (23:58 +0000)]
[libFuzzer] extend help for -minimize_crash to cover ASAN_OPTIONS=dedup_token_length=3

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300800 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Implement operator==(uint64_t) similar to ugt/ult(uint64_t) to remove one...
Craig Topper [Wed, 19 Apr 2017 23:57:51 +0000 (23:57 +0000)]
[APInt] Implement operator==(uint64_t) similar to ugt/ult(uint64_t) to remove one of the out of line EqualsSlowCase methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300799 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Don't call getActiveBits() in ult/ugt(uint64_t) if its a single word.
Craig Topper [Wed, 19 Apr 2017 23:55:48 +0000 (23:55 +0000)]
[APInt] Don't call getActiveBits() in ult/ugt(uint64_t) if its a single word.

The compiled code already needs to check single/multi word for the countLeadingZeros call inside of getActiveBits, but it isn't able to optimize out the leadingZeros call in the single word case that can't produce a value larger than 64.

This shrank the opt binary by about 5-6k on my local x86-64 build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300798 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoStatepoint Docs: fix incorrect uses of it's
Sanjoy Das [Wed, 19 Apr 2017 23:55:03 +0000 (23:55 +0000)]
Statepoint Docs: fix incorrect uses of it's

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300797 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Use ugt(uint64_t) for the compare in getLimitedValue(uint64_t) since the...
Craig Topper [Wed, 19 Apr 2017 23:52:59 +0000 (23:52 +0000)]
[APInt] Use ugt(uint64_t) for the compare in getLimitedValue(uint64_t) since the code is identical to it. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300796 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAE] Simplify attribute list creation, NFC
Reid Kleckner [Wed, 19 Apr 2017 23:45:45 +0000 (23:45 +0000)]
[DAE] Simplify attribute list creation, NFC

Removes a use of getSlotAttributes, which I intend to change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300795 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r300789: There are Windows bot failures.
Kuba Mracek [Wed, 19 Apr 2017 23:44:33 +0000 (23:44 +0000)]
Revert r300789: There are Windows bot failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300794 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix bug that caused DwarfExpression to drop DW_OP_deref from FI locations
Adrian Prantl [Wed, 19 Apr 2017 23:42:25 +0000 (23:42 +0000)]
Fix bug that caused DwarfExpression to drop DW_OP_deref from FI locations
- introduced in r300522 and found via the Swift LLDB testsuite.

The fix is to set the location kind to memory whenever an FrameIndex
location is emitted.

rdar://problem/31707602

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300793 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Fix bug that caused DwarfExpression to drop DW_OP_deref from FI locations"
Adrian Prantl [Wed, 19 Apr 2017 23:42:17 +0000 (23:42 +0000)]
Revert "Fix bug that caused DwarfExpression to drop DW_OP_deref from FI locations"

This reverts commit r300790.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300792 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert earlier change. ds permute operations affect lgkm counter.
Kannan Narayanan [Wed, 19 Apr 2017 23:39:19 +0000 (23:39 +0000)]
Revert earlier change. ds permute operations affect lgkm counter.

Differential Revision: https://reviews.llvm.org/D32254

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300791 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix bug that caused DwarfExpression to drop DW_OP_deref from FI locations
Adrian Prantl [Wed, 19 Apr 2017 23:34:14 +0000 (23:34 +0000)]
Fix bug that caused DwarfExpression to drop DW_OP_deref from FI locations
- introduced in r300522 and found via the Swift LLDB testsuite.

The fix is to set the location kind to memory whenever an FrameIndex
location is emitted.

rdar://problem/31707602

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300790 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] Always build libFuzzer
Kuba Mracek [Wed, 19 Apr 2017 23:34:08 +0000 (23:34 +0000)]
[libFuzzer] Always build libFuzzer

There are two reasons why users might want to build libfuzzer:
- To fuzz LLVM itself
- To get the libFuzzer.a archive file, so that they can attach it to their code
This change always builds libfuzzer, and supports the second use case if the specified flag is set.

The point of this patch is to have something that can potentially be shipped with the compiler, and this also ensures that the version of libFuzzer is correct to use with that compiler.

Differential Revision: https://reviews.llvm.org/D32096

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300789 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalOpt] Simplify attribute code stripping nest, NFC
Reid Kleckner [Wed, 19 Apr 2017 23:26:44 +0000 (23:26 +0000)]
[GlobalOpt] Simplify attribute code stripping nest, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300787 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSimplify test for sret attribute in instcombine
Reid Kleckner [Wed, 19 Apr 2017 23:17:47 +0000 (23:17 +0000)]
Simplify test for sret attribute in instcombine

This change is correct because the verifier requires that at most one
argument be marked 'sret'.

NFC, removes a use of AttributeList slot APIs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300784 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTemporarily revert r299221 to fix nondeterminism in ThinLTO builder.
Galina Kistanova [Wed, 19 Apr 2017 23:16:14 +0000 (23:16 +0000)]
Temporarily revert r299221 to fix nondeterminism in ThinLTO builder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300783 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRefresh the statepoint docs a bit
Philip Reames [Wed, 19 Apr 2017 23:16:13 +0000 (23:16 +0000)]
Refresh the statepoint docs a bit

The documentation had gotten a bit stale.  The revised one are by no means perfect, but I tried to remove the obvious incorrect or misleading statements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300782 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoX86FrameLowering: Fix getFrameIndexReference() for 'fixed' objects
Matthias Braun [Wed, 19 Apr 2017 23:10:43 +0000 (23:10 +0000)]
X86FrameLowering: Fix getFrameIndexReference() for 'fixed' objects

Debug information is calculated with getFrameIndexReference() which was
missing some logic for the fixed object cases (= parameters on the stack).

rdar://24557797

Differential Revision: https://reviews.llvm.org/D32204

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300781 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Object] Fix some Clang-tidy modernize and Include What You Use warnings; other minor...
Eugene Zelenko [Wed, 19 Apr 2017 23:02:10 +0000 (23:02 +0000)]
[Object] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300779 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[sanitizer-coverage] remove some more stale code
Kostya Serebryany [Wed, 19 Apr 2017 22:42:11 +0000 (22:42 +0000)]
[sanitizer-coverage] remove some more stale code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300778 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove two unused variables (-Werror).
Evgeniy Stepanov [Wed, 19 Apr 2017 22:27:23 +0000 (22:27 +0000)]
Remove two unused variables (-Werror).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300777 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Cast more calls to add/sub/mul overflow functions to void. I missed the unitt...
Craig Topper [Wed, 19 Apr 2017 22:11:05 +0000 (22:11 +0000)]
[APInt] Cast more calls to add/sub/mul overflow functions to void. I missed the unittests in r300758.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300773 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAG] add splat vector support for 'or' in SimplifyDemandedBits
Sanjay Patel [Wed, 19 Apr 2017 22:00:00 +0000 (22:00 +0000)]
[DAG] add splat vector support for 'or' in SimplifyDemandedBits

I've changed one of the tests to not fold away, but we didn't and still don't do the transform
that the comment claims we do (and I don't know why we'd want to do that).

Follow-up to:
https://reviews.llvm.org/rL300725
https://reviews.llvm.org/rL300763

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300772 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[sanitizer-coverage] remove stale code
Kostya Serebryany [Wed, 19 Apr 2017 21:48:09 +0000 (21:48 +0000)]
[sanitizer-coverage] remove stale code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300769 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] remove -output_csv option. It duplicates the default output and got out...
Kostya Serebryany [Wed, 19 Apr 2017 21:34:58 +0000 (21:34 +0000)]
[libFuzzer] remove -output_csv option. It duplicates the default output and got out of sync

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300768 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAG] add splat vector support for 'xor' in SimplifyDemandedBits
Sanjay Patel [Wed, 19 Apr 2017 21:23:09 +0000 (21:23 +0000)]
[DAG] add splat vector support for 'xor' in SimplifyDemandedBits

This allows forming more 'not' ops, so we get improvements for ISAs that have and-not.

Follow-up to:
https://reviews.llvm.org/rL300725

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300763 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARMFrameLowering: Reserve emergency spill slot for large arguments
Matthias Braun [Wed, 19 Apr 2017 21:11:44 +0000 (21:11 +0000)]
ARMFrameLowering: Reserve emergency spill slot for large arguments

Re-commit after revert in r300668. Changed getMaxFPOffset() to a
more conservative heuristic instead of trying to be clever and missing
for some exotic calling conventions.

We need to reserve an emergency spill slot in cases with large argument
types that could overflow immediate offsets for FP relative address
calculations.

rdar://31317893

Differential Revision: https://reviews.llvm.org/D31643

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300761 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Cast calls to add/sub/mul overflow methods to void if only their overflow...
Craig Topper [Wed, 19 Apr 2017 21:09:45 +0000 (21:09 +0000)]
[APInt] Cast calls to add/sub/mul overflow methods to void if only their overflow bool out param is used.

This is preparation for a clang change to improve the [[nodiscard]] warning to not be ignored on methods that return a class marked [[nodiscard]] that are defined in the class itself. See D32207.

We should consider adding wrapper methods to APInt that return the overflow flag directly and discard the APInt result. This would eliminate the void casts and the need to create a bool before the call to pass to the out param.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300758 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Add frem constant folding test (PR3316)
Simon Pilgrim [Wed, 19 Apr 2017 21:09:19 +0000 (21:09 +0000)]
[InstCombine] Add frem constant folding test (PR3316)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300757 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Custom lower illegal small select types
Matt Arsenault [Wed, 19 Apr 2017 20:53:07 +0000 (20:53 +0000)]
AMDGPU: Custom lower illegal small select types

Promote them to i32 vectors to avoid unpacking and re-packing
the vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300754 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCode style change as suggested in https://reviews.llvm.org/D32177 (NFC)
Dehao Chen [Wed, 19 Apr 2017 20:52:21 +0000 (20:52 +0000)]
Code style change as suggested in https://reviews.llvm.org/D32177 (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300753 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Remove redundant computeKnownBits helper.
Eli Friedman [Wed, 19 Apr 2017 20:50:57 +0000 (20:50 +0000)]
[ARM] Remove redundant computeKnownBits helper.

Move the BFI logic to computeKnownBitsForTargetNode, and delete
the redundant CMOV logic.

This is intended as a cleanup, but it's probably possible to construct
a case where moving the BFI logic allows more combines.

Differential Revision: https://reviews.llvm.org/D31795

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300752 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GISEL]: Move getConstantVReg to Utils
Aditya Nandakumar [Wed, 19 Apr 2017 20:48:50 +0000 (20:48 +0000)]
[GISEL]: Move getConstantVReg to Utils

NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300751 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Add frem constant folding test (PR32177)
Simon Pilgrim [Wed, 19 Apr 2017 20:47:58 +0000 (20:47 +0000)]
[InstCombine] Add frem constant folding test (PR32177)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300750 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Use TableGen patterns to select vtbl. NFC.
Eli Friedman [Wed, 19 Apr 2017 20:39:39 +0000 (20:39 +0000)]
[ARM] Use TableGen patterns to select vtbl. NFC.

Differential Revision: https://reviews.llvm.org/D32103

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300749 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Use SignExtend64 instead of reinventing it. NFC
Craig Topper [Wed, 19 Apr 2017 20:32:11 +0000 (20:32 +0000)]
[APInt] Use SignExtend64 instead of reinventing it. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300747 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCEV] Make SCEV or modeling more aggressive.
Eli Friedman [Wed, 19 Apr 2017 20:19:58 +0000 (20:19 +0000)]
[SCEV] Make SCEV or modeling more aggressive.

Use haveNoCommonBitsSet to figure out whether an "or" instruction
is equivalent to addition. This handles more cases than just
checking for a constant on the RHS.

Differential Revision: https://reviews.llvm.org/D32239

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300746 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUsing address range map to speedup finding inline stack for address.
Dehao Chen [Wed, 19 Apr 2017 20:09:38 +0000 (20:09 +0000)]
Using address range map to speedup finding inline stack for address.

Summary:
In the current implementation, to find inline stack for an address incurs expensive linear search in 2 places:

* linear search for the top-level DIE
* recursive linear traverse the DIE tree to find the path to the leaf DIE

In this patch, a map is built from address to its corresponding leaf DIE. The inline stack is built by traversing from the leaf DIE up to the root DIE. This speeds up batch symbolization by ~10X without noticible memory overhead.

Reviewers: dblaikie

Reviewed By: dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32177

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300742 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdate the madd.ll test with utils/update_llc_test_checks.py (NFC)
Dehao Chen [Wed, 19 Apr 2017 20:08:14 +0000 (20:08 +0000)]
Update the madd.ll test with utils/update_llc_test_checks.py (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300740 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPR32710: Disable using PMADDWD for unsigned short.
Dehao Chen [Wed, 19 Apr 2017 19:50:34 +0000 (19:50 +0000)]
PR32710: Disable using PMADDWD for unsigned short.

Summary: PMADDWD can only handle signed short.

Reviewers: mkuper, wmi

Reviewed By: mkuper

Subscribers: andreadb, llvm-commits

Differential Revision: https://reviews.llvm.org/D32236

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300737 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Don't emit amd_kernel_code_t for callable functions
Matt Arsenault [Wed, 19 Apr 2017 19:38:10 +0000 (19:38 +0000)]
AMDGPU: Don't emit amd_kernel_code_t for callable functions

This is inserted directly in the text section. The relocation
for the function ends up resolving to the beginning of the
amd_kernel_code_t header rather than the actual function
entry point.

Also skip some of the comments for initialization
that only makes sense for kernels.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300736 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[tblgen] GCC/MS builtin to target intrisics map.
Aditya Nandakumar [Wed, 19 Apr 2017 19:14:20 +0000 (19:14 +0000)]
[tblgen] GCC/MS builtin to target intrisics map.

Patch by Ettore Speziale

Allow TableGen to generate static functions to perform GCC/MS builtin name to
target specific intrinsic ID mapping.

https://reviews.llvm.org/D31150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300735 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AMDGPU][mc][tests][NFC] Update bulk ISA tests for Gfx7 and Gfx8
Artem Tamazov [Wed, 19 Apr 2017 19:12:06 +0000 (19:12 +0000)]
[AMDGPU][mc][tests][NFC] Update bulk ISA tests for Gfx7 and Gfx8

Added approx. 1100 gfx7 and 1040 gfx8 test cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300734 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoStructurizeCFG: Directly invert cmp instructions
Matt Arsenault [Wed, 19 Apr 2017 18:29:07 +0000 (18:29 +0000)]
StructurizeCFG: Directly invert cmp instructions

The most common case for a branch condition is
a single use compare. Directly invert the branch
predicate rather than adding a lot of xor i1 true
which the DAG will have to fold later.

This produces nicer to read structurizer output.

This produces some random changes in codegen
due to the DAG swapping branch conditions itself,
and then does a poor job of dealing with those
inverts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300732 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GVN] Don't coerce non-integral pointers to integers or vice versa
Sanjoy Das [Wed, 19 Apr 2017 18:21:09 +0000 (18:21 +0000)]
[GVN] Don't coerce non-integral pointers to integers or vice versa

Summary:
See http://llvm.org/docs/LangRef.html#non-integral-pointer-type

The NewGVN test does not fail without these changes (perhaps it does
try to coerce pointers <-> integers to begin with?), but I added the
test case anyway.

Reviewers: dberlin

Subscribers: mcrosier, llvm-commits, Prazek

Differential Revision: https://reviews.llvm.org/D32208

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300730 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdate comment to match r300252.
Richard Smith [Wed, 19 Apr 2017 18:17:51 +0000 (18:17 +0000)]
Update comment to match r300252.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300728 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: TLS calling convention doesn't preserve r9 or r12 on Darwin.
Tim Northover [Wed, 19 Apr 2017 18:07:54 +0000 (18:07 +0000)]
ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300726 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAG] add splat vector support for 'and' in SimplifyDemandedBits
Sanjay Patel [Wed, 19 Apr 2017 18:05:06 +0000 (18:05 +0000)]
[DAG] add splat vector support for 'and' in SimplifyDemandedBits

The patch itself is simple: stop discriminating against vectors in visitAnd() and again in
SimplifyDemandedBits().

Some notes for reference:

1. We're not consistent about calls to SimplifyDemandedBits in the various visitXXX functions.
   Sometimes, we check if the RHS is a constant first. Other times (like here), we just dive in.
2. I'd like to break the vector shackles in steps for the sake of risk minimization, but we could
    make similar simultaneous changes in other places if we think that would be better.
3. I don't know what the intent of the changed tests in this patch was supposed to be, but since
   they wiggled in a positive way, I'm just going with that. :)
4. In the rotate tests, note that we can see through non-splat constants. This is a result of D24253.
5. My motivation for being here now is to make D31944 look better, so this is step 1 of N towards
   improving the vector codegen in that patch without writing any actual new code.

Differential Revision: https://reviews.llvm.org/D32230

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300725 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIR: Remove some comments that are documenting the obvious. NFC.
Peter Collingbourne [Wed, 19 Apr 2017 18:00:05 +0000 (18:00 +0000)]
IR: Remove some comments that are documenting the obvious. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300724 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MathExtras] Fix undefined behavior (shift by bit width)
Benjamin Kramer [Wed, 19 Apr 2017 17:46:15 +0000 (17:46 +0000)]
[MathExtras] Fix undefined behavior (shift by bit width)

While there add some unit tests for uint64_t. Found by ubsan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300721 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Don't align callable functions to 256
Matt Arsenault [Wed, 19 Apr 2017 17:42:39 +0000 (17:42 +0000)]
AMDGPU: Don't align callable functions to 256

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300720 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Change DivergenceAnalysis for function arguments
Matt Arsenault [Wed, 19 Apr 2017 17:42:34 +0000 (17:42 +0000)]
AMDGPU: Change DivergenceAnalysis for function arguments

Stop assuming all functions are kernels.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300719 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoPrefer addAttr(Attribute::AttrKind) over the AttributeList overload
Reid Kleckner [Wed, 19 Apr 2017 17:28:52 +0000 (17:28 +0000)]
Prefer addAttr(Attribute::AttrKind) over the AttributeList overload

This should simplify the call sites, which typically want to tweak one
attribute at a time. It should also avoid creating ephemeral
AttributeLists that live forever.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300718 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Reduce visitLoadInst() code duplication. NFCI.
Davide Italiano [Wed, 19 Apr 2017 17:26:57 +0000 (17:26 +0000)]
[InstCombine] Reduce visitLoadInst() code duplication. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300717 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Move the 'return *this' from the slow cases of assignment operators inline...
Craig Topper [Wed, 19 Apr 2017 17:01:58 +0000 (17:01 +0000)]
[APInt] Move the 'return *this' from the slow cases of assignment operators inline. We should let the compiler see that the fast/slow cases both return *this.

I don't think we chain assignments together very often so this shouldn't matter much.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300715 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] fold identity shuffles (recursing if needed)
Sanjay Patel [Wed, 19 Apr 2017 16:48:22 +0000 (16:48 +0000)]
[InstSimplify] fold identity shuffles (recursing if needed)

This patch simplifies the examples from D31509 and D31927 (PR30630) and catches
the basic identity shuffle tests that Zvi recently added.

I'm not sure if we have something like this in DAGCombiner, but we should?

It's worth noting that "MaxRecurse / RecursionLimit" is only 3 on entry at the moment.
We might want to bump that up if there are longer shuffle chains like this in the wild.

For now, we're ignoring shuffles that have undef mask elements because it's not
clear how those should be handled.

Differential Revision: https://reviews.llvm.org/D31960

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300714 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agouse 'auto' with 'dyn_cast' and fix formatting; NFC
Sanjay Patel [Wed, 19 Apr 2017 16:22:19 +0000 (16:22 +0000)]
use 'auto' with 'dyn_cast' and fix formatting; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300713 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd an #include for <climits> for CHAR_BIT.
Zachary Turner [Wed, 19 Apr 2017 15:50:43 +0000 (15:50 +0000)]
Add an #include for <climits> for CHAR_BIT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300711 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Support] Add some helpers to generate bitmasks.
Zachary Turner [Wed, 19 Apr 2017 15:45:31 +0000 (15:45 +0000)]
[Support] Add some helpers to generate bitmasks.

Frequently you you want a bitmask consisting of a specified
number of 1s, either at the beginning or end of a word.

The naive way to do this is to write

template<typename T>
T leadingBitMask(unsigned N) {
  return (T(1) << N) - 1;
}

but using this function you cannot produce a word with every
bit set to 1 (i.e. leadingBitMask<uint8_t>(8)) because left
shift is undefined when N is greater than or equal to the
number of bits in the word.

This patch provides an efficient, branch-free implementation
that works for all values of N in [0, CHAR_BIT*sizeof(T)]

Differential Revision: https://reviews.llvm.org/D32212

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300710 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove eol-style:native from MathExtras.h
Zachary Turner [Wed, 19 Apr 2017 15:43:23 +0000 (15:43 +0000)]
Remove eol-style:native from MathExtras.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300709 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r300697 which causes buildbot failure.
Dehao Chen [Wed, 19 Apr 2017 15:28:58 +0000 (15:28 +0000)]
Revert r300697 which causes buildbot failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300708 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Generate proper offset in opt-addr-mode
Krzysztof Parzyszek [Wed, 19 Apr 2017 15:15:51 +0000 (15:15 +0000)]
[Hexagon] Generate proper offset in opt-addr-mode

Also, make a few changes to allow using the pass in .mir testcases.
Among other things, change the abbreviation from opt-amode to amode-opt,
because otherwise lit would expand the "opt" part to the full path to
the opt binary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300707 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Remove RDefMap, use Liveness:getNearestAliasedRef instead
Krzysztof Parzyszek [Wed, 19 Apr 2017 15:14:30 +0000 (15:14 +0000)]
[Hexagon] Remove RDefMap, use Liveness:getNearestAliasedRef instead

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300706 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RDF] Switch NodeList to SmallVector from std::vector
Krzysztof Parzyszek [Wed, 19 Apr 2017 15:12:44 +0000 (15:12 +0000)]
[RDF] Switch NodeList to SmallVector from std::vector

The list has a single element 75+% of the time, reservation of 4 elements
is sufficient in 95% of cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300705 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RDF] Use faster version of findBlock
Krzysztof Parzyszek [Wed, 19 Apr 2017 15:11:23 +0000 (15:11 +0000)]
[RDF] Use faster version of findBlock

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300704 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RDF] Cache register units for reg masks instead of recalculating them
Krzysztof Parzyszek [Wed, 19 Apr 2017 15:10:09 +0000 (15:10 +0000)]
[RDF] Cache register units for reg masks instead of recalculating them

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300702 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Cache reached blocks in bit tracker instead of scanning list
Krzysztof Parzyszek [Wed, 19 Apr 2017 15:08:31 +0000 (15:08 +0000)]
[Hexagon] Cache reached blocks in bit tracker instead of scanning list

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300701 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] add test and auto-generate checks; NFC
Sanjay Patel [Wed, 19 Apr 2017 14:58:09 +0000 (14:58 +0000)]
[PowerPC] add test and auto-generate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300700 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] add test and auto-generate checks; NFC
Sanjay Patel [Wed, 19 Apr 2017 14:55:50 +0000 (14:55 +0000)]
[ARM] add test and auto-generate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300698 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUsing address range map to speedup finding inline stack for address.
Dehao Chen [Wed, 19 Apr 2017 14:50:57 +0000 (14:50 +0000)]
Using address range map to speedup finding inline stack for address.

Summary:
In the current implementation, to find inline stack for an address incurs expensive linear search in 2 places:

* linear search for the top-level DIE
* recursive linear traverse the DIE tree to find the path to the leaf DIE

In this patch, a map is built from address to its corresponding leaf DIE. The inline stack is built by traversing from the leaf DIE up to the root DIE. This speeds up batch symbolization by ~10X without noticible memory overhead.

Reviewers: dblaikie

Reviewed By: dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32177

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300697 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] Deduce correct type for vector GEP.
Davide Italiano [Wed, 19 Apr 2017 14:23:42 +0000 (14:23 +0000)]
[InstSimplify] Deduce correct type for vector GEP.

InstSimplify returned the wrong type when simplifying a vector GEP
and we ended up crashing when trying to replace all uses with the
new value. Fixes PR32697.

Differential Revision: https://reviews.llvm.org/D32180

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300693 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAG] Loop over remaining candidates on successful merge of stores of
Nirav Dave [Wed, 19 Apr 2017 13:52:38 +0000 (13:52 +0000)]
[DAG] Loop over remaining candidates on successful merge of stores of
extracted vectors types. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300688 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVR] Remove the 'multibyte' asm test
Dylan McKay [Wed, 19 Apr 2017 12:13:45 +0000 (12:13 +0000)]
[AVR] Remove the 'multibyte' asm test

It tests registers which are not actually used on AVR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300684 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRegenerate test. NFCI.
Simon Pilgrim [Wed, 19 Apr 2017 12:06:40 +0000 (12:06 +0000)]
Regenerate test. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300683 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVR] Fix the test suite
Dylan McKay [Wed, 19 Apr 2017 12:02:52 +0000 (12:02 +0000)]
[AVR] Fix the test suite

A bunch of tests failed because memory operations have been reordered.

I am unsure which commit changed this behaviour as the AVR build was
failing at that point with an unrelated error.

This commit just reoders some of the CHECK lines in some tests to suit
current llc output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300682 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalIsel][X86] support G_TRUNC selection.
Igor Breger [Wed, 19 Apr 2017 11:34:59 +0000 (11:34 +0000)]
[GlobalIsel][X86] support G_TRUNC selection.

Summary:
[GlobalIsel][X86] support G_TRUNC selection.
Add regbank-select and legalizer tests. Currently legalization of trunc i64 on 32bit platform not supported.

Reviewers: ab, zvi, rovka

Reviewed By: zvi

Subscribers: dberris, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D32115

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300678 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add D32039/PR31357 tests to show current BSWAP codegen
Simon Pilgrim [Wed, 19 Apr 2017 11:06:22 +0000 (11:06 +0000)]
[X86] Add D32039/PR31357 tests to show current BSWAP codegen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300672 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][SSE] Add scheduling latency/throughput tests for (most) SSE2 instructions
Simon Pilgrim [Wed, 19 Apr 2017 10:52:09 +0000 (10:52 +0000)]
[X86][SSE] Add scheduling latency/throughput tests for (most) SSE2 instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300671 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "ARMFrameLowering: Reserve emergency spill slot for large arguments"
Renato Golin [Wed, 19 Apr 2017 09:02:52 +0000 (09:02 +0000)]
Revert "ARMFrameLowering: Reserve emergency spill slot for large arguments"

This reverts commit r300639, as it broke self-hosting on ARM. PR32709.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300668 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalISel][X86] Split select tests. NFC.
Igor Breger [Wed, 19 Apr 2017 08:40:44 +0000 (08:40 +0000)]
[GlobalISel][X86] Split select tests. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300666 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] GlobalISel: Add support for G_MUL
Diana Picus [Wed, 19 Apr 2017 07:29:46 +0000 (07:29 +0000)]
[ARM] GlobalISel: Add support for G_MUL

Support G_MUL, very similar to G_ADD and G_SUB. The only difference is
in the instruction selector, where we have to select either MUL or MULv5
depending on the target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300665 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalISel] Support vector-of-pointers in LLT
Kristof Beyls [Wed, 19 Apr 2017 07:23:57 +0000 (07:23 +0000)]
[GlobalISel] Support vector-of-pointers in LLT

This fixes PR32471.

As comment 10 on that bug report highlights
(https://bugs.llvm.org//show_bug.cgi?id=32471#c10), there are quite a
few different defendable design tradeoffs that could be made, including
not representing pointers at all in LLT.

I decided to go for representing vector-of-pointer as a concept in LLT,
while keeping the size of the LLT type 64 bits (this is an increase from
48 bits before). My rationale for keeping pointers explicit is that on
some targets probably it's very handy to have the distinction between
pointer and non-pointer (e.g. 68K has a different register bank for
pointers IIRC). If we keep a scalar pointer, it probably is easiest to
also have a vector-of-pointers to keep LLT relatively conceptually clean
and orthogonal, while we don't have a very strong reason to break that
orthogonality.  Once we gain more experience on the use of LLT, we can
of course reconsider this direction.

Rejecting vector-of-pointer types in the IRTranslator is also an option
to avoid the crash reported in PR32471, but that is only a very
short-term solution; also needs quite a bit of code tweaks in places,
and is probably fragile. Therefore I didn't consider this the best
option.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300664 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalISel] Remove non-determinism from IRTranslator.
Kristof Beyls [Wed, 19 Apr 2017 06:38:37 +0000 (06:38 +0000)]
[GlobalISel] Remove non-determinism from IRTranslator.

This showed up in r300535/r300537, which were reverted in r300538 due to
some of the introduced tests in there failing on some bots, due to the
non-determinism fixed in this commit.

Re-committing r300535/r300537 will add 2 tests for the change in this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300663 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r300657 due to crashes in stage2 of bootstraps:
Chandler Carruth [Wed, 19 Apr 2017 06:23:20 +0000 (06:23 +0000)]
Revert r300657 due to crashes in stage2 of bootstraps:
http://lab.llvm.org:8011/builders/clang-with-lto-ubuntu/builds/2476/steps/build-stage2-LLVMgold.so/logs/stdio
http://bb.pgr.jp/builders/clang-3stage-x86_64-linux/builds/15036/steps/build_llvmclang/logs/stdio

I've updated the commit thread, reverting to get the bots back to green.

Original commit summary:
[JumpThread] We want to fold (not thread) when all predecessor go to single BB's successor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300662 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[JumpThread] We want to fold (not thread) when all predecessor go to single BB's...
Xin Tong [Wed, 19 Apr 2017 05:15:57 +0000 (05:15 +0000)]
[JumpThread] We want to fold (not thread) when all predecessor go to single BB's successor. .

Summary: In case all predecessor go to a single successor of current BB. We want to fold (not thread).

Reviewers: efriedma, sanjoy

Reviewed By: sanjoy

Subscribers: dberlin, majnemer, llvm-commits

Differential Revision: https://reviews.llvm.org/D30869

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300657 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCleanup some GraphTraits iteration code
Tim Shen [Wed, 19 Apr 2017 03:22:50 +0000 (03:22 +0000)]
Cleanup some GraphTraits iteration code

Use children<> and nodes<> in appropriate places to cleanup the code.

Also, as part of the cleanup,
change the signature of DominatorTreeBase's Split.
It is a protected non-virtual member function called only twice,
both from within the class,
and the removed passed argument in both cases is '*this'.
The reason for the existence of that argument seems to be that
back before r43115 Split was a free function,
so an argument to get '*this' was needed - but now that is no longer the
case.

Patch by Yoav Ben-Shalom!

Differential Revision: https://reviews.llvm.org/D32118

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300656 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARM: Use methods to access data stored with frame instructions
Serge Pavlov [Wed, 19 Apr 2017 03:12:05 +0000 (03:12 +0000)]
ARM: Use methods to access data stored with frame instructions

In r300196 several methods were added to TarfetInstrInfo to access
data stored with call frame setup/destroy instructions. This change
replaces calls to getOperand with calls to such special methods in
ARM target.

Differential Revision: https://reviews.llvm.org/D32127

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300655 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove buggy 'addAttributes(unsigned, AttrBuilder)' overload
Reid Kleckner [Wed, 19 Apr 2017 01:51:13 +0000 (01:51 +0000)]
Remove buggy 'addAttributes(unsigned, AttrBuilder)' overload

The 'addAttributes(unsigned, AttrBuilder)' overload delegated to 'get'
instead of 'addAttributes'.

Since we can implicitly construct an AttrBuilder from an AttributeSet,
just standardize on AttrBuilder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300651 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] update -help: mention -exact_artifact_path in help for -minimize_crash...
Kostya Serebryany [Wed, 19 Apr 2017 01:22:04 +0000 (01:22 +0000)]
[libFuzzer] update -help: mention -exact_artifact_path in help for -minimize_crash and -cleanse_crash

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300642 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVR] Migrate to new MCAsmInfo CodePointerSize
Leslie Zhai [Wed, 19 Apr 2017 01:20:43 +0000 (01:20 +0000)]
[AVR] Migrate to new MCAsmInfo CodePointerSize

Reviewers: dylanmckay, rengolin, kzhuravl, jroelofs

Reviewed By: kzhuravl, jroelofs

Subscribers: kzhuravl, llvm-commits

Differential Revision: https://reviews.llvm.org/D32154

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300641 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoARMFrameLowering: Reserve emergency spill slot for large arguments
Matthias Braun [Wed, 19 Apr 2017 01:16:07 +0000 (01:16 +0000)]
ARMFrameLowering: Reserve emergency spill slot for large arguments

We need to reserve an emergency spill slot in cases with large argument
types that could overflow immediate offsets for FP relative address
calculations.

rdar://31317893

Differential Revision: https://reviews.llvm.org/D31643

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300639 91177308-0d34-0410-b5e6-96231b3b80d8