[MachineIRBuilder] Fix formatting. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307144 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalISel][X86] For now don't handle not trivial function arguments lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307142 91177308-0d34-0410-b5e6-96231b3b80d8

[MachineIRBuilder] Add buildOr helper. NFC.

This isn't used anywhere yet, but I need it for a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307141 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalIsel] allow x86_fp80 values to be dumped.

Summary:
Otherwise the fallback path fails with an assertion on x86_64 targets,
when "x86_fp80" is encountered.

Reviewers: t.p.northover, zvi, guyblank

Reviewed By: zvi

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34975

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307140 91177308-0d34-0410-b5e6-96231b3b80d8

[MachineIRBuilder] Add buildBinaryOp helper. NFC

Add a helper for building simple binary ops like add, mul, sub, and.
This can be used in the future for quickly adding support for or, xor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307139 91177308-0d34-0410-b5e6-96231b3b80d8

[globalisel][tablegen] Fix an unused variable warning in release builds after r307133

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307138 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "[IndVars] Canonicalize comparisons between non-negative values and indvars"

This patch seems to cause failures of test MathExtras.SaturatingMultiply on
multiple buildbots. Reverting until the reason of that is clarified.

Differential Revision: https://reviews.llvm.org/rL307126

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307135 91177308-0d34-0410-b5e6-96231b3b80d8

[globalisel][tablegen] Added instruction emission to the state-machine-based matcher.

Summary:
This further improves the compile-time regressions that will be caused by a
re-commit of r303259.

Also added included preliminary work in preparation for the multi-insn emitter
since I needed to change the relevant part of the API for this patch anyway.

Depends on D33758

Reviewers: rovka, vitalybuka, ab, t.p.northover, qcolombet, aditya_nandakumar

Reviewed By: ab

Subscribers: kristof.beyls, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D33764

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307133 91177308-0d34-0410-b5e6-96231b3b80d8

[IndVars] Canonicalize comparisons between non-negative values and indvars

-If there is a IndVar which is known to be non-negative, and there is a value which is also non-negative,
then signed and unsigned comparisons between them produce the same result. Both of those can be
seen in the same loop. To allow other optimizations to simplify them, we turn all instructions like

  %c = icmp slt i32 %iv, %b
to

  %c = icmp ult i32 %iv, %b

if both %iv and %b are known to be non-negative.

Differential Revision: https://reviews.llvm.org/D34979

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307126 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalISel][X86] Allow graceful fallback for struct/array argument/return value lowering. Going to support it in follow patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307125 91177308-0d34-0410-b5e6-96231b3b80d8

Add the missing triple to the test case added as part of r307120.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307122 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Fix for PR33636

Remove casts to a constant when a node can be an undef.

Differential Revision: https://reviews.llvm.org/D34808

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307120 91177308-0d34-0410-b5e6-96231b3b80d8

[Bash-autocompletion] Show flags which has HelpText or GroupID

Summary: Otherwise internal flags will be also completed.

Differential Revision: https://reviews.llvm.org/D34930

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307116 91177308-0d34-0410-b5e6-96231b3b80d8

Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset

Relanding after rewriting undef.ll test to avoid host-dependant
endianness.

As discussed in D34087, rewrite areNonVolatileConsecutiveLoads using
generic checks. Also, propagate missing local handling from there to
BaseIndexOffset checks.

Tests of note:

  * test/CodeGen/X86/build-vector* - Improved.
  * test/CodeGen/BPF/undef.ll - Improved store alignment allows an
    additional store merge

  * test/CodeGen/X86/clear_upper_vector_element_bits.ll - This is a
    case we already do not handle well. Here, the DAG is improved, but
    scheduling causes a code size degradation.

Reviewers: RKSimon, craig.topper, spatel, andreadb, filcab

Subscribers: nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D34472

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307114 91177308-0d34-0410-b5e6-96231b3b80d8

[profiledata] Avoid creating a temporary vector in getNumValueData

getValueSitesForKind returns ArrayRef which has a cast operator
to std::vector, as a result a temporary vector is created
if the type of the variable is const std::vector&
that is suboptimal in this case.

Differential revision: https://reviews.llvm.org/D34970

Test plan: make check-all

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307113 91177308-0d34-0410-b5e6-96231b3b80d8

[SafepointIRVerifier] Add verifier pass for finding GC relocation bugs

Original Patch and summary by Philip Reames.

RewriteStatepointsForGC tries to rewrite a function in a manner where
the optimizer can't end up using a pointer value after it might have
been relocated by a safepoint. This pass checks the invariant that
RSForGC is supposed to establish and that (if we constructed semantics
correctly) later passes must preserve.

This has been a really useful diagnostic tool when initially developing
the rewriting scheme and has found numerous bugs.

Differential Revision: https://reviews.llvm.org/D15940

Reviewed by: swaroop.sridhar, mjacob

Subscribers: llvm-commits

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307112 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "[AVR] Add the branch selection pass from the GitHub repository"

This reverts commit 602ef067c1d58ecb425d061f35f2bc4c7e92f4f3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307111 91177308-0d34-0410-b5e6-96231b3b80d8

[AVR] Add the branch selection pass from the GitHub repository

We should rewrite this using the generic branch relaxation pass, but for
the moment having this pass is better than hitting an assertion error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307109 91177308-0d34-0410-b5e6-96231b3b80d8

NFC.
Made some updates to the half.ll test under CodeGen to make it friendly to the update_llc_test_checks .py tool as follows:
1.Removing the llc flag -asm-verbose=false
2.Grouping the multiple check-prefix directives
3.Apply update_llc_test_checks.py tool on the test

This change is needed to easily update scheduling changes in an upcoming patch.

Reviewers: zvi, RKSimon, craig.topper

Differential Revision: https://reviews.llvm.org/D34934

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307108 91177308-0d34-0410-b5e6-96231b3b80d8

Recommit r307064, "[InstCombine] Add test cases demonstrating creation of extra bswap instrinsic calls when when optimizing bswap and bitwise ops when the bswaps have additional uses. NFC"

The test check lines have now been fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307106 91177308-0d34-0410-b5e6-96231b3b80d8

[ARM][test] Added test/CodeGen/ARM/ror.ll test. NFC precommit for D12833.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307103 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE4A] Add support for combining from non-v16i8 EXTRQI/INSERTQI shuffles

With the improved shuffle decoding we can now combine EXTRQI/INSERTQI shuffles from non-v16i8 vector types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307099 91177308-0d34-0410-b5e6-96231b3b80d8

Fix signed/unsigned comparison warnings

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307098 91177308-0d34-0410-b5e6-96231b3b80d8

[AMDGPU] Switch scalarize global loads ON by default
Differential revision: https://reviews.llvm.org/D34407

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307097 91177308-0d34-0410-b5e6-96231b3b80d8

[LoopDeletion] NFC: Add loop being analyzed debug statement

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307096 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE4A] Generalized EXTRQI/INSERTQI shuffle decodes

The existing decodes only worked for v16i8 vectors, this adds support for any 128-bit vector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307095 91177308-0d34-0410-b5e6-96231b3b80d8

fix trivial typos in comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307094 91177308-0d34-0410-b5e6-96231b3b80d8

[globalisel][tablegen] Fix the modules build after r307079

Exclude InstructionSelectorImpl.h since DEBUG_TYPE may vary between includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307093 91177308-0d34-0410-b5e6-96231b3b80d8

[DAGCombiner] Intermediate variables in visitRotate promoted to the function's begin. NFC precommit for D12833.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307091 91177308-0d34-0410-b5e6-96231b3b80d8

[globalisel][tablegen] Fix release builds after r307079

Using NumPatternEmitted as a unique id for the tables is not valid on release
builds since the counters don't count in that case.

Also fix an unused variable warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307088 91177308-0d34-0410-b5e6-96231b3b80d8

[FastISel] Move gc intrinsic test to X86 directory

Move from generic to X86 directory since gc intrinsics only supposed in
X86 64 bit.
Add target triple as well.
Fixes build failure in i686-linux-RA  caused by rL307084.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307086 91177308-0d34-0410-b5e6-96231b3b80d8

Fix dangling StringRefs found by clang-tidy misc-dangling-handle check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307085 91177308-0d34-0410-b5e6-96231b3b80d8

[FastISel][SelectionDAG]Teach fastISel about GC intrinsics

Summary:
We are crashing in LLC at O0 when gc intrinsics are present in the block.
The reason being FastISel performs basic block ISel by modifying GC.relocates
to be the first instruction in the block. This can cause us to visit the GC
relocate before it's corresponding GC.statepoint is visited, which is incorrect.
When we lower the statepoint, we record the base and derived pointers, along
with the gc.relocates. After this we can visit the gc.relocate.

This patch avoids fastISel from incorrectly creating the block with gc.relocate
as the first instruction.

Reviewers: qcolombet, skatkov, qikon, reames

Reviewed by: skatkov

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34421

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307084 91177308-0d34-0410-b5e6-96231b3b80d8

[AMDGPU] Fix latency of MIMG instructions

Patch by cwabbott (Connor Abbott).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307081 91177308-0d34-0410-b5e6-96231b3b80d8

NFC. Removed mention of missing script from build_docker_image.sh.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307080 91177308-0d34-0410-b5e6-96231b3b80d8

[globalisel][tablegen] Partially fix compile-time regressions by converting matcher to state-machine(s)

Summary:
Replace the matcher if-statements for each rule with a state-machine. This
significantly reduces compile time, memory allocations, and cumulative memory
allocation when compiling AArch64InstructionSelector.cpp.o after r303259 is
recommitted.

The following patches will expand on this further to fully fix the regressions.

Reviewers: rovka, ab, t.p.northover, qcolombet, aditya_nandakumar

Reviewed By: ab

Subscribers: vitalybuka, aemerson, javed.absar, igorb, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D33758

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307079 91177308-0d34-0410-b5e6-96231b3b80d8

[LoopDeletion] NFC: Add debug statements to the optimization

We have a DEBUG option for loop deletion, but no related debug messages.
Added some debug messages to state why loop deletion failed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307078 91177308-0d34-0410-b5e6-96231b3b80d8

fix trivial typos in comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307075 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add combine tests for vector rotates

Reference tests for D12833

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307073 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r307064, "[InstCombine] Add test cases demonstrating creation of extra bswap instrinsic calls when when optimizing bswap and bitwise ops when the bswaps have additional uses. NFC"

Seems confused between %tmpN and unnamed %N to give same name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307070 91177308-0d34-0410-b5e6-96231b3b80d8

llvm/ExecutionEngine/Orc/ObjectTransformLayer.h: Add <memory> to appease libstdc++'s std::shared_ptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307069 91177308-0d34-0410-b5e6-96231b3b80d8

NFC commit.
 Converting the Codegen test "extractelement-legalization-store-ordering.ll" to be "update_llc_test_checks" friendly.

The changes to the test are needed for an upcoming scheduling patch.

Reviewers: zvi, RKSimon

Differential Revision: https://reviews.llvm.org/D34935

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307066 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] Add TODOs for a couple things that should maybe be in InstSimplify instead. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307065 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] Add test cases demonstrating creation of extra bswap instrinsic calls when when optimizing bswap and bitwise ops when the bswaps have additional uses. NFC

I assume bswap intrinsics are somewhat costly so we should be making sure we are getting rid of them not creating more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307064 91177308-0d34-0410-b5e6-96231b3b80d8

[tablegen] Avoid creating a temporary vector in getInstructionCase

Record::getValues returns ArrayRef which has a cast operator
to std::vector, as a result a temporary vector is created
if the type of the variable is const std::vector&
that is suboptimal in this case.

Differential revision: https://reviews.llvm.org/D34969

Test plan: make check-all

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307063 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add comment string for broadcast loads from the constant pool.

Summary:
When broadcasting from the constant pool its useful to print out the final vector similar to what we do for normal moves from the constant pool.

I changed only a couple tests that were broadcast focused. One of them had been previously hand tweaked after running the script so that it could check the constant pool declaration. But I think this patch makes that unnecessary now since we can check the comment instead.

Reviewers: spatel, RKSimon, zvi

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34923

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307062 91177308-0d34-0410-b5e6-96231b3b80d8

[llvm] Revert "[tablegen] Avoid creating a temporary vector in getInstructionCase"

Revert rL307059 because of the incorrect commit message & patch,
will recommit later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307061 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Add RDRAND feature to GLM CPU

Summary: I believe this should be supported on GLM since RDSEED is.

Reviewers: m_zuckerman, zvi, RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34828

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307060 91177308-0d34-0410-b5e6-96231b3b80d8

[tablegen] Avoid creating a temporary vector in getInstructionCase

Record::getValues returns ArrayRef which has a cast operator
to std::vector, as a result a temporary vector is created
if the type of the variable is const std::vector&
that was suboptimal in this case.

Differential revision: https://reviews.llvm.org/D34969

Test plan: make check-all

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307059 91177308-0d34-0410-b5e6-96231b3b80d8

[Orc] Remove the memory manager argument to addModule, and de-templatize the
symbol resolver argument.

De-templatizing the symbol resolver is part of the ongoing simplification of
ORC layer API.

Removing the memory management argument (and delegating construction of memory
managers for RTDyldObjectLinkingLayer to a functor passed in to the constructor)
allows us to build JITs whose base object layers need not be compatible with
RTDyldObjectLinkingLayer's memory mangement scheme. For example, a 'remote
object layer' that sends fully relocatable objects directly to the remote does
not need a memory management scheme at all (that will be handled by the remote).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307058 91177308-0d34-0410-b5e6-96231b3b80d8

[AVR] Fix bug which caused assertion errors for some FRMIDX instructions

Previously, if a basic block ended with a FRMIDX instruction, we would
end up doing something like this.

*std::next(MBB.end())

Which would hit an error:

"Assertion `!NodePtr->isKnownSentinel()' failed."

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307057 91177308-0d34-0410-b5e6-96231b3b80d8

[AVR] Add a missing clobber declaration to LPMW

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307056 91177308-0d34-0410-b5e6-96231b3b80d8

[DAG] Fixed predicate for determining when two frame indices
addresses are comparable. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307055 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default"

It broke a testcase.

  Failing Tests (1):
      LLVM :: CodeGen/AMDGPU/alignbit-pat.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307054 91177308-0d34-0410-b5e6-96231b3b80d8

[legalize-types] Clean up softening machinery.

The patch makes SoftenFloatResult/Operand logic just the same as all other legalization routines have: SoftenFloatResult() now fills the SoftenFloats map and SoftenFloatOperand() perform all needed replacements. This prevents softening mashinery from leaving stale entries in SoftenFloats map (that resulted in errors during the legalize type checking) and clarifies softening. The patch replaces https://reviews.llvm.org/D29265.

Differential Revision: https://reviews.llvm.org/D31946

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307053 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE4A] Add support for combining from EXTRQI/INSERTQI shuffles

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307048 91177308-0d34-0410-b5e6-96231b3b80d8

MathExtras UnitTest: Assert that isPowerOf2(0) is false. NFC.

Summary:
This is a follow-up on D34077. Elena observed that the
correctness of the code relies on isPowerOf2(0) returning false.
Adding a test to cover this corner-case.

Reviewers: delena, davide, craig.topper

Reviewed By: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34939

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307046 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE4A] Add SSE4A shuffle tests on pre-SSSE3 hardware

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307042 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE4A] Test SSE4A shuffle combining on SSE42 capable target as well

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307038 91177308-0d34-0410-b5e6-96231b3b80d8

DAGCombine: Combine BUILD_VECTOR to TRUNCATE

Summary:
Add a combine for creating a truncate to replace a build_vector composed of extracts with
indices that form a stride-2^N series.

Example:
v8i32 V = ...

v4i32 build_vector((extract_elt V, 0), (extract_elt V, 2), (extract_elt V, 4), (extract_elt V, 6))
-->
v4i32 truncate (bitcast V to v4i64)

Related discussion in llvm-dev about canonicalizing shuffles to
truncates in LLVM IR:
http://lists.llvm.org/pipermail/llvm-dev/2017-January/108936.html.

Reviewers: spatel, RKSimon, efriedma, igorb, craig.topper, wolfgangp, delena

Reviewed By: delena

Subscribers: guyblank, delena, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D34077

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307036 91177308-0d34-0410-b5e6-96231b3b80d8

[LoopInterchange] Add more debug messages to currentLimitations().

Summary: This makes it easier to find out which limitation prevented this pass from doing its work.

Reviewers: karthikthecool, mzolotukhin, efriedma, mcrosier

Reviewed By: mcrosier

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D34940

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307035 91177308-0d34-0410-b5e6-96231b3b80d8

[x86] auto-generate complete checks for tests; NFC

These all used 'CHECK-NOT' which isn't necessary if we have complete checks.
There were also over-specifications in the RUN params such as CPU model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307033 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed argument parsing in docker scripts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307031 91177308-0d34-0410-b5e6-96231b3b80d8

[x86] auto-generate complete checks for tests; NFC

These all used 'CHECK-NOT' which isn't necessary if we have complete checks.
There were also several over-specifications in the RUN params such as CPU model or OS requirement

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307028 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE4A] Add tests showing missed opportunities to combine EXTRQI/INSERTQI shuffles

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307027 91177308-0d34-0410-b5e6-96231b3b80d8

[AMDGPU] Switch scalarize global loads ON by default

Differential revision: https://reviews.llvm.org/D34407

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307026 91177308-0d34-0410-b5e6-96231b3b80d8

[x86] auto-generate complete checks for tests; NFC

These all used 'CHECK-NOT' which isn't necessary if we have complete checks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307024 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] move and improve tests for cmp-intrinsic; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307022 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "[GVN] Recommit the patch "Add phi-translate support in scalarpre"."

This reverts commit r306313. This breaks selfhost at -O3 and PR33652.
Let me know if you need additional information on reproducing the issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307021 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalISel][X86] fix %ptr(p0) = G_CONSTANT selection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307019 91177308-0d34-0410-b5e6-96231b3b80d8

fix trivial typos in comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307004 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] Add a TODO for a probable missing single use check. NFC

Will try to fix it soon, but in case I forget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307003 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] Support BITWISE_OP( BSWAP(x), CONSTANT ) -> BSWAP( BITWISE_OP(x, BSWAP(CONSTANT) ) ) for splat vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307002 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] Add test cases for BITWISE_OP( BSWAP(x), CONSTANT ) -> BSWAP( BITWISE_OP(x, BSWAP(CONSTANT) ) ) with splat vectors. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307001 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] Remove support for BITWISE_OP(CONSTANT, BSWAP(x)) -> BSWAP(OP(BSWAP(CONSTANT), x)).

Constants were already canonicalized to the right hand side before we got here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307000 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] Support BITWISE_OP(BSWAP(A),BSWAP(B))->BSWAP(BITWISE_OP(A, B)) for vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306999 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] Add test cases showing missed opportunity to fold BITWISE_OP(BSWAP(A),BSWAP(B))->BSWAP(BITWISE_OP(A, B)) for vectors. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306998 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] Remove an if that should have been guaranteed by the caller. Replace with an assert. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306997 91177308-0d34-0410-b5e6-96231b3b80d8

AMDGPU: Add operand target flags serialization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306995 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][AVX512] Test AVX512VPOPCNTDQ CTPOP with/without AVX512BW

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306991 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][AVX512VPOPCNTDQ] Improve support for v16i8/v8i16/v16i16/ CTPOP

Zero extend to v16i32/v8i64, use VPOPCNTDQ instructions and truncate back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306990 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][AVX512] Cleanup tzcnt tests triples and attributes

Avoid use of specific -mcpu

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306989 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][AVX512] Cleanup popcnt tests triples and attributes

Avoid use of specific -mcpu

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306988 91177308-0d34-0410-b5e6-96231b3b80d8

[IR] Remove unnecessary operator new from ConstantDataArray and ConstantDataVector. They inherit an identical version from ConstantData. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306987 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] Use m_BitReverse pattern match helper. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306986 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] fix crash when folding cmp+bswap vector

We assumed the constant was a scalar when creating the replacement operand.

Also, improve tests for this fold and move the tests for this fold to their own file.
I'll move the related and missing tests to this file as a follow-up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306985 91177308-0d34-0410-b5e6-96231b3b80d8

[x86] auto-generate complete checks for tests; NFC

These all used 'CHECK-NOT' which isn't necessary if we have complete checks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306984 91177308-0d34-0410-b5e6-96231b3b80d8

[x86] remove unnecessary RUN for test after auto-generating checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306983 91177308-0d34-0410-b5e6-96231b3b80d8

[x86] update test to use FileCheck and auto-generate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306982 91177308-0d34-0410-b5e6-96231b3b80d8

[x86] auto-generate complete checks for tests; NFC

These all used 'CHECK-NOT' which isn't necessary if we have complete checks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306981 91177308-0d34-0410-b5e6-96231b3b80d8

[InstCombine] look through bswap/bitreverse for equality comparisons

I noticed this missed bswap optimization in the CGP memcmp() expansion,
and then I saw that we don't have the fold in InstCombine.

Differential Revision: https://reviews.llvm.org/D34763

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306980 91177308-0d34-0410-b5e6-96231b3b80d8

llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll: -debug is available in +Asserts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306979 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Attempt to combine 64-bit and 32-bit shuffles to unary shuffles before bit shifts

We are combining shuffles to bit shifts before unary permutes, which means we can't fold loads plus the destination register is destructive

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306978 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Attempt to combine 64-bit and 16-bit shuffles to unary shuffles before bit shifts

We are combining shuffles to bit shifts before unary permutes, which means we can't fold loads plus the destination register is destructive

The 32-bit shuffles are a bit tricky and will be dealt with in a later patch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306977 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][SSE] Add test showing missed opportunity to combine to pshuflw

We are combining shuffles to bit shifts before unary permutes, which means we can't fold loads plus the destination register is destructive

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306976 91177308-0d34-0410-b5e6-96231b3b80d8

fix trivial typos in documents; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306975 91177308-0d34-0410-b5e6-96231b3b80d8

[X86][CM] update add\sub costs of vectors of 64 in X86\SLM arch

this patch updates the cost of addq\subq (add\subtract of vectors of 64bits)
based on the performance numbers of SLM arch.

Differential Revision: https://reviews.llvm.org/D33983

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306974 91177308-0d34-0410-b5e6-96231b3b80d8

[X86] Rerun "update_llc_test_checks" tool on CodeGen tests. NFC.

This is NFC after rerunning the "update_llc_test_checks.py" tool on the CodeGen X86 tests in order to submit a patch.
Minor differences due to added "End of Function" lines.

Reviewers: zvi
Differential Revision: https://reviews.llvm.org/D34933

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306973 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalISel][X86] Support G_GLOBAL_VALUE operation.

Summary: Support G_GLOBAL_VALUE operation. For now most of the PIC configurations not implemented yet.

Reviewers: zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34738

Conflicts:
test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306972 91177308-0d34-0410-b5e6-96231b3b80d8

[GlobalISel][X86] Support vector type G_UNMERGE_VALUES selection.

Summary:
Support vector type G_UNMERGE_VALUES selection.
For now G_UNMERGE_VALUES marked as legal for any type, so nothing to do in legalizer.

Reviewers: t.p.northover, qcolombet, zvi, guyblank

Reviewed By: guyblank

Subscribers: rovka, kristof.beyls, guyblank, llvm-commits

Differential Revision: https://reviews.llvm.org/D33665

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306971 91177308-0d34-0410-b5e6-96231b3b80d8