Mehdi Amini [Mon, 7 Dec 2015 22:27:19 +0000 (22:27 +0000)]
Remove useless hack that avoids calling LLVMLinkInInterpreter()
This is supposed to force-link the Interpreter, by inserting a dead
call to LLVMLinkInInterpreter().
Since it is actually an empty function, there is no reason for the
call to be dead.
Philip Reames [Mon, 7 Dec 2015 21:27:15 +0000 (21:27 +0000)]
[EarlyCSE] Simplify and invert ParseMemoryInst [NFCI]
Restructure ParseMemoryInst - which was introduced to abstract over target specific load and stores instructions - to just query the underlying instructions. In theory, this could be slightly slower than caching the results, but in practice, it's very unlikely to be measurable.
The simple query scheme makes it far easier to understand, and much easier to extend with new queries. Given I'm about to need to add new query types, doing the cleanup first seemed worthwhile.
Do we still believe the target specific intrinsic handling is worthwhile in EarlyCSE? It adds quite a bit of complexity and makes the code harder to read. Being able to delete the abstraction entirely would be wonderful.
Easwaran Raman [Mon, 7 Dec 2015 21:21:20 +0000 (21:21 +0000)]
Use updated threshold for indirect call bonus
When considering foo->bar inlining, if there is an indirect call in foo which gets resolved to a direct call (say baz), then we try to inline baz into bar with a threshold T and subtract max(T - Cost(bar->baz), 0) from Cost(foo->bar). This patch uses max(Threshold(bar->baz) - Cost(bar->baz)) instead, where Thresheld(bar->baz) could be different from T due to bonuses or subtractions. Threshold(bar->baz) - Cost(bar->baz) better represents the desirability of inlining baz into bar.
Teresa Johnson [Mon, 7 Dec 2015 19:21:11 +0000 (19:21 +0000)]
[ThinLTO] Support for specifying function index from pass manager
Summary:
Add a field on the PassManagerBuilder that clang or gold can use to pass
down a pointer to the function index in memory to use for importing when
the ThinLTO backend is triggered. Add support to supply this to the
function import pass.
Sanjay Patel [Mon, 7 Dec 2015 17:39:48 +0000 (17:39 +0000)]
Tighten checks so we can see existing codegen
The 2-element vector case shows a surprising bug: we failed to
eliminate ops on undefs, so there are 4 fmax calls even though
there can only be 2 valid elements in the inputs.
Aaron Ballman [Mon, 7 Dec 2015 15:44:34 +0000 (15:44 +0000)]
Silence all C4592 warnings with MSVC 2015 Update 1. This warning produces false positives that Microsoft says will be fixed in Update 2. Until this produces reliable diagnostics, it is safe to disable the diagnostic -- the compiler is not doing anything different than it previously did aside from issuing the diagnostic.
(Note, this silences at least one false positive in LLVM with FeatureBitset uses.)
Teresa Johnson [Mon, 7 Dec 2015 15:05:44 +0000 (15:05 +0000)]
[ThinLTO] Support cloning of temporary DILocation metadata
This is needed to support linking of module-level metadata as a
postpass after function importing, where we will be leaving temporary
metadata on imported instructions until the postpass metadata import.
VX-512: Fixed a bug in FP logic operation lowering
FP logic instructions are supported in DQ extension on AVX-512 target.
I use integer operations instead.
Added tests.
I also enabled FABS in this patch in order to check ANDPS.
The operations are FOR, FXOR, FAND, FANDN.
The instructions, that supported for 512-bit vector under DQ are:
VORPS/PD, VXORPS/PD, VANDPS/PD, FANDNPS/PD.
Daniel Sanders [Mon, 7 Dec 2015 14:12:44 +0000 (14:12 +0000)]
[mips][ias] Removed DSP/DSPr2 instructions from base architecture valid-xfail.s's.
Summary:
valid-xfail.s is for instructions that should be valid in the given ISA but
incorrectly fail. DSP/DSPr2 instructions are correct to fail since DSP/DSPr2 is
not enabled.
AVX-512: Fixed masked load / store instruction selection for KNL.
Patterns were missing for KNL target for <8 x i32>, <8 x float> masked load/store.
This intrinsic comes with all legal types:
<8 x float> @llvm.masked.load.v8f32(<8 x float>* %addr, i32 align, <8 x i1> %mask, <8 x float> %passThru),
but still requires lowering, because VMASKMOVPS, VMASKMOVDQU32 work with 512-bit vectors only.
All data operands should be widened to 512-bit vector.
The mask operand should be widened to v16i1 with zeroes.
Keno Fischer [Sun, 6 Dec 2015 23:05:38 +0000 (23:05 +0000)]
[Verifier] Fix !dbg validation if Scope is the Subprogram
Summary:
We are inserting both Scope and SP into the Seen map and check whether
it was already there in which case we skip the validation (the idea
being that we already checked this Subprogram before). However,
if (Scope == SP) as MDNodes, then inserting the Scope, will trigger
the Seen check causing us to incorrectly not validate this !dbg
attachment. Fix this by not performing the SP Seen check if Scope == SP
Sanjay Patel [Sun, 6 Dec 2015 18:05:12 +0000 (18:05 +0000)]
[x86] add missing maxnum/minnum tests for 256-bit vectors
Also, switch to x86-64 because once we can lower these to something
more reasonable, there will be less noise in the checks. And add
AVX runs because those will be different than SSE.
This removes the code path that generate "synchronous" (only correct at call site) CFA.
We will probably want to re-introduce it once we are capable of emitting different
.eh_frame and .debug_frame sections.
Craig Topper [Sat, 5 Dec 2015 17:34:07 +0000 (17:34 +0000)]
[Hexagon] Don't call getNumImplicitDefs and then iterate over the count. getNumImplicitDefs contains a loop so its better to just loop over the null terminated implicit def list. NFC
Keno Fischer [Sat, 5 Dec 2015 14:42:34 +0000 (14:42 +0000)]
[ASAN] Add doFinalization to reset state
Summary: If the same pass manager is used for multiple modules ASAN
complains about GlobalsMD being initialized twice. Fix this by
resetting GlobalsMD in a new doFinalization method to allow this
use case.
Different version of indexed format may use different
name uniquing schemes for static functions. Pass the
version info to the name interface so that different
schmes can be picked (for profile lookup).
David Blaikie [Sat, 5 Dec 2015 03:41:53 +0000 (03:41 +0000)]
[llvm-dwp] Add coverage for both the presence and absence of type units, and fix/remove the emission of a broken tu_index when no type units are present
Dan Gohman [Sat, 5 Dec 2015 03:03:35 +0000 (03:03 +0000)]
[WebAssembly] Implement ReverseBranchCondition, and re-enable MachineBlockPlacement
This patch introduces a codegen-only instruction currently named br_unless,
which makes it convenient to implement ReverseBranchCondition and re-enable
the MachineBlockPlacement pass. Then in a late pass, it lowers br_unless
back into br_if.
Keno Fischer [Sat, 5 Dec 2015 01:38:12 +0000 (01:38 +0000)]
[opt] Fix run-twice option for non-idempotent passes
Cloning the module was supposed to guard against the possibility
that the passes may be non-idempotent. However, for some reason
I decided to put that AFTER the passes had already run on the
module, defeating the point entirely. Fix that by moving up the
CloneModule as is done in llc.
Keno Fischer [Sat, 5 Dec 2015 01:02:53 +0000 (01:02 +0000)]
[MC] Add a test for state reset in MCMachOStreamer
This was fixed in r254751, but untestable until r254774, which
added the necessary command line flag to llc. Add a test now
to make sure this doesn't regress again.
Dan Gohman [Sat, 5 Dec 2015 00:51:40 +0000 (00:51 +0000)]
[WebAssembly] Fix scheduling dependencies in register-stackified code
Add physical register defs to instructions used from stackified
instructions to prevent them from being scheduled into the middle of
a stack sequence. This is a conservative measure which may be loosened
in the future.
Justin Bogner [Sat, 5 Dec 2015 00:39:14 +0000 (00:39 +0000)]
CodeGen: Let the BumpPtrAllocator free the elements of indexList
The indexList's nodes are all allocated on a BumpPtrAllocator, so it's
more efficient to let them be freed when it goes away, rather than
deleting them directly. This is a follow up to r254794.
Philip Reames [Sat, 5 Dec 2015 00:18:33 +0000 (00:18 +0000)]
[EarlyCSE] IsSimple vs IsVolatile naming clarification (NFC)
When the notion of target specific memory intrinsics was introduced to EarlyCSE, the commit confused the notions of volatile and simple memory access. Since I'm about to start working on this area, cleanup the naming so that patches aren't horribly confusing. Note that the actual implementation was always bailing if the load or store wasn't simple.
Reminder:
- "volatile" - C++ volatile, can't remove any memory operations, but in principal unordered
- "ordered" - imposes ordering constraints on other nearby memory operations
- "atomic" - can't be split or sheared. In LLVM terms, all "ordered" operations are also atomic so the predicate "isAtomic" is often used.
- "simple" - a load which is none of the above. These are normal loads and what most of the optimizer works with.
Philip Reames [Fri, 4 Dec 2015 23:48:19 +0000 (23:48 +0000)]
[PassManager] Ensure destructors of cached AnalysisUsage objects are run
In 254760, I introduced the usage of a BumpPtrAllocator for the AnalysisUsage instances held by the PassManger. This turns out to have been incorrect since a BumpPtrAllocator does not run the destructors of objects when deallocating memory. Since a few of our SmallVector's had grown beyond their small size, we end up with some leaked memory. We need to use a SpecificBumpPtrAllocator instead.
Philip Reames [Fri, 4 Dec 2015 23:06:33 +0000 (23:06 +0000)]
Address a memory leak in 254760
The issue appears to have been that the copy constructor of the SmallVector was being invoked and this was somehow leading to leaked memory. This patch avoids the symptom, but likely doesn't address the underlying problem. I'm still investigating the root cause, but wanted to avoid the memory leak in the mean time. Even with the underlying fix, avoiding the redundant allocation is worthwhile.
Justin Bogner [Fri, 4 Dec 2015 23:00:54 +0000 (23:00 +0000)]
CodeGen: Move the SlotIndexes BumpPtrAllocator before the list it allocates
When a `SlotIndexes` is destroyed, `ileAllocator` will currently be
destructed before `IndexList`, but all of `IndexList`'s storage has
been allocated by `ileAllocator`. This means we'll call destructors on
garbage data, which is very bad. This can be avoided by putting the
BumpPtrAllocator earlier in the class than anything it allocates.
Unfortunately, I don't know how to test this. It depends very much on
memory layout, and the only evidence I have that this is actually
happening in practice are backtraces that might be explained by this.
By inspection though, the code is obviously dangerous/wrong, and this
is the right thing to do.
I'll follow up later with a patch that calls clearAndLeakNodesUnsafely
on the list, since there isn't much point in destructing them when
they're allocated in a BPA anyway, but I figured it makes sense to
commit the correctness fix separately from that optimization.
Hans Wennborg [Fri, 4 Dec 2015 23:00:33 +0000 (23:00 +0000)]
X86: Don't emit SAHF/LAHF for 64-bit targets unless explicitly supported
These instructions are not supported by all CPUs in 64-bit mode. Emitting them
causes Chromium to crash on start-up for users with such chips.
(GCC puts these instructions behind -msahf on 64-bit for the same reason.)
This patch adds FeatureLAHFSAHF, enables it by default for 32-bit targets
and modern CPUs, and changes X86InstrInfo::copyPhysReg back to the lowering
from before r244503 when the instructions are not available.
[libFuzzer] compute base64 in-process instead of using an external lib. Since libFuzzer should not depend on anything, just re-implement base64 encoder. PR25746
projects / llvm / log