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7 years agoPeepholeOptimizer: Do not replace SubregToReg(bitcast like)
Matthias Braun [Mon, 9 Jan 2017 21:38:17 +0000 (21:38 +0000)]
PeepholeOptimizer: Do not replace SubregToReg(bitcast like)

While we can usually replace bitcast like instructions
(MachineInstr::isBitcast()) with a COPY this is not legal if any of the
users uses SUBREG_TO_REG to assert the upper bits of the result are
zero.

Differential Revision: https://reviews.llvm.org/D28474

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291483 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDrive by typo fix
Matthias Braun [Mon, 9 Jan 2017 21:38:14 +0000 (21:38 +0000)]
Drive by typo fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291482 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMachineInstr: Print name for subreg index in SUBREG_TO_REG
Matthias Braun [Mon, 9 Jan 2017 21:38:10 +0000 (21:38 +0000)]
MachineInstr: Print name for subreg index in SUBREG_TO_REG

SUBREG_TO_REG takes a subregister index as 3rd operand, print the name
instead of a number. We already do the same for INSERT_SUBREG and
REG_SEQUENCE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291481 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTarWriter: Set "00" to Ustar version field.
Rui Ueyama [Mon, 9 Jan 2017 21:20:42 +0000 (21:20 +0000)]
TarWriter: Set "00" to Ustar version field.

Most (maybe all?) tar commands can handle tar archives with blank
version fields, but POSIX requires "00" to be set to the field, so
doing it is good for compliance.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291479 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r291092 because it introduces a crash.
Michael Kuperstein [Mon, 9 Jan 2017 21:04:46 +0000 (21:04 +0000)]
Revert r291092 because it introduces a crash.

See PR31589 for details.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291478 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoX86-specific path: Implemented the fusing of MUL+ADDSUB to FMADDSUB.
Vyacheslav Klochkov [Mon, 9 Jan 2017 20:26:17 +0000 (20:26 +0000)]
X86-specific path: Implemented the fusing of MUL+ADDSUB to FMADDSUB.
Differential Revision: https://reviews.llvm.org/D28087

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291473 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] add test to show missed fold using llvm.assume; NFC
Sanjay Patel [Mon, 9 Jan 2017 20:18:30 +0000 (20:18 +0000)]
[InstCombine] add test to show missed fold using llvm.assume; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291472 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[ObjectYAML] Support for DWARF line tables"
Chris Bieneman [Mon, 9 Jan 2017 20:04:55 +0000 (20:04 +0000)]
Revert "[ObjectYAML] Support for DWARF line tables"

This reverts commit r291470 due to failing bots:

http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/47209/steps/test_llvm/logs/stdio

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291471 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ObjectYAML] Support for DWARF line tables
Chris Bieneman [Mon, 9 Jan 2017 20:01:37 +0000 (20:01 +0000)]
[ObjectYAML] Support for DWARF line tables

This patch adds support for the DWARF debug_lines section. The line table state machine opcodes are preserved, so this can be used to test the state machine evaluation directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291470 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] regenerate checks; NFC
Sanjay Patel [Mon, 9 Jan 2017 19:43:26 +0000 (19:43 +0000)]
[InstCombine] regenerate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291469 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ValueTracking] regenerate checks; NFC
Sanjay Patel [Mon, 9 Jan 2017 19:31:20 +0000 (19:31 +0000)]
[ValueTracking] regenerate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291468 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix function regex in update_tests so it can handle {}'s in function args
Daniel Berlin [Mon, 9 Jan 2017 19:24:19 +0000 (19:24 +0000)]
Fix function regex in update_tests so it can handle {}'s in function args

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291467 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] regenerate checks; NFC
Sanjay Patel [Mon, 9 Jan 2017 19:18:46 +0000 (19:18 +0000)]
[InstCombine] regenerate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291464 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] remove unnecessary attribute comments from test files; NFC
Sanjay Patel [Mon, 9 Jan 2017 19:13:38 +0000 (19:13 +0000)]
[InstCombine] remove unnecessary attribute comments from test files; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291463 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LV] Fix-up external IV users after updating dominator tree
Matthew Simpson [Mon, 9 Jan 2017 19:05:29 +0000 (19:05 +0000)]
[LV] Fix-up external IV users after updating dominator tree

This patch delays the fix-up step for external induction variable users until
after the dominator tree has been properly updated. This should fix PR30742.
The SCEVExpander in InductionDescriptor::transform can generate code in the
wrong location if the dominator tree is not up-to-date. We should work towards
keeping the dominator tree up-to-date throughout the transformation.

Reference: https://llvm.org/bugs/show_bug.cgi?id=30742
Differential Revision: https://reviews.llvm.org/D28168

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291462 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Add Assert[SZ]Ext during argument load creation
Matt Arsenault [Mon, 9 Jan 2017 18:52:39 +0000 (18:52 +0000)]
AMDGPU: Add Assert[SZ]Ext during argument load creation

For i16 zeroext arguments when i16 was a legal type, the
known bits information from the truncate was lost. Insert
a zeroext so the known bits optimizations work with the 32-bit
loads.

Fixes code quality regressions vs. SI in min.ll test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291461 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReapply r291025 ("AMDGPU: Remove unneccessary intermediate vector")
Matt Arsenault [Mon, 9 Jan 2017 18:44:11 +0000 (18:44 +0000)]
Reapply r291025 ("AMDGPU: Remove unneccessary intermediate vector")

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291460 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIntrinsic::Bitreverse is safe to speculate
Xin Tong [Mon, 9 Jan 2017 17:57:08 +0000 (17:57 +0000)]
Intrinsic::Bitreverse is safe to speculate

Summary: Intrinsic::Bitreverse is safe to speculate

Reviewers: hfinkel, mkuper, arsenm, jmolloy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28471

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291456 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoIn the below scenario, we must be able to skip the a DBG_VALUE instruction and
Sumanth Gundapaneni [Mon, 9 Jan 2017 17:45:02 +0000 (17:45 +0000)]
In the below scenario, we must be able to skip the a DBG_VALUE instruction and
remove the dead store.

%vreg0<def> = L2_loadri_io <fi#15>, 0; mem:LD4[%dataF](align=4)
DBG_VALUE %vreg0, %noreg, !"dataF", <!184>; IntRegs:%vreg0
S2_storeri_io <fi#15>, 0, %vreg0; mem:ST4[%dataF]

In reality, this kind of stores are eliminated before Stack Slot Coloring pass,
possibly in instruction lowering

Differential Revision: https://reviews.llvm.org/D26616

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291455 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX512] Enable v16i8/v32i8 vector shifts to use an extend+shift+truncate pattern.
Simon Pilgrim [Mon, 9 Jan 2017 17:20:03 +0000 (17:20 +0000)]
[X86][AVX512] Enable v16i8/v32i8 vector shifts to use an extend+shift+truncate pattern.

Use the existing AVX2 v8i16 vector shift lowering for v16i8 (extending to v16i32) on AVX512 targets and v32i8 (extending to v32i16) on AVX512BW targets.

Cost model updates to follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291451 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix comment typos; NFC
Sanjay Patel [Mon, 9 Jan 2017 16:27:56 +0000 (16:27 +0000)]
fix comment typos; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291447 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX512DQ] Enable v16i16 vector shifts to use an extend+shift+truncate pattern.
Simon Pilgrim [Mon, 9 Jan 2017 15:15:45 +0000 (15:15 +0000)]
[X86][AVX512DQ] Enable v16i16 vector shifts to use an extend+shift+truncate pattern.

Use the existing AVX2 v8i16 vector shift lowering for v16i16 on AVX512 targets (AVX512BW will have already have lowered with vpsravw).

Cost model updates to follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291445 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX512DQ] Added AVX512DQ to 128/256 bit vector shift tests
Simon Pilgrim [Mon, 9 Jan 2017 14:36:09 +0000 (14:36 +0000)]
[X86][AVX512DQ] Added AVX512DQ to 128/256 bit vector shift tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291444 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[IR] Adding const_value_op_iterator for IR/User.h
Mohammed Agabaria [Mon, 9 Jan 2017 14:00:57 +0000 (14:00 +0000)]
[IR] Adding const_value_op_iterator for IR/User.h

const value op iterator is missing from User.h class.

Differential Revision: https://reviews.llvm.org/D28464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291443 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSome formatting in TargetMachineC. NFC
Amaury Sechet [Mon, 9 Jan 2017 13:54:51 +0000 (13:54 +0000)]
Some formatting in TargetMachineC. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291442 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SelectionDAG] Fix in legalization of UMAX/SMAX/UMIN/SMIN. Solves PR31486.
Bjorn Pettersson [Mon, 9 Jan 2017 12:03:50 +0000 (12:03 +0000)]
[SelectionDAG] Fix in legalization of UMAX/SMAX/UMIN/SMIN. Solves PR31486.

Summary:
Originally

 i64 = umax t8, Constant:i64<4>

was expanded into

 i32,i32 = umax Constant:i32<0>, Constant:i32<0>
 i32,i32 = umax t7, Constant:i32<4>

Now instead the two produced umax:es return i32 instead of i32, i32.

Thanks to Jan Vesely for help with the test case.

Patch by mikael.holmen at ericsson.com

Reviewers: bogner, jvesely, tstellarAMD, arsenm

Subscribers: test, wdng, RKSimon, arsenm, nhaehnle, llvm-commits

Differential Revision: https://reviews.llvm.org/D28135

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291441 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRuntimeDyldELF: add missing test cases for AArch64
Eugene Leviant [Mon, 9 Jan 2017 11:47:33 +0000 (11:47 +0000)]
RuntimeDyldELF: add missing test cases for AArch64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291438 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix MSVC build failure introduced in r291431
Pavel Labath [Mon, 9 Jan 2017 11:20:35 +0000 (11:20 +0000)]
Fix MSVC build failure introduced in r291431

MSVC does not like to reinterpret_cast to a uint64_t. Use a different cast
instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291435 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRuntimeDyldELF: don't create thunk if not needed
Eugene Leviant [Mon, 9 Jan 2017 09:56:31 +0000 (09:56 +0000)]
RuntimeDyldELF: don't create thunk if not needed

This patch doesn't create thunk for branch operation when following conditions are met:
- Architecture is AArch64
- Relocation target is in the same object file
- Relocation target is close enough to be encoded in immediate offset

In such case we branch directly to the target instead of branching to thunk

Differential revision: https://reviews.llvm.org/D28108

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291431 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM] Teach SCEV to invalidate itself when its dependencies become
Chandler Carruth [Mon, 9 Jan 2017 07:44:34 +0000 (07:44 +0000)]
[PM] Teach SCEV to invalidate itself when its dependencies become
invalid.

This fixes use-after-free bugs that will arise with any interesting use
of SCEV.

I've added a dedicated test that works diligently to trigger these kinds
of bugs in the new pass manager and also checks for them explicitly as
well as triggering ASan failures when things go squirly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291426 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Fix the opcode values for i64.eq and i64.ne.
Dan Gohman [Mon, 9 Jan 2017 06:21:28 +0000 (06:21 +0000)]
[WebAssembly] Fix the opcode values for i64.eq and i64.ne.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291424 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unused method in LoopVectorize.cpp.
Jonas Paulsson [Mon, 9 Jan 2017 06:13:21 +0000 (06:13 +0000)]
Remove unused method in LoopVectorize.cpp.

computeInterleaveCount() is not defined/used and is therefore removed.

Review: Davide Italiano

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291423 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNewGVN: Fix PR 31573, a failure to verify memory congruency due to
Daniel Berlin [Mon, 9 Jan 2017 05:34:29 +0000 (05:34 +0000)]
NewGVN: Fix PR 31573, a failure to verify memory congruency due to
not excluding ourselves when checking if any equivalent stores
exist.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291421 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNewGVN: Change a std::vector to SmallVector and cleanup naming.
Daniel Berlin [Mon, 9 Jan 2017 05:34:19 +0000 (05:34 +0000)]
NewGVN: Change a std::vector to SmallVector and cleanup naming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291420 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Change another pattern that was using BLENDM to use masked moves. A future...
Craig Topper [Mon, 9 Jan 2017 04:19:34 +0000 (04:19 +0000)]
[AVX-512] Change another pattern that was using BLENDM to use masked moves. A future patch will conver it back to BLENDM if its beneficial to register allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291419 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of...
Craig Topper [Mon, 9 Jan 2017 02:44:34 +0000 (02:44 +0000)]
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.

Previously we emitted a VPTERNLOG and a separate masked move.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291415 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDefine sys::path::convert_to_slash
Rui Ueyama [Mon, 9 Jan 2017 01:47:15 +0000 (01:47 +0000)]
Define sys::path::convert_to_slash

This patch moves convertToUnixPathSeparator from LLD to LLVM.

Differential Revision: https://reviews.llvm.org/D28444

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291414 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCommandLine option: Relax the assertion introduced in r290467 to allows for empty...
Mehdi Amini [Sun, 8 Jan 2017 22:30:43 +0000 (22:30 +0000)]
CommandLine option: Relax the assertion introduced in r290467 to allows for empty string

This is used in LDC for custom boolean commandline options, setArgStr
is called with an empty string before using AddLiteralOption.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291406 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MemDep] NFC walk invariant.group graph only down
Piotr Padlewski [Sun, 8 Jan 2017 22:26:06 +0000 (22:26 +0000)]
[MemDep] NFC walk invariant.group graph only down

Summary:
By using stripPointerCasts we can get to the root
value and then walk down the bitcast graph

Reviewers: reames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28181

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291405 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LCSSA] Fix some typos. NFCI.
Davide Italiano [Sun, 8 Jan 2017 22:22:09 +0000 (22:22 +0000)]
[LCSSA] Fix some typos. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291404 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] If avx512dq is available use vpmovm2d/vpmovm2q instead of vselect of zeroes...
Craig Topper [Sun, 8 Jan 2017 21:32:30 +0000 (21:32 +0000)]
[AVX-512] If avx512dq is available use vpmovm2d/vpmovm2q instead of vselect of zeroes/ones when handling sign extends of i1 without VLX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291402 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add avx512bw and avx512dq command lines to the vector compare results test.
Craig Topper [Sun, 8 Jan 2017 21:32:26 +0000 (21:32 +0000)]
[X86] Add avx512bw and avx512dq command lines to the vector compare results test.

This is preparation for improving a case with avx512dq.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291401 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SCCP] Unknown instructions are sent to overdefined anyway. NFCI.
Davide Italiano [Sun, 8 Jan 2017 21:19:05 +0000 (21:19 +0000)]
[SCCP] Unknown instructions are sent to overdefined anyway. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291400 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Orc][RPC] Lock the pending results data structure when installing new result
Lang Hames [Sun, 8 Jan 2017 20:09:35 +0000 (20:09 +0000)]
[Orc][RPC] Lock the pending results data structure when installing new result
handlers, make abandonPendingResults public API.

This should make installing asynchronous result handlers thread safe.

The abandonPendingResults method is made public so that clients can disconnect
from a remote even if they have asynchronous handlers awaing results from that
remote. The asynchronous handlers will all receive "abandoned result" errors as
their argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291399 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm-objdump: speed up -objc-meta-data
Saleem Abdulrasool [Sun, 8 Jan 2017 19:14:15 +0000 (19:14 +0000)]
llvm-objdump: speed up -objc-meta-data

Running a Debug build of objdump -objc-meta-data with a large Mach-O file is
currently unnecessarily slow.

With some local test input, this change reduces the run time from 75-85s down
to 15-20s.

The two changes are:
  Assert on pointer equality not array equality
  Replace vector<pair<address, symbol>> with DenseMap<address, symbol>

Additionally, use a std::unique_ptr rather than handling the memory manually.

Patch by Dave Lee!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291398 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoStrip trailing whitespace.
Simon Pilgrim [Sun, 8 Jan 2017 18:37:42 +0000 (18:37 +0000)]
Strip trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291395 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agounittest: remove extraneous ';'
Saleem Abdulrasool [Sun, 8 Jan 2017 18:36:49 +0000 (18:36 +0000)]
unittest: remove extraneous ';'

Silences a warning from gcc:6.  NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291394 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix line endings and strip trailing whitespace.
Simon Pilgrim [Sun, 8 Jan 2017 16:45:39 +0000 (16:45 +0000)]
Fix line endings and strip trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291393 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] fix usage of stale operands when lowering select
Sanjay Patel [Sun, 8 Jan 2017 15:53:40 +0000 (15:53 +0000)]
[x86] fix usage of stale operands when lowering select

I noticed this problem as part of the ongoing attempt to canonicalize min/max ops in IR.

The debug output shows nodes like this:

t4: i32 = xor t2, Constant:i32<-1>
    t21: i8 = setcc t4, Constant:i32<0>, setlt:ch
  t14: i32 = select t21, t4, Constant:i32<-1>

And because the select is holding onto the t4 (xor) node while EmitTest creates a new
x86-specific xor node, the lowering results in:

  t4: i32 = xor t2, Constant:i32<-1>
  t25: i32,i32 = X86ISD::XOR t2, Constant:i32<-1>
t28: i32,glue = X86ISD::CMOV Constant:i32<-1>, t4, Constant:i8<15>, t25:1

Differential Revision: https://reviews.llvm.org/D28374

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291392 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Fixed vXi8 uniform shift costs.
Simon Pilgrim [Sun, 8 Jan 2017 14:14:36 +0000 (14:14 +0000)]
[CostModel][X86] Fixed vXi8 uniform shift costs.

The 'fast' costs should only work for shifts by uniform constants (uniform non-constant are lowered using the slow default implementation).

Logical shifts were not taking into account that we must mask the psrlw result, so the costs needed to be doubled.

Added missing AVX2/AVX512BW costs as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291391 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Moved legal uniform shift costs earlier.
Simon Pilgrim [Sun, 8 Jan 2017 13:12:03 +0000 (13:12 +0000)]
[CostModel][X86] Moved legal uniform shift costs earlier.

XOP was prematurely matching, doubling the cost of ashr/lshr uniform shifts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291390 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Remove redundant patterns that select unaligned moves with zero masking...
Craig Topper [Sun, 8 Jan 2017 05:46:21 +0000 (05:46 +0000)]
[AVX-512] Remove redundant patterns that select unaligned moves with zero masking for patterns that already use the aligned form. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291383 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Orc][RPC] Fix typo.
Lang Hames [Sun, 8 Jan 2017 02:27:30 +0000 (02:27 +0000)]
[Orc][RPC] Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291381 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Orc][RPC] Add an APICalls utility for grouping RPC funtions for registration.
Lang Hames [Sun, 8 Jan 2017 01:13:47 +0000 (01:13 +0000)]
[Orc][RPC] Add an APICalls utility for grouping RPC funtions for registration.

APICalls allows groups of functions to be composed into an API that can be
registered as a unit with an RPC endpoint. Doing registration on a-whole API
basis (rather than per-function) allows missing API functions to be detected
early.

APICalls also allows Function membership to be tested at compile-time. This
allows clients to write static assertions that functions to be called are
members of registered APIs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291380 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Fix lazy-loading of Metadata attachment, which left some Fwd ref behind
Mehdi Amini [Sun, 8 Jan 2017 00:44:45 +0000 (00:44 +0000)]
[ThinLTO] Fix lazy-loading of Metadata attachment, which left some Fwd ref behind

The change in r291362 was too agressive. We still need to flush at the
end of the block because function local metadata can introduce fwd
ref as well.
(Bootstrap with ThinLTO was broken)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291379 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Expected<> return values need to be handled to avoid an assertion
Mehdi Amini [Sun, 8 Jan 2017 00:30:27 +0000 (00:30 +0000)]
[ThinLTO] Expected<> return values need to be handled to avoid an assertion

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291377 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Orc][RPC] Add a class-method version of addHandler to MultiThreadedRPCEndpoint.
Lang Hames [Sun, 8 Jan 2017 00:18:51 +0000 (00:18 +0000)]
[Orc][RPC] Add a class-method version of addHandler to MultiThreadedRPCEndpoint.

This brings MultiThreadedRPCEndpoint's addHandler API in-line with
SingleThreadedRPCEndpoint's.

This will be tested in an up-coming unit-test for MultiThreadedRPCEndpoint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291376 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVR] Implement TargetLoweing::getRegisterByName
Dylan McKay [Sat, 7 Jan 2017 23:39:47 +0000 (23:39 +0000)]
[AVR] Implement TargetLoweing::getRegisterByName

This allows the use of the 'read_register' intrinsics used by clang's
named register globals features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291375 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Orc][RPC] Rename Single/MultiThreadedRPC to Single/MultithreadedRPCEndpoint.
Lang Hames [Sat, 7 Jan 2017 22:48:12 +0000 (22:48 +0000)]
[Orc][RPC] Rename Single/MultiThreadedRPC to Single/MultithreadedRPCEndpoint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291374 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Orc][RPC] Remove a redundant 'if' statement.
Lang Hames [Sat, 7 Jan 2017 22:27:52 +0000 (22:27 +0000)]
[Orc][RPC] Remove a redundant 'if' statement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291373 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Update SSE41/AVX1 vXi32 SHL costs
Simon Pilgrim [Sat, 7 Jan 2017 22:27:43 +0000 (22:27 +0000)]
[CostModel][X86] Update SSE41/AVX1 vXi32 SHL costs

SSE41 provides pmulld which allows the simpler pslld/paddd/cvttps2dq/pmulld pattern than SSE2's use of pmuludq.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291372 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant...
Craig Topper [Sat, 7 Jan 2017 22:20:34 +0000 (22:20 +0000)]
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.

We should probably teach the two address instruction pass to turn masked moves into BLENDM when its beneficial to the register allocator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291371 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Regenerate a test to remove tab characters.
Craig Topper [Sat, 7 Jan 2017 22:20:28 +0000 (22:20 +0000)]
[X86] Regenerate a test to remove tab characters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291370 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Remove patterns from masked broadcast versions of BLENDM instructions.
Craig Topper [Sat, 7 Jan 2017 22:20:26 +0000 (22:20 +0000)]
[AVX-512] Remove patterns from masked broadcast versions of BLENDM instructions.

All but (v2f64 broadcast f64) are handled with VBROADCAST instructions. The v2f64 version can be handled with VMOVDDUP.

We may want to consider converting to BLENDM instructions in the two address instruction pass if its beneficial to register allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291369 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVX-512] Add masked forms of the alternate MOVDDUP patterns.
Craig Topper [Sat, 7 Jan 2017 22:20:23 +0000 (22:20 +0000)]
[AVX-512] Add masked forms of the alternate MOVDDUP patterns.

I'm not too sure how to get isel to select even all of the unmasked forms, but at least we have a consistent set now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291368 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Fix AVX2 v16i16 shift 'splat' costs.
Simon Pilgrim [Sat, 7 Jan 2017 22:08:09 +0000 (22:08 +0000)]
[CostModel][X86] Fix AVX2 v16i16 shift 'splat' costs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291366 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Match 256-bit vector shift 'splat' costs for AVX2 and above
Simon Pilgrim [Sat, 7 Jan 2017 21:47:10 +0000 (21:47 +0000)]
[CostModel][X86] Match 256-bit vector shift 'splat' costs for AVX2 and above

We were matching against general vector shift costs before the uniform splat costs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291365 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Generalized cost calculation of SHL by constant -> MUL conversion.
Simon Pilgrim [Sat, 7 Jan 2017 21:33:00 +0000 (21:33 +0000)]
[CostModel][X86] Generalized cost calculation of SHL by constant -> MUL conversion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291364 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX2] Regenerate arithmetic tests
Simon Pilgrim [Sat, 7 Jan 2017 20:38:36 +0000 (20:38 +0000)]
[X86][AVX2] Regenerate arithmetic tests

Fixed missing checks for tests that used a '-' in the name, which was messing with update_llc_test_checks.py

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291363 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Fix assertions on lazy-loading of Metadata TBAA attachments
Mehdi Amini [Sat, 7 Jan 2017 20:24:23 +0000 (20:24 +0000)]
[ThinLTO] Fix assertions on lazy-loading of Metadata TBAA attachments

Summary:
The issue happens with:

 %0 = ....., !tbaa !0
 %1 = ....., !tbaa !1

With !0 that references !1.

In this case when loading !0 we generates a temporary for the
operand !1. We now flush it immediately and trigger the load of
!1 before moving on. If we don't we get the temporary when
attaching to %1. This is usually not an issue except that we
eagerly try to update TBAA MDNodes, which is obviously not possible
if we only have a temporary.

Differential Revision: https://reviews.llvm.org/D28423

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291362 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-opt-report] Fix context-sensitive lines where nothing happened
Hal Finkel [Sat, 7 Jan 2017 20:21:17 +0000 (20:21 +0000)]
[llvm-opt-report] Fix context-sensitive lines where nothing happened

Don't print a line multiple times, each for different inlining contexts, if
nothing happened in any context. This prevents situations like this:

 [[
  > main:
 65     |       if ((i * ni + j) % 20 == 0) fprintf
  > print_array:
 65     |       if ((i * ni + j) % 20 == 0) fprintf
 ]]

which could happen if different optimizations were missed in different inlining
contexts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291361 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSimplifyLibCalls: Remove incorrect optimization of fabs
Matt Arsenault [Sat, 7 Jan 2017 19:55:12 +0000 (19:55 +0000)]
SimplifyLibCalls: Remove incorrect optimization of fabs

fabs(x * x) is not generally safe to assume x is positive if x is a NaN.
This is also less general than it could be, so this will be replaced
with a transformation on the intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291359 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUpdate update_test_checks to work properly with phi nodes and other fun things.
Daniel Berlin [Sat, 7 Jan 2017 19:04:59 +0000 (19:04 +0000)]
Update update_test_checks to work properly with phi nodes and other fun things.

Summary:
Prior to this change, phi nodes were never considered defs, and so we ended up with undefined variables for any loop.  Now, instead of trying to find just defs, we iterate over each actual IR value in the line, and replace them one by one with either a definition or a use.

We also don't try to match anything in the comment portions of the line.

I've tested it even on things like function pointer calls, etc, and against existing test cases uses update_test_checks
With this change, we are able to use update_tests on the cyclic cases in newgvn.

The only case i'm aware of that will misfire is if you have a string with which contains a valid token.
However, this is the same as it is now, with a slightly larger set of strings that may misfire.
Prior to this change, a test with the string " %a =" would be replaced.

Reviewers: spatel, chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28384

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291357 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Bitcode] Remove unused PlaceHolder parameter to lazyLoadModuleMetadataBlock()
Mehdi Amini [Sat, 7 Jan 2017 18:31:38 +0000 (18:31 +0000)]
[Bitcode] Remove unused PlaceHolder parameter to lazyLoadModuleMetadataBlock()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291356 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Merge separate AVX1 cost LUTs. NFCI.
Simon Pilgrim [Sat, 7 Jan 2017 18:19:25 +0000 (18:19 +0000)]
[CostModel][X86] Merge separate AVX1 cost LUTs. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291355 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][AVX512BW] Add v32i16 vector shift costs for avx512bw targets.
Simon Pilgrim [Sat, 7 Jan 2017 17:54:10 +0000 (17:54 +0000)]
[CostModel][AVX512BW] Add v32i16 vector shift costs for avx512bw targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291354 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Added missing AVX2 arithmetic costs.
Simon Pilgrim [Sat, 7 Jan 2017 17:27:39 +0000 (17:27 +0000)]
[CostModel][X86] Added missing AVX2 arithmetic costs.

Allows us to correctly fall through to the lower AVX1 costs if look up failed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291353 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CostModel][X86] Reordered AVX1 arithmetic cost LUT into descending target order...
Simon Pilgrim [Sat, 7 Jan 2017 17:03:51 +0000 (17:03 +0000)]
[CostModel][X86] Reordered AVX1 arithmetic cost LUT into descending target order. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291352 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNewGVN: Make sure we properly lookup operand leaders while creating
Daniel Berlin [Sat, 7 Jan 2017 16:55:14 +0000 (16:55 +0000)]
NewGVN: Make sure we properly lookup operand leaders while creating
congruence classes for stores, and then keep them up to date.  Add
testcases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291351 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][AVX512] Use lowerShuffleAsRepeatedMaskAndLanePermute for non-VBMI v64i8 shuffle...
Simon Pilgrim [Sat, 7 Jan 2017 15:37:50 +0000 (15:37 +0000)]
[X86][AVX512] Use lowerShuffleAsRepeatedMaskAndLanePermute for non-VBMI v64i8 shuffles (PR31470)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291347 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTarWriter: Use fitsInUstar function.
Rui Ueyama [Sat, 7 Jan 2017 08:32:07 +0000 (08:32 +0000)]
TarWriter: Use fitsInUstar function.

This change should have been commit as part of r291340.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291341 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTarWriter: Use Ustar header's "prefix" field to store long filenames.
Rui Ueyama [Sat, 7 Jan 2017 08:28:56 +0000 (08:28 +0000)]
TarWriter: Use Ustar header's "prefix" field to store long filenames.

Tar's Ustar header has the "prefix" field to store a directory
part of a filename. It is not as flexible as the PAX-extended
filename because there's still a limitation on the maximum filename
size, but it mitigates the situation.

This patch should unbreak some Windows buildbots that uses very
old tar command.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291340 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Disable load unfolding for 128-bit MOVDDUP instructions since the load size...
Craig Topper [Sat, 7 Jan 2017 06:56:54 +0000 (06:56 +0000)]
[X86] Disable load unfolding for 128-bit MOVDDUP instructions since the load size is smaller than the register size so unfolding would increase the load size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291338 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a typo. NFC
Xin Tong [Sat, 7 Jan 2017 04:30:58 +0000 (04:30 +0000)]
Fix a typo. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291335 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNewGVN: Reformat and fix a few newlines
Daniel Berlin [Sat, 7 Jan 2017 03:23:47 +0000 (03:23 +0000)]
NewGVN: Reformat and fix a few newlines

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291334 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[NewGVN] Prefer auto over explicit type. NFCI.
Davide Italiano [Sat, 7 Jan 2017 02:05:50 +0000 (02:05 +0000)]
[NewGVN] Prefer auto over explicit type. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291328 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Don't abort on code with UB.
Dan Gohman [Sat, 7 Jan 2017 01:50:01 +0000 (01:50 +0000)]
[WebAssembly] Don't abort on code with UB.

Gracefully leave code that performs function-pointer bitcasts implying
non-trivial pointer conversions alone, rather than aborting, since it's
just undefined behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291326 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Move a SmallVector to a more specific scope. NFC.
Dan Gohman [Sat, 7 Jan 2017 01:31:18 +0000 (01:31 +0000)]
[WebAssembly] Move a SmallVector to a more specific scope. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291324 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLowerTypeTests: Thread summary and action from the API and command line into the...
Peter Collingbourne [Sat, 7 Jan 2017 01:17:24 +0000 (01:17 +0000)]
LowerTypeTests: Thread summary and action from the API and command line into the pass.

Also move command line handling out of the pass constructor and into
a separate function.

Differential Revision: https://reviews.llvm.org/D28422

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291323 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove useless Forward Declaration from header (NFC)
Mehdi Amini [Sat, 7 Jan 2017 00:57:43 +0000 (00:57 +0000)]
Remove useless Forward Declaration from header (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291321 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AVR] Parenthesize a boolean expression
Dylan McKay [Sat, 7 Jan 2017 00:55:28 +0000 (00:55 +0000)]
[AVR] Parenthesize a boolean expression

Without the parentheses, clang would emit warnings while compiling the
code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291320 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MachineBasicBlock] Add a non-assert live-in accessor for debug mode.
Quentin Colombet [Sat, 7 Jan 2017 00:46:30 +0000 (00:46 +0000)]
[MachineBasicBlock] Add a non-assert live-in accessor for debug mode.

With r291169, it is now not possible to access the live-in information
when the liveness is not properly tracked. Although this is want we want
in general, for debugging purpose we may want to still be able to
traverse this information even if it may not be accurate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291317 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Add a pass to create wrappers for function bitcasts.
Dan Gohman [Sat, 7 Jan 2017 00:34:54 +0000 (00:34 +0000)]
[WebAssembly] Add a pass to create wrappers for function bitcasts.

WebAssembly requires caller and callee signatures to match exactly. In LLVM,
there are a variety of circumstances where signatures may be mismatched in
practice, and one can bitcast a function address to another type to call it
as that type. This patch adds a pass which replaces bitcasted function
addresses with wrappers to replace the bitcasts.

This doesn't catch everything, but it does match many common cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291315 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTest commit. Comment formatting, it's -> its.
Jacob Gravelle [Sat, 7 Jan 2017 00:22:31 +0000 (00:22 +0000)]
Test commit. Comment formatting, it's -> its.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291312 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNewGVN: Fix PR 31501.
Daniel Berlin [Sat, 7 Jan 2017 00:01:42 +0000 (00:01 +0000)]
NewGVN: Fix PR 31501.

Summary: LLVM's non-standard notion of phi nodes means we can't both try to substitute for undef in phi nodes *and* use phi nodes as leaders all the time. This changes NewGVN to use the same semantics as SimplifyPHINode to decide which phi nodes are equivalent.

Reviewers: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28312

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291308 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoModuleSummaryIndexYAML: Make a few fields optional to make it easier to write tests.
Peter Collingbourne [Sat, 7 Jan 2017 00:00:22 +0000 (00:00 +0000)]
ModuleSummaryIndexYAML: Make a few fields optional to make it easier to write tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291307 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Handle conflicting local names gracefully
Teresa Johnson [Fri, 6 Jan 2017 23:38:41 +0000 (23:38 +0000)]
[ThinLTO] Handle conflicting local names gracefully

Summary:
r285871 introduced an assert that was overly aggressive in the case
of a same-named local in different same-named files (in different
directories), where the source name and therefore the GUID ended up
the same because the files were compiled in their own directory without
any leading path. Change the handling in the promotion logic to get
the summary for the version in that module.

This also exposed an issue where we are not always importing the
right copy, which is a performance not correctness issue (because
the renaming is based on the module hash which must be different,
see the bug report for details). I will fix that as a follow-on.

Fixes PR31561.

Reviewers: mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28411

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291304 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ThinLTO] Optionally ignore empty index file
Teresa Johnson [Fri, 6 Jan 2017 23:37:17 +0000 (23:37 +0000)]
[ThinLTO] Optionally ignore empty index file

Summary:
In order to simplify distributed build system integration, where actions
may be scheduled before the Thin Link which determines the list of
objects selected by the linker. The gold plugin currently will emit
0-sized index files for objects not selected by the link, to enable
checking for expected output files by the build system. If the build
system then schedules a backend action for these bitcode files, we want
to be able to fall back to normal compilation instead of failing.

This is the LLVM side support for optionally enabling fallback
instead of issuing an error. Return a null CombinedIndex from
llvm::getModuleSummaryIndexForFile under the option when the file
is empty. Clang can then ignore the index when it is null.

Clang patch is D28362.

Reviewers: mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D28410

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291302 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PM] Edit comments on PM Proxy and utility classes.
Justin Lebar [Fri, 6 Jan 2017 23:32:02 +0000 (23:32 +0000)]
[PM] Edit comments on PM Proxy and utility classes.

Reviewers: chandlerc

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D27502

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291301 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[gtest] Detect warning flags using the positive spelling.
Chandler Carruth [Fri, 6 Jan 2017 23:16:00 +0000 (23:16 +0000)]
[gtest] Detect warning flags using the positive spelling.

Some GCC versions will accept any warning flag name after a '-Wno-',
which would cause us to try to disable warnings with names GCC didn't
understand. This will silently succeed unless there is some other output
from GCC in which case we get weird cc1plus warnings about the warning
name being bogus.

There is still the issue that gtest sets warning flags for building
gtest-all.cc using weird 'add_definitions' and the fact that there is
a GCC version which warns on the variadic macro usage in gtest under
-pedantic, but has no flag analogous to Clang's
-Wgnu-zero-variadic-macro-argumnets to suppress this warning. I haven't
been able to come up with any good solution here. The closest is to turn
off -pedantic for those versions of GCC, but that seems really nasty.
For now, those versinos of GCC aren't warning clean. If anyone is broken
by this, I'll work on CMake logic to detect and disable -pedantic in
these cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@291299 91177308-0d34-0410-b5e6-96231b3b80d8