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llvm
8 years ago[X86][AVX512] Add support for lowering shuffles to MOVDDUP/MOVSLDUP/MOVSHDUP
Simon Pilgrim [Sat, 2 Jul 2016 12:45:03 +0000 (12:45 +0000)]
[X86][AVX512] Add support for lowering shuffles to MOVDDUP/MOVSLDUP/MOVSHDUP

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274436 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][AVX512] Add test cases that should lower to MOVSLDUP/MOVSHDUP
Simon Pilgrim [Sat, 2 Jul 2016 12:20:35 +0000 (12:20 +0000)]
[X86][AVX512] Add test cases that should lower to MOVSLDUP/MOVSHDUP

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274435 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[X86][AVX512] Add fast-isel shuffle tests
Simon Pilgrim [Sat, 2 Jul 2016 12:13:29 +0000 (12:13 +0000)]
[X86][AVX512] Add fast-isel shuffle tests

Its not worth trying to write out tests for all the avx512f builtins yet, just adding tests for lowering of generic IR as we transition to it (shuffles mainly right now).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274434 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUse arrays or initializer lists to feed ArrayRefs instead of SmallVector where possible.
Benjamin Kramer [Sat, 2 Jul 2016 11:41:39 +0000 (11:41 +0000)]
Use arrays or initializer lists to feed ArrayRefs instead of SmallVector where possible.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274431 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[esan|cfrag] Add counters for struct array accesses
Qin Zhao [Sat, 2 Jul 2016 03:25:37 +0000 (03:25 +0000)]
[esan|cfrag] Add counters for struct array accesses

Summary:
Adds one counter to the struct counter array for counting struct
array accesses.

Adds instrumentation to insert counter update for struct array
accesses.

Reviewers: aizatsky

Subscribers: llvm-commits, bruening, eugenis, kcc, zhaoqin, vitalybuka

Differential Revision: http://reviews.llvm.org/D21594

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274420 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[SystemZ] Move misplaced SystemZ::TDC to non-memory opcode range.
Marcin Koscielnicki [Sat, 2 Jul 2016 02:20:40 +0000 (02:20 +0000)]
[SystemZ] Move misplaced SystemZ::TDC to non-memory opcode range.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274417 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd RenderScript ArchType
Pirama Arumuga Nainar [Sat, 2 Jul 2016 00:23:09 +0000 (00:23 +0000)]
Add RenderScript ArchType

Summary:
Add renderscript32 and renderscript64 ArchTypes.  This is to configure
the ABI requirement on 32-bit RenderScript that 'long' types have 64-bit
size and alignment.  64-bit RenderScript is the same as AArch64, but is
added here for completeness.

Reviewers: echristo, rsmith

Subscribers: aemerson, jfb, rampitec, dschuff, mehdi_amini, llvm-commits, srhines

Differential Revision: http://reviews.llvm.org/D21333

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274412 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PM] Port ConstantHoisting to the new Pass Manager
Michael Kuperstein [Sat, 2 Jul 2016 00:16:47 +0000 (00:16 +0000)]
[PM] Port ConstantHoisting to the new Pass Manager

Differential Revision: http://reviews.llvm.org/D21945

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274411 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[codeview] Set the Nested and Scoped ClassOptions based on the scope chain
Reid Kleckner [Sat, 2 Jul 2016 00:11:07 +0000 (00:11 +0000)]
[codeview] Set the Nested and Scoped ClassOptions based on the scope chain

These are set on both the declaration record and the definition record.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274410 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLoadStoreVectorizer: Fix warning about extra semicolon
Matt Arsenault [Fri, 1 Jul 2016 23:26:54 +0000 (23:26 +0000)]
LoadStoreVectorizer: Fix warning about extra semicolon

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274406 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTII: Fix inlineasm size counting comments as insts
Matt Arsenault [Fri, 1 Jul 2016 23:26:50 +0000 (23:26 +0000)]
TII: Fix inlineasm size counting comments as insts

The main problem was counting comments on their own
line as instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274405 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoPeepholeOptimizer: Relax assert
Matt Arsenault [Fri, 1 Jul 2016 23:15:06 +0000 (23:15 +0000)]
PeepholeOptimizer: Relax assert

Allow implicit defs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274402 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CodeView] Include the offset of nested members
David Majnemer [Fri, 1 Jul 2016 23:12:48 +0000 (23:12 +0000)]
[CodeView] Include the offset of nested members

Given something like:
  struct S {
    int a;
    struct { int b; };
  };

We would fail to give 'b' offset 4.  Instead, we would give it the
offset it has inside of it's struct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274400 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CodeView] Pretty print anonymous scopes
David Majnemer [Fri, 1 Jul 2016 23:12:45 +0000 (23:12 +0000)]
[CodeView] Pretty print anonymous scopes

A namespace without a name should be written out as `anonymous
namespace' while a tag type without a name should be written out as
<unnamed-tag>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274399 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Add feature for unaligned access
Matt Arsenault [Fri, 1 Jul 2016 23:03:44 +0000 (23:03 +0000)]
AMDGPU: Add feature for unaligned access

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274398 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Expand unaligned accesses early
Matt Arsenault [Fri, 1 Jul 2016 22:55:55 +0000 (22:55 +0000)]
AMDGPU: Expand unaligned accesses early

Due to visit order problems, in the case of an unaligned copy
the legalized DAG fails to eliminate extra instructions introduced
by the expansion of both unaligned parts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274397 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[msan] Fix __msan_maybe_ for non-standard type sizes.
Evgeniy Stepanov [Fri, 1 Jul 2016 22:49:59 +0000 (22:49 +0000)]
[msan] Fix __msan_maybe_ for non-standard type sizes.

Fix incorrect calculation of the type size for __msan_maybe_warning_N
call that resulted in an invalid (narrowing) zext instruction and
"Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed."

Only happens in very large functions (with more than 3500 MSan
checks) operating on integer types that are not power-of-two.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274395 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Improve load/store of illegal types.
Matt Arsenault [Fri, 1 Jul 2016 22:47:50 +0000 (22:47 +0000)]
AMDGPU: Improve load/store of illegal types.

There was a combine before to handle the simple copy case.
Split this into handling loads and stores separately.

We might want to change how this handles some of the vector
extloads, since this can result in large code size increases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274394 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[codeview] Don't record UDTs for anonymous structs
Reid Kleckner [Fri, 1 Jul 2016 22:24:51 +0000 (22:24 +0000)]
[codeview] Don't record UDTs for anonymous structs

MSVC makes up names for these anonymous structs, but we don't (yet).
Eventually Clang should use getTypedefNameForAnonDecl() to put some name
in the debug info, and we can update the test case when that happens.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274391 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoIR: Set TargetPrefix for some X86 and AArch64 intrinsics where it was missing
Justin Bogner [Fri, 1 Jul 2016 22:07:11 +0000 (22:07 +0000)]
IR: Set TargetPrefix for some X86 and AArch64 intrinsics where it was missing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274390 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAddress two correctness issues in LoadStoreVectorizer
Alina Sbirlea [Fri, 1 Jul 2016 21:44:12 +0000 (21:44 +0000)]
Address two correctness issues in LoadStoreVectorizer

Summary:
GetBoundryInstruction returns the last instruction as the instruction which follows or end(). Otherwise the last instruction in the boundry set is not being tested by isVectorizable().
Partially solve reordering of instructions. More extensive solution to follow.

Reviewers: tstellarAMD, llvm-commits, jlebar

Subscribers: escha, arsenm, mzolotukhin

Differential Revision: http://reviews.llvm.org/D21934

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274389 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Hexagon] Revert r274381: that was actually wrong
Krzysztof Parzyszek [Fri, 1 Jul 2016 20:45:19 +0000 (20:45 +0000)]
[Hexagon] Revert r274381: that was actually wrong

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274384 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[Hexagon] Use MachineOperand::readsReg instead of isUse
Krzysztof Parzyszek [Fri, 1 Jul 2016 20:28:30 +0000 (20:28 +0000)]
[Hexagon] Use MachineOperand::readsReg instead of isUse

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274381 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[pdb] Check the display name for <unnamed-tag>, not the linkage name
Reid Kleckner [Fri, 1 Jul 2016 18:43:29 +0000 (18:43 +0000)]
[pdb] Check the display name for <unnamed-tag>, not the linkage name

This issue was encountered on libcmt.pdb, which has a type record that
looks like this:

  Struct (0x1094) {
    TypeLeafKind: LF_STRUCTURE (0x1505)
    MemberCount: 3
    Properties [ (0x200)
      HasUniqueName (0x200)
    ]
    FieldList: <field list> (0x1093)
    DerivedFrom: 0x0
    VShape: 0x0
    SizeOf: 4
    Name: <unnamed-tag>
    LinkageName: .?AU<unnamed-tag>@@
  }

The checks for startswith/endswith "<unnamed-tag>" should look at the
display name, not the linkage name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274376 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[codeview] Assert that our CV type records are valid
Reid Kleckner [Fri, 1 Jul 2016 18:05:56 +0000 (18:05 +0000)]
[codeview] Assert that our CV type records are valid

We were asserting that our type records were valid when emitting
assembly, but not when emitting an object file.

I've been seeing lots of LNK1285 errors (corrupt PDB) during incremental
debug self-host builds with the MSVC linker, and hopefully this will
catch some of them earlier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274373 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU/SI: Enable testing several variants for si scheduler
Matt Arsenault [Fri, 1 Jul 2016 18:03:46 +0000 (18:03 +0000)]
AMDGPU/SI: Enable testing several variants for si scheduler

Enable testing different scheduling variants if sgpr usage
is very high. It was previously disabled because of a bug
in handleMove, but it has been fixed since.

Patch by Axel Davy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274372 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSpecify mtriple for the frame-order.ll test.
Dehao Chen [Fri, 1 Jul 2016 17:35:13 +0000 (17:35 +0000)]
Specify mtriple for the frame-order.ll test.

Summary: original test may have different bahavior on different bot, specifically it broke llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21931

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274368 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert r274347 "[ARM] Refactor Thumb2 mul instruction descs"
Hans Wennborg [Fri, 1 Jul 2016 17:26:42 +0000 (17:26 +0000)]
Revert r274347 "[ARM] Refactor Thumb2 mul instruction descs"

This caused PR28387: Assertion "#operands for dag node doesn't match .td file!"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274367 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoMake extract_symbols.py be compatible with Python 3
John Brawn [Fri, 1 Jul 2016 17:05:58 +0000 (17:05 +0000)]
Make extract_symbols.py be compatible with Python 3

This involved running 2to3 on it and adjusting all uses of subprocess to use
universal_newlines=True so the output is text instead of binary. It remains
compatible with Python 2.7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274365 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in RegisterCoalescer, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 16:43:13 +0000 (16:43 +0000)]
CodeGen: Use MachineInstr& in RegisterCoalescer, NFC

Remove a few more implicit iterator to pointer conversions by preferring
MachineInstr&.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274363 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agofix documentation comments; NFC
Sanjay Patel [Fri, 1 Jul 2016 16:41:59 +0000 (16:41 +0000)]
fix documentation comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274362 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Avoid implicit conversions in TargetInstrInfo, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 16:38:28 +0000 (16:38 +0000)]
CodeGen: Avoid implicit conversions in TargetInstrInfo, NFC

Avoid implicit conversions from MachineBasicBlock::iterator to
MachineInstr* in TargetInstrInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274361 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in ScheduleDAGIntrs, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 16:21:48 +0000 (16:21 +0000)]
CodeGen: Use MachineInstr& in ScheduleDAGIntrs, NFC

Use MachineInstr& to avoid implicit conversions from
MachineBasicBlock::iterator to MachineInstr*.  In one case, this could
use a range-based for loop, but the other loops iterated in reverse
order.

One of the reverse-loops checked the MachineInstr* for nullptr, a
condition that is provably unreachable.  (And even if my proof has a
flaw, UBSan would catch the bug.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274360 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoReapply "Define a module map entry for DebugInfo/CodeView."
Adrian Prantl [Fri, 1 Jul 2016 15:54:46 +0000 (15:54 +0000)]
Reapply "Define a module map entry for DebugInfo/CodeView."

This reapplies r274313 with two additional #include directives needed
when submodule visibility is enabled.

Fixes PR28384.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274358 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDo not count debug instructions when counting number of uses to reorder frame objects.
Dehao Chen [Fri, 1 Jul 2016 15:40:25 +0000 (15:40 +0000)]
Do not count debug instructions when counting number of uses to reorder frame objects.

Summary: The code generation should be independent of the debug info.

Reviewers: zansari, davidxl, mkuper, majnemer

Subscribers: majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D21911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274357 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Avoid iterator conversion in UnreachableBlockElim, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 15:13:09 +0000 (15:13 +0000)]
CodeGen: Avoid iterator conversion in UnreachableBlockElim, NFC

Avoid an unnecessary (and implicit) iterator to pointer conversion in
UnreachableBlockElim by using the post-increment operator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274355 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in SlotIndexes.cpp, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 15:08:52 +0000 (15:08 +0000)]
CodeGen: Use MachineInstr& in SlotIndexes.cpp, NFC

Avoid implicit conversions from iterator to pointer by preferring
MachineInstr& and using range-based for loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274354 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in RegAllocFast, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 15:03:37 +0000 (15:03 +0000)]
CodeGen: Use MachineInstr& in RegAllocFast, NFC

Use MachineInstr& instead of MachineInstr* in RegAllocFast to avoid
implicit conversions from MachineInstrBundleIterator.  RAFast::spillAll
and RAFast::spillVirtReg still take iterators, since their argument may
be an end iterator from MachineBasicBlock::getFirstTerminator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274353 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CMake] Add LLVM_BUILD_32_BITS to LLVMConfig.cmake
John Brawn [Fri, 1 Jul 2016 14:22:52 +0000 (14:22 +0000)]
[CMake] Add LLVM_BUILD_32_BITS to LLVMConfig.cmake

Previously out-of-tree passes could detect if LLVM was built with
LLVM_BUILD_32_BITS by looking for -m32 in LLVM_DEFINITIONS, but as of r271871
it no longer appears there. Resolve this by instead emitting LLVM_BUILD_32_BITS
in LLVMConfig so it can be checked for directly.

Differential Revision: http://reviews.llvm.org/D21434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274351 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[ARM] Refactor Thumb2 mul instruction descs
Sam Parker [Fri, 1 Jul 2016 12:55:49 +0000 (12:55 +0000)]
[ARM] Refactor Thumb2 mul instruction descs

No functional changes. Just created wrapper classes around the 3
and 4 reg mult and mac instruction classes.

Differential Revision: http://reviews.llvm.org/D21549

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274347 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agofunction_refify. NFC.
Benjamin Kramer [Fri, 1 Jul 2016 11:05:15 +0000 (11:05 +0000)]
function_refify. NFC.

While there use emplace_back to create an expensive pair.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274344 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoResubmit r268719 - AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2.
Nikolay Haustov [Fri, 1 Jul 2016 10:00:58 +0000 (10:00 +0000)]
Resubmit r268719 - AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2.
This was reverted in r268740 because of problems with corresponding Clang change.
Clang change was updated and resubmitted in r274220.

Check calling convention in AMDGPUMachineFunction::isKernel

This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF.

Also, in the future unused non-kernels may be optimized.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D19917

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274341 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[AMDGPU] Assembler: support SDWA for VOPC instructions
Sam Kolton [Fri, 1 Jul 2016 09:59:21 +0000 (09:59 +0000)]
[AMDGPU] Assembler: support SDWA for VOPC instructions

Summary: dst_sel and dst_unused disabled for VOPC as they have no effect on result

Reviewers: artem.tamazov, tstellarAMD, vpykhtin

Subscribers: arsenm, kzhuravl

Differential Revision: http://reviews.llvm.org/D21376

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274340 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoUpdate libdeps; AMDGPUCodeGen requires LLVMVectorize.
NAKAMURA Takumi [Fri, 1 Jul 2016 09:55:23 +0000 (09:55 +0000)]
Update libdeps; AMDGPUCodeGen requires LLVMVectorize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274339 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CodeGen] Cleanup getVectorShuffle a bit to take advantage of its new ArrayRef argume...
Craig Topper [Fri, 1 Jul 2016 06:54:51 +0000 (06:54 +0000)]
[CodeGen] Cleanup getVectorShuffle a bit to take advantage of its new ArrayRef argument and its begin/end iterators. Also use 'int' type for number of elements and loop iterators to remove several typecasts. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274338 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CodeGen,Target] Remove the version of DAG.getVectorShuffle that takes a pointer...
Craig Topper [Fri, 1 Jul 2016 06:54:47 +0000 (06:54 +0000)]
[CodeGen,Target] Remove the version of DAG.getVectorShuffle that takes a pointer to a mask array. Convert all callers to use the ArrayRef version. No functional change intended.

For the most part this simplifies all callers. There were two places in X86 that needed an explicit makeArrayRef to shorten a statically sized array.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274337 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd support for allowing us to create uniquely identified "COMDAT" or "ELF
Eric Christopher [Fri, 1 Jul 2016 06:07:38 +0000 (06:07 +0000)]
Add support for allowing us to create uniquely identified "COMDAT" or "ELF
Group" sections while lowering. In particular, for ELF sections this is
useful for creating function-specific groups that get merged into the
same named section.

Also use const Twine& instead of StringRef for the getELF functions
while we're here.

Differential Revision: http://reviews.llvm.org/D21743

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274336 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago80-column and comment fixups.
Eric Christopher [Fri, 1 Jul 2016 06:07:31 +0000 (06:07 +0000)]
80-column and comment fixups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274335 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PM] refactor LoopAccessInfo code part-2
Xinliang David Li [Fri, 1 Jul 2016 05:59:55 +0000 (05:59 +0000)]
[PM] refactor LoopAccessInfo code part-2

Differential Revision: http://reviews.llvm.org/D21636

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274334 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[MBP] method interface cleanup
Xinliang David Li [Fri, 1 Jul 2016 05:46:48 +0000 (05:46 +0000)]
[MBP] method interface cleanup

Make worklist and ehworklist member of the
class so that they don't need to be passed around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274333 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "add tests for bugs fixed by the GVN hoist pass"
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 04:55:13 +0000 (04:55 +0000)]
Revert "add tests for bugs fixed by the GVN hoist pass"

This reverts commit r274327 since the tests fail.  E.g.:
  http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules/builds/17240

It looks like this commit is building on r274305, but that commit caused
a miscompile and was reverted in r274320.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274332 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Add option to run the load/store vectorizer
Matt Arsenault [Fri, 1 Jul 2016 03:33:52 +0000 (03:33 +0000)]
AMDGPU: Add option to run the load/store vectorizer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274329 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "Define a module map entry for DebugInfo/CodeView."
Adrian Prantl [Fri, 1 Jul 2016 03:17:02 +0000 (03:17 +0000)]
Revert "Define a module map entry for DebugInfo/CodeView."

This reverts commit r274313.
While this fixed the build on Darwin, it broke Linux with local submodule
visibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274328 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoadd tests for bugs fixed by the GVN hoist pass
Sebastian Pop [Fri, 1 Jul 2016 03:03:19 +0000 (03:03 +0000)]
add tests for bugs fixed by the GVN hoist pass

https://llvm.org/bugs/show_bug.cgi?id=20242
https://llvm.org/bugs/show_bug.cgi?id=22005

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274327 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[codeview] Add DISubprogram::ThisAdjustment
Reid Kleckner [Fri, 1 Jul 2016 02:41:21 +0000 (02:41 +0000)]
[codeview] Add DISubprogram::ThisAdjustment

Summary:
This represents the adjustment applied to the implicit 'this' parameter
in the prologue of a virtual method in the MS C++ ABI. The adjustment is
always zero unless multiple inheritance is involved.

This increases the size of DISubprogram by 8 bytes, unfortunately. The
adjustment really is a signed 32-bit integer. If this size increase is
too much, we could probably win it back by splitting out a subclass with
info specific to virtual methods (virtuality, vindex, thisadjustment,
containingType).

Reviewers: aprantl, dexonsmith

Subscribers: aaboud, amccarth, llvm-commits

Differential Revision: http://reviews.llvm.org/D21614

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274325 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLoadStoreVectorizer: improvements: better pointer analysis
Matt Arsenault [Fri, 1 Jul 2016 02:16:24 +0000 (02:16 +0000)]
LoadStoreVectorizer: improvements: better pointer analysis

If OpB has an ADD NSW/NUW, we can use that to prove that adding 1
to OpA won't wrap if OpA + 1 == OpB.

Patch by Fiona Glaser

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274324 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLoadStoreVectorizer: Don't increase alignment with no align set
Matt Arsenault [Fri, 1 Jul 2016 02:09:38 +0000 (02:09 +0000)]
LoadStoreVectorizer: Don't increase alignment with no align set

If no alignment was set on the load/stores, it would vectorize
to the new type even though this increases the default alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274323 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLoadStoreVectorizer: Check TTI for vec reg bit width
Matt Arsenault [Fri, 1 Jul 2016 02:07:22 +0000 (02:07 +0000)]
LoadStoreVectorizer: Check TTI for vec reg bit width

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274322 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLoadStoreVectorizer: Fix assert when merging pointer ops
Matt Arsenault [Fri, 1 Jul 2016 01:55:52 +0000 (01:55 +0000)]
LoadStoreVectorizer: Fix assert when merging pointer ops

This needs to use inttoptr/ptrtoint if combining an int and pointer
load. If a pointer is used always do an integer load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274321 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRevert "code hoisting pass based on GVN"
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 01:51:40 +0000 (01:51 +0000)]
Revert "code hoisting pass based on GVN"

This reverts commit r274305, since it breaks self-hosting:
  http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_build/22349/
  http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules/builds/17232

Note that the blamelist on lab.llvm.org:8011 is incorrect.  The previous
build was r274299, but somehow r274305 wasn't included in the blamelist:
  http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274320 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in LiveVariables API, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 01:51:32 +0000 (01:51 +0000)]
CodeGen: Use MachineInstr& in LiveVariables API, NFC

Change all the methods in LiveVariables that expect non-null
MachineInstr* to take MachineInstr& and update the call sites.  This
clarifies the API, and designs away a class of iterator to pointer
implicit conversions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274319 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLoadStoreVectorizer: Use AA metadata
Matt Arsenault [Fri, 1 Jul 2016 01:47:46 +0000 (01:47 +0000)]
LoadStoreVectorizer: Use AA metadata

This was not passing the full instruction with metadata
to the alias query.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274318 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Remove implicit iterator conversions in PHIElimination, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 01:27:19 +0000 (01:27 +0000)]
CodeGen: Remove implicit iterator conversions in PHIElimination, NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274317 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in PostRASchedulerList, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 01:18:53 +0000 (01:18 +0000)]
CodeGen: Use MachineInstr& in PostRASchedulerList, NFC

Remove another unnecessary iterator to pointer conversion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274315 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDefine a module map entry for DebugInfo/CodeView.
Adrian Prantl [Fri, 1 Jul 2016 01:16:17 +0000 (01:16 +0000)]
Define a module map entry for DebugInfo/CodeView.

This fixes the -fmodules build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274313 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Implement getLoadStoreVecRegBitWidth
Matt Arsenault [Fri, 1 Jul 2016 00:56:27 +0000 (00:56 +0000)]
AMDGPU: Implement getLoadStoreVecRegBitWidth

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274312 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in PostRAHazardRecognizer, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 00:50:29 +0000 (00:50 +0000)]
CodeGen: Use MachineInstr& in PostRAHazardRecognizer, NFC

Convert a loop to a range-based for, using MachineInstr& instead of
MachineInstr* and removing an implicit conversion from iterator to
pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274311 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in PrologEpilogInserter, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 00:40:57 +0000 (00:40 +0000)]
CodeGen: Use MachineInstr& in PrologEpilogInserter, NFC

Use MachineInstr& over MachineInstr* to avoid implicit iterator to
pointer conversions.  MachineInstr*-as-nullptr was being used as a flag
for whether the for loop terminated normally; I added an explicit `bool`
instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274310 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[pdb] Avoid reporting an error when the module symbol stream is empty
Reid Kleckner [Fri, 1 Jul 2016 00:37:49 +0000 (00:37 +0000)]
[pdb] Avoid reporting an error when the module symbol stream is empty

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274309 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[PDB] Indicate which type record failed hash validation
Reid Kleckner [Fri, 1 Jul 2016 00:37:25 +0000 (00:37 +0000)]
[PDB] Indicate which type record failed hash validation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274308 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLoadStoreVectorizer: if one element of a vector is integer, default to
Matt Arsenault [Fri, 1 Jul 2016 00:37:01 +0000 (00:37 +0000)]
LoadStoreVectorizer: if one element of a vector is integer, default to
integer.

Fixes issues on some architectures where we use arithmetic ops to build
vectors, which can cause bad things to happen for loads/stores of mixed
types.

Patch by Fiona Glaser

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274307 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLoadStoreVectorizer: Fix crashes on sub-byte types
Matt Arsenault [Fri, 1 Jul 2016 00:36:54 +0000 (00:36 +0000)]
LoadStoreVectorizer: Fix crashes on sub-byte types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274306 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agocode hoisting pass based on GVN
Sebastian Pop [Fri, 1 Jul 2016 00:24:31 +0000 (00:24 +0000)]
code hoisting pass based on GVN

This pass hoists duplicated computations in the program. The primary goal of
gvn-hoist is to reduce the size of functions before inline heuristics to reduce
the total cost of function inlining.

Pass written by Sebastian Pop, Aditya Kumar, Xiaoyu Hu, and Brian Rzycki.
Important algorithmic contributions by Daniel Berlin under the form of reviews.

Differential Revision: http://reviews.llvm.org/D19338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274305 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTarget: Remove unused arguments from overrideSchedPolicy, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 00:23:27 +0000 (00:23 +0000)]
Target: Remove unused arguments from overrideSchedPolicy, NFC

TargetSubtargetInfo::overrideSchedPolicy takes two MachineInstr*
arguments (begin and end) that invite implicit conversions from
MachineInstrBundleIterator.  One option would be to change their type to
an iterator, but since they don't seem to have been used since the API
was added in 2010, I'm deleting the dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274304 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in MachineSink, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 00:11:48 +0000 (00:11 +0000)]
CodeGen: Use MachineInstr& in MachineSink, NFC

Use MachineInstr& instead of MachineInstr* in MachineSinker to help
avoid implicit conversions from iterator to pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274303 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[LAA] Fix alphabetical sorting of headers. NFC
Adam Nemet [Fri, 1 Jul 2016 00:09:02 +0000 (00:09 +0000)]
[LAA] Fix alphabetical sorting of headers. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274302 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& more in MachineTraceMetrics, NFC
Duncan P. N. Exon Smith [Fri, 1 Jul 2016 00:05:40 +0000 (00:05 +0000)]
CodeGen: Use MachineInstr& more in MachineTraceMetrics, NFC

Push MachineInstr& through helper APIs for consistency.  This doesn't
remove any more implicit conversions, but it's a nice cleanup after
r274300.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274301 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in MachineTraceMetrics, NFC
Duncan P. N. Exon Smith [Thu, 30 Jun 2016 23:53:20 +0000 (23:53 +0000)]
CodeGen: Use MachineInstr& in MachineTraceMetrics, NFC

This avoids an implicit conversion from iterator to pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274300 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLoadStoreVectorizer: Check skipFunction first.
Matt Arsenault [Thu, 30 Jun 2016 23:50:18 +0000 (23:50 +0000)]
LoadStoreVectorizer: Check skipFunction first.

Also add test I forgot to add to r274296.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274299 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in LocalStackSlotAllocation, NFC
Duncan P. N. Exon Smith [Thu, 30 Jun 2016 23:39:46 +0000 (23:39 +0000)]
CodeGen: Use MachineInstr& in LocalStackSlotAllocation, NFC

Avoid a number of implicit conversions from iterator to pointer by using
range-based for and MachineInstr&.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274298 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use range-based for in LiveVariables, NFC
Duncan P. N. Exon Smith [Thu, 30 Jun 2016 23:33:35 +0000 (23:33 +0000)]
CodeGen: Use range-based for in LiveVariables, NFC

Avoid an implicit iterator to pointer conversion in
LiveVariables::runOnBlock by switching to a range-based for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274297 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoLoadStoreVectorizer: Skip optnone functions
Matt Arsenault [Thu, 30 Jun 2016 23:30:29 +0000 (23:30 +0000)]
LoadStoreVectorizer: Skip optnone functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274296 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in HoistSpillHelper, NFC
Duncan P. N. Exon Smith [Thu, 30 Jun 2016 23:28:15 +0000 (23:28 +0000)]
CodeGen: Use MachineInstr& in HoistSpillHelper, NFC

Avoid another few implicit conversions from iterator to pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274295 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in LDVImpl::handleDebugValue, NFC
Duncan P. N. Exon Smith [Thu, 30 Jun 2016 23:13:38 +0000 (23:13 +0000)]
CodeGen: Use MachineInstr& in LDVImpl::handleDebugValue, NFC

Avoid another implicit conversion from iterator to pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274294 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd LoadStoreVectorizer pass
Matt Arsenault [Thu, 30 Jun 2016 23:11:38 +0000 (23:11 +0000)]
Add LoadStoreVectorizer pass

This was contributed by Apple, and I've been working on
minimal cleanups and generalizing it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274293 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in ExpandISelPseudos, NFC
Duncan P. N. Exon Smith [Thu, 30 Jun 2016 23:09:39 +0000 (23:09 +0000)]
CodeGen: Use MachineInstr& in ExpandISelPseudos, NFC

Avoid another implicit conversion from MachineInstrBundleIterator to
MachineInstr* by using MachineInstr&.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274292 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in IfConversion, NFC
Duncan P. N. Exon Smith [Thu, 30 Jun 2016 23:04:51 +0000 (23:04 +0000)]
CodeGen: Use MachineInstr& in IfConversion, NFC

Switch to a range-based for in IfConverter::PredicateBlock and take
MachineInstr& in MaySpeculate to avoid an implicit conversion from
MachineBasicBlock::iterator to MachineInstr*.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274290 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRemove non-ASCII characters (silly smart quotes). Thanks to Hal for
Chandler Carruth [Thu, 30 Jun 2016 23:04:20 +0000 (23:04 +0000)]
Remove non-ASCII characters (silly smart quotes). Thanks to Hal for
noticing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274289 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[TableGen] Use a SmallVector for Record::Values to avoid debug iterators
Reid Kleckner [Thu, 30 Jun 2016 23:04:07 +0000 (23:04 +0000)]
[TableGen] Use a SmallVector for Record::Values to avoid debug iterators

Debug iterators are valuable so we don't want to turn them off
completely. However, llvm-tblgen is critical to build speed, so we can
skip them here.

Regenerating X86GenSubtargetInfo.inc in a clang-cl self-host debug build
now takes 39s instead of 1m29s.

Helps PR28222

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274288 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Use MachineInstr& in TargetLowering, NFC
Duncan P. N. Exon Smith [Thu, 30 Jun 2016 22:52:52 +0000 (22:52 +0000)]
CodeGen: Use MachineInstr& in TargetLowering, NFC

This is a mechanical change to make TargetLowering API take MachineInstr&
(instead of MachineInstr*), since the argument is expected to be a valid
MachineInstr.  In one case, changed a parameter from MachineInstr* to
MachineBasicBlock::iterator, since it was used as an insertion point.

As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274287 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoTest commit.
David L Kreitzer [Thu, 30 Jun 2016 21:43:11 +0000 (21:43 +0000)]
Test commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274284 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoDon't use unchecked dyn_cast
Matt Arsenault [Thu, 30 Jun 2016 21:18:06 +0000 (21:18 +0000)]
Don't use unchecked dyn_cast

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274282 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoSLPVectorizer: Move propagateMetadata to VectorUtils
Matt Arsenault [Thu, 30 Jun 2016 21:17:59 +0000 (21:17 +0000)]
SLPVectorizer: Move propagateMetadata to VectorUtils

This will be re-used by the LoadStoreVectorizer.

Fix handling of range metadata and testcase by Justin Lebar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274281 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAMDGPU: Add m0 vgpr load loop block as successor
Matt Arsenault [Thu, 30 Jun 2016 20:49:28 +0000 (20:49 +0000)]
AMDGPU: Add m0 vgpr load loop block as successor

This shows up as a verifier error when I move this
earlier, not sure why it didn't before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274275 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[libFuzzer] Let user specify extra stats file.
Mike Aizatsky [Thu, 30 Jun 2016 20:43:06 +0000 (20:43 +0000)]
[libFuzzer] Let user specify extra stats file.

Summary: If AFL_DRIVER_EXTRA_STATS_FILENAME is set and valid, write to it peak_rss_mb and slowest_unit_time_sec. These are both stats that libFuzzer can print but afl cannot.

Reviewers: kcc, aizatsky, metzman

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274273 91177308-0d34-0410-b5e6-96231b3b80d8

8 years ago[CMake] Module builds depend on target intrinsics_gen to be built first.
Vassil Vassilev [Thu, 30 Jun 2016 20:35:56 +0000 (20:35 +0000)]
[CMake] Module builds depend on target intrinsics_gen to be built first.

When compiling with modules, header A and B can be in the same module M.
B depends on intrinsics_gen and A doesn't. Compiling a source file #include-ing
header A, we implicitly request module M to be built. It puts header A and B in
the same TU and tries to build them. Since B depends on intrinsics_gen (which
might not be built yet) we run into build failures.

This should fix our modules buildbot.

Patch reviewed by Chris Bieneman.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274270 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoIntroduce a *draft* of a code of conduct for the LLVM community and the
Chandler Carruth [Thu, 30 Jun 2016 20:27:54 +0000 (20:27 +0000)]
Introduce a *draft* of a code of conduct for the LLVM community and the
associated reporting guide.

I want to emphasize that at this point these are just drafts!

This is the result of very extended discussion on the mailing lists on
several different threads:
http://lists.llvm.org/pipermail/llvm-dev/2015-October/091218.html
http://lists.llvm.org/pipermail/llvm-dev/2016-May/099120.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151019/307070.html

The reporting guide in particular I anticipate will be shaped somewhat
by the advisory committee when they are selected. But hopefully this
serves as a good starting point and good guidance while the advisory
committee is being sorted out.

I'd like to thank all the folks who contributed to this. Many, *many*
people worked to help with drafting, wording, suggestions, and edits.
Also, this is based on widely used existing codes of coduct as mentioned
in the text, and the original authors of those deserve many thanks as
well.

Differential Revision: http://reviews.llvm.org/D13741

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274268 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoAdd an artificial line-0 debug location when the compiler emits a call to
Yunzhong Gao [Thu, 30 Jun 2016 18:49:04 +0000 (18:49 +0000)]
Add an artificial line-0 debug location when the compiler emits a call to
__stack_chk_fail(). This avoids a compiler crash.

Differential Revision: http://reviews.llvm.org/D21818

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274263 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoRefine the set of UniformAfterVectorization instructions.
Wei Mi [Thu, 30 Jun 2016 18:42:56 +0000 (18:42 +0000)]
Refine the set of UniformAfterVectorization instructions.

Except the seed uniform instructions (conditional branch and consecutive ptr
instructions), dependencies to be added into uniform set should only be used
by existing uniform instructions or intructions outside of current loop.

Differential Revision: http://reviews.llvm.org/D21755

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274262 91177308-0d34-0410-b5e6-96231b3b80d8

8 years agoCodeGen: Add the other BuildMI overload for MachineInstr&
Justin Bogner [Thu, 30 Jun 2016 18:32:12 +0000 (18:32 +0000)]
CodeGen: Add the other BuildMI overload for MachineInstr&

The change in r274193 missed this variant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274259 91177308-0d34-0410-b5e6-96231b3b80d8