Ivan Maidanski [Sun, 4 May 2014 12:25:40 +0000 (16:25 +0400)]
Restore contribution info in ChangeLog for authors not listed in git log
(deleted in commit 36a9c66)
* ChangeLog (7.0, 1.0): Add information about contribution of persons
mentioned in AUTHORS but not recorded in git log.
* src/atomic_ops/sysdeps/gcc/cris.h: Move contribution information
from comment to ChangeLog.
Ivan Maidanski [Sat, 17 Aug 2013 11:05:36 +0000 (15:05 +0400)]
Do not use LDREXD/STREXD for Clang3.2/arm (and earlier)
* src/atomic_ops/sysdeps/gcc/arm.h (AO_ARM_HAVE_LDREXD): Do not define
for pre-Clang3.3 (since it does not allocate register pairs for
LDREXD/STREXD instructions properly); add comment.
Ivan Maidanski [Sat, 17 Aug 2013 09:58:59 +0000 (13:58 +0400)]
Fix ARM char/short fetch_and_add and double-CAS operands width (GCC/Clang)
* src/atomic_ops/sysdeps/gcc/arm.h (AO_char_fetch_and_add,
AO_short_fetch_and_add): Use 32-bit int type for "tmp" and "result"
local variables instead of char/short type (resolve Clang3.3 warning
"size being stored is truncated, use a modifier to specify the size"
enabled by -Wasm-operand-widths compiler option); cast "incr"
argument to int to prevent Clang3.2 warning about value
truncation.
* src/atomic_ops/sysdeps/gcc/arm.h (AO_double_compare_and_swap): Swap
assembly code operands ("new_val.AO_whole" and "addr") to prevent
Clang3.3 warning about operand truncation.
* src/atomic_ops/sysdeps/gcc/arm.h (AO_double_load, AO_double_store,
AO_double_compare_and_swap): Specify that LDREXD and STREXD use 2
adjacent registers (thus preventing Clang3.3 from register allocation
failures leading to "registers may not be the same" or
"even register required" GAS errors).
Ivan Maidanski [Sat, 17 Aug 2013 09:04:23 +0000 (13:04 +0400)]
Tests: workaround GCC 4.4.3 warning reported for list_atomic.c 'val'
* tests/list_atomic.template (XSIZE_list_atomicXX): Use "static"
modifier for "val" local variable to initialize it (cannot use direct
assignment to zero because "val" type could be a SIMD vector type if
XCTYPE is AO_double_t) to workaround GCC v4.4.3
"'val' is used uninitialized in this function" warning reported for
AO_load.
Ivan Maidanski [Sat, 17 Aug 2013 08:13:40 +0000 (12:13 +0400)]
Support ARMv8 target (gcc/arm)
* src/atomic_ops/sysdeps/gcc/arm.h (__ARM_ARCH_8A__): Detect new macro
(treated same as __ARM_ARCH_7A__).
* src/atomic_ops/sysdeps/gcc/arm.h (AO_ARM_HAVE_SWP): Do not define
for ARMv8 (since SWP{B} obsoleted); add comment.
* src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_and_swap): Add TODO
item (for deprecated IT block containing wide Thumb instruction).
Ivan Maidanski [Tue, 13 Aug 2013 20:40:04 +0000 (00:40 +0400)]
tests: Add char/short/int/AO_double_t and dd_acquire cases to list_atomic
* tests/Makefile.am (list_atomic.c): Iterate over XSIZE/XCTYPE (in
addition to XX); expand XX also as _dd_acquire_read.
* tests/list_atomic.template (XSIZE_list_atomicXX): Define 'val' local
variable only if used (needed for AO_double_t case).
Ivan Maidanski [Sun, 11 Aug 2013 10:49:05 +0000 (14:49 +0400)]
tests: Parameterize list_atomic template with XSIZE
* tests/Makefile.am (list_atomic.c): Substitute XSIZE/XCTYPE for AO_t.
* tests/list_atomic.template (list_atomicXX): Parameterize with XSIZE
and XCTYPE (except for AO_nop and AO_test_and_set).
Ivan Maidanski [Sun, 11 Aug 2013 07:33:12 +0000 (11:33 +0400)]
list_atomic: Add makefile rule to test list_atomic.template syntax
* tests/Makefile.am (BUILT_SOURCES, CLEANFILES): Add "list_atomic.o".
* tests/Makefile.am (list_atomic.o): New rule (to verify list_atomic.c
is valid C code).
* tests/list_atomic.template (list_atomicXX): Use "volatile" for "val"
local variable.
* tests/list_atomic.template (list_atomicXX): Define "oldval", "newval",
"ts" and "incr" local variables only if used; cast string literals to
void (to prevent compiler warnings).
* tests/list_atomic.template (list_atomicXX): Use AO_t type for "incr"
local variable instead of C long type.
* tests/list_atomic.template (list_atomicXX): Define "oldval",
"newval", "incr" as statitc local variables, and remove explicit
initialization to zero (to void problems with initialization of these
variables for AO_double_t case if the latter is a struct).
Gilles Talis [Sun, 26 May 2013 08:08:18 +0000 (12:08 +0400)]
Enable build using toolchain without pthreads
* src/atomic_ops.c: Include pthread.h only if not AO_NO_PTHREADS (new
macro).
* src/atomic_ops.c (AO_pt_lock): Define only unless AO_NO_PTHREADS.
* tests/test_atomic.c (main): Skip test_atomic_pthreads if both
AO_NO_PTHREADS and AO_USE_PTHREAD_DEFS are defined (preventing test
link failure if AO_NO_PTHREADS passed via CFLAGS).
Ivan Maidanski [Mon, 8 Apr 2013 19:52:44 +0000 (23:52 +0400)]
Add comment about double-wide load/store on x86_64 (GCC)
* src/atomic_ops/sysdeps/gcc/x86.h: Add comment about AO_double_load
and AO_double_store implementation in 64-bit mode; remove the
corresponding TODO item.
Ivan Maidanski [Mon, 8 Apr 2013 18:33:25 +0000 (22:33 +0400)]
Fix generalized store_release_write for double-wide type on x64 (GCC)
* src/atomic_ops/generalize-small.template
(AO_XSIZE_store_release_write): Move store-write-based definition down
to follow AO_XSIZE_store_write one (since AO_double_store is currently
defined via CAS for gcc/x64).
* src/atomic_ops/generalize-small.h: Regenerate.
Ivan Maidanski [Fri, 29 Mar 2013 04:55:13 +0000 (08:55 +0400)]
Generalize double_load/store for x86_64 (GCC)
* src/atomic_ops.h (AO_GENERALIZE_TWICE): Define in case of missing
double-wide load or store primitives while double-wide CAS is present
(required for x86-64, at least).
Ivan Maidanski [Fri, 29 Mar 2013 03:31:06 +0000 (07:31 +0400)]
Fix asm constraints of primitives in sunc/x86.h
* src/atomic_ops/sysdeps/sunc/x86.h (AO_fetch_and_add_full,
AO_char_fetch_and_add_full, AO_short_fetch_and_add_full, AO_and_full,
AO_or_full, AO_xor_full, AO_test_and_set_full,
AO_compare_and_swap_full, AO_compare_double_and_swap_double_full,
AO_int_fetch_and_add_full): Use "+m" asm constraint for *addr instead
of "=m" (because the value pointed by addr is read and written by the
code).
* src/atomic_ops/sysdeps/sunc/x86.h (AO_fetch_compare_and_swap_full):
Use same asm constraints and parameters order as in
AO_compare_and_swap_full.
Ivan Maidanski [Wed, 13 Mar 2013 18:46:24 +0000 (22:46 +0400)]
Fix asm constraint of CAS memory operand for gcc/alpha
* src/atomic_ops/sysdeps/gcc/alpha.h (AO_compare_and_swap): Use "+m"
asm constraint for *addr instead of "=m" (because the value pointed by
addr is read and written by the code).
Ivan Maidanski [Wed, 13 Mar 2013 18:41:58 +0000 (22:41 +0400)]
Fix asm constraint of fetch_and_add, test_and_set, fetch_CAS for MIPS (gcc)
* src/atomic_ops/sysdeps/gcc/mips.h (AO_fetch_and_add,
AO_test_and_set, AO_fetch_compare_and_swap): Use "+m" asm constraint
for *addr instead of "=m" (because the value pointed by addr is read
and written by the code).
Ivan Maidanski [Tue, 12 Mar 2013 18:29:33 +0000 (22:29 +0400)]
Fix asm constraint of compare_and_swap for clang-3.1/mips
* src/atomic_ops/sysdeps/gcc/mips.h (AO_compare_and_swap): Use "+m"
asm constraint for *addr instead of "+R" (the letter is unsupported
by clang3.1 resulting in "invalid output constraint in asm" error).
Yvan Roux [Sat, 9 Mar 2013 13:00:43 +0000 (17:00 +0400)]
Fix assembly comment prefix and identify memory clobbers for AArch64
* src/atomic_ops/sysdeps/gcc/aarch64.h: Revert comments beginning
marker to '//' (since '@' is not supported for A64 assembler).
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_double_load): Add comment
about the need for STXP instruction; remove TODO item.
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_double_store): Add comment
about absence of "cc" in clobber lists; remove TODO item.
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_double_load,
AO_double_load_acquire, AO_double_store, AO_double_store_release,
AO_double_compare_and_swap, AO_double_compare_and_swap_acquire,
AO_double_compare_and_swap_release): Use Q constraint (instead of "r")
for 'addr' argument to instruct the compiler about memory clobbers.
Ivan Maidanski [Mon, 4 Mar 2013 21:02:19 +0000 (01:02 +0400)]
Use AO_EXPECT_FALSE for AArch64 double_load/store
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_HAVE_DOUBLE_PTR_STORAGE):
Do not check (since defined in standard_ao_double_t.h for AArch64).
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_double_load): Add TODO
items.
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_double_load,
AO_double_load_acquire, AO_double_store, AO_double_store_release):
Use AO_EXPECT_FALSE.
Yvan Roux [Mon, 4 Mar 2013 20:25:33 +0000 (00:25 +0400)]
Workaround missing built-in double-wide primitives for AArch64 in gcc-4.7
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_double_load,
AO_double_load_acquire, AO_double_store, AO_double_store_release,
AO_double_compare_and_swap, AO_double_compare_and_swap_acquire,
AO_double_compare_and_swap_release): Define using inline assembly
(because GCC 4.7-2013.01 has no support of 16-byte atomic operations).
* src/atomic_ops/sysdeps/gcc/generic.h (AO_double_load,
AO_double_load_acquire, AO_double_store, AO_double_store_release,
AO_double_compare_and_swap): Do not define if the corresponding
AO_HAVE_double_X macro is defined.
Ivan Maidanski [Thu, 28 Feb 2013 18:38:25 +0000 (22:38 +0400)]
Minimize gcc/generic-arithm template by factoring out barriers
(code refactoring)
* src/Makefile.am (atomic_ops/sysdeps/gcc/generic-arithm.h): Iterate
over XBAR/XGCCBAR (in addition to XSIZE/XCTYPE).
* src/atomic_ops/sysdeps/gcc/generic-arithm.template: Parametrize all
primitives with XBAR (replacing AO none/acquire/release/full barriers)
and with XGCCBAR (replacing GCC atomic RELAXED/ACQUIRE/RELEASE/SEQ_CST
barriers, respectively).
* src/atomic_ops/sysdeps/gcc/generic-arithm.h: Regenerate.
Ivan Maidanski [Thu, 28 Feb 2013 17:55:48 +0000 (21:55 +0400)]
Implement char/short/int-wide primitives using GCC built-in atomic/sync
* src/Makefile.am (EXTRA_DIST): Add gcc/generic-arithm.template,
gcc/generic-small.template entries.
* src/Makefile.am (nobase_private_HEADERS): Move gcc/generic-arithm.h,
atomic_ops/sysdeps/gcc/generic-small.h to BUILT_SOURCES.
* src/Makefile.am (atomic_ops/sysdeps/gcc/generic-arithm.h,
atomic_ops/sysdeps/gcc/generic-small.h): New rules (to generate
AO_char/short/int_X primitives included from gcc/generic.h file.
* src/atomic_ops/sysdeps/gcc/generic-arithm.template: New template
file (based on code moved from generic-arithm.h).
* src/atomic_ops/sysdeps/gcc/generic-small.template: New template file
(based on code moved from generic-small.h).
* src/atomic_ops/sysdeps/gcc/generic-arithm.h: Regenerate.
* src/atomic_ops/sysdeps/gcc/generic-small.h: Likewise.
Ivan Maidanski [Thu, 28 Feb 2013 15:46:58 +0000 (19:46 +0400)]
Define nop_write as 'dmb st' for AArch64
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_nop_write): Define via asm
(dmb st) statement unless AO_UNIPROCESSOR (because it seems there is
no equivalent definition using compiler __atomic_thread_fence).
* src/atomic_ops/sysdeps/gcc/generic.h (AO_nop_write): Do not define
if already is.
Ivan Maidanski [Thu, 28 Feb 2013 04:46:00 +0000 (08:46 +0400)]
Remove improper comment for AO_XSIZE_load_read
* src/atomic_ops/generalize-small.template (AO_XSIZE_load_read):
Remove improper comment (because nop barrier type matches that of
load primitive).
* src/atomic_ops/generalize-small.template (AO_XSIZE_store_write):
Reorder AO_HAVE_nop_write and AO_HAVE_XSIZE_store checking (to match
that for other primitives in this file).
* src/atomic_ops/generalize-small.h: Regenerate.
Ivan Maidanski [Thu, 14 Feb 2013 10:08:47 +0000 (14:08 +0400)]
Fix (remove) invalid include of read_ordered.h for ARM
(fix commit 2df9c1e partially)
* src/atomic_ops/sysdeps/gcc/arm.h: Do not include read_ordered.h
(because load_acquire should contain a DMB instruction in a multi-core
case, new load_acquire/read primitives implementation is generalized
using nop_full/read which either contain a DMB instruction, or is just
a compiler barrier for uniprocessor).
* src/atomic_ops/sysdeps/armcc/arm_v6.h: Likewise.
* src/atomic_ops/sysdeps/msftc/arm.h: Likewise.
Ivan Maidanski [Thu, 14 Feb 2013 08:04:19 +0000 (12:04 +0400)]
Implement load/store via simple LDR/STR for ARMv6+ (msftc)
* src/atomic_ops/sysdeps/msftc/arm.h: Include
all_aligned_atomic_load_store.h instead of all_atomic_load_store.h
(since unaligned accesses are not guaranteed to be atomic).
* src/atomic_ops/sysdeps/msftc/arm.h (AO_load): Remove; include
all_aligned_atomic_load_store.h unconditionally instead (thus
implementing AO[_char/short]_load/store via simple LDR/STR; add
comment about Windows interrupt handlers.
* src/atomic_ops/sysdeps/msftc/arm.h: Add TODO item to implement
AO_test_and_set_full (for pre-ARMv6).
Ivan Maidanski [Thu, 14 Feb 2013 07:36:06 +0000 (11:36 +0400)]
Define AO_nop_full as compiler barrier for pre-ARMv6 single-core case
* src/atomic_ops/sysdeps/gcc/arm.h (AO_nop_full): Define for pre-ARMv6
as well (as a compiler barrier) if AO_UNIPROCESSOR; refine comment.
* src/atomic_ops/sysdeps/msftc/arm.h (AO_nop_full): Likewise.
* src/atomic_ops/sysdeps/msftc/arm.h: Eliminate duplicated include of
test_and_set_t_is_ao_t.h.
Ivan Maidanski [Tue, 12 Feb 2013 21:17:36 +0000 (01:17 +0400)]
Use __atomic GCC built-in to implement generic double-wide CAS
* src/atomic_ops/sysdeps/gcc/generic.h (AO_double_compare_and_swap):
Implement using __atomic_compare_exchange_n(__ATOMIC_RELAXED) instead
of __sync_bool_compare_and_swap.
Ivan Maidanski [Sat, 9 Feb 2013 12:16:48 +0000 (16:16 +0400)]
Allow to prefer more generalized primitives in gcc/generic.h
* src/atomic_ops/sysdeps/gcc/generic.h (AO_test_and_set,
AO_test_and_set_acquire, AO_test_and_set_release, AO_test_and_set_full,
AO_fetch_and_add, AO_fetch_and_add_acquire, AO_fetch_and_add_release,
AO_fetch_and_add_full): Do not define if AO_PREFER_GENERALIZED.
* src/atomic_ops/sysdeps/gcc/generic.h (AO_compare_and_swap): Do not
define if AO_GENERALIZE_ASM_BOOL_CAS.
Ivan Maidanski [Sat, 9 Feb 2013 07:43:54 +0000 (11:43 +0400)]
Fix AO_load_acquire for AArch64
* src/atomic_ops/sysdeps/gcc/aarch64.h: Add TODO for AO_nop_read;
uncomment AO_load_acquire definition and remove include of
read_ordered.h file (because AO_load_acquire requires "release"
barrier, AO_load_read is defined in generalize-small.h using
AO_nop_read).
Ivan Maidanski [Tue, 5 Feb 2013 21:38:38 +0000 (01:38 +0400)]
Remove load_read, store_write redundant definition from ordered_X.h
(code refactoring)
* src/atomic_ops/sysdeps/loadstore/ordered_loads_only.template
(AO_XSIZE_load_read): Remove prototype (since defined by
generalize-small.template in the same way).
* src/atomic_ops/sysdeps/loadstore/ordered_stores_only.template
(AO_XSIZE_store_write): Likewise.
* src/atomic_ops/sysdeps/loadstore/ordered_stores_only.template
(AO_XSIZE_store_release): Define using AO_nop_write and AO_XSIZE_store
directly.
* src/atomic_ops/sysdeps/ordered_except_wr.h: Move include of
ordered_stores_only.h down to be after AO_nop_write definition.
* src/atomic_ops/sysdeps/read_ordered.h: Move include of
ordered_loads_only.h down to be after AO_nop_read definition.
* src/atomic_ops/sysdeps/loadstore/ordered_loads_only.h: Regenerate.
* src/atomic_ops/sysdeps/loadstore/ordered_stores_only.h: Likewise.
Ivan Maidanski [Tue, 5 Feb 2013 20:23:22 +0000 (21:23 +0100)]
Revert "Prevent load_acquire redefinition in ordered_loads_only.h"
(That change is not needed because the file defines really only
load_acquire, and load_read is the same as in generalize-small.h)
Ivan Maidanski [Sat, 2 Feb 2013 16:46:10 +0000 (20:46 +0400)]
Fix unsupported instruction use in char/short_fetch_and_add for ARMv6
* src/atomic_ops/sysdeps/gcc/arm.h (AO_ARM_HAVE_LDREXBH): Define new
macro for ARMv6K/Z+ (excluding ARMv6, ARMv6J, ARMv6T2).
* src/atomic_ops/sysdeps/gcc/arm.h (AO_char_store, AO_short_store,
AO_char_fetch_and_add, AO_short_fetch_and_add): Define (together with
the corresponding AO_HAVE_x macros) only if AO_ARM_HAVE_LDREXBH (since
otherwise LDREXB/STREXB, LDREXH/STREXH are not supported by the target
processor).
* src/atomic_ops/sysdeps/gcc/arm.h: Include char_atomic_store.h and
short_atomic_store.h only if AO_HAVE_char_store is not defined (by
gcc/arm.h itself).
Ivan Maidanski [Sat, 2 Feb 2013 09:40:27 +0000 (13:40 +0400)]
Implement char/short_fetch_and_add for ARMv6+ (GCC)
* src/atomic_ops/sysdeps/gcc/arm.h: Include char_atomic_store.h and
short_atomic_store.h only if not AO_BROKEN_TASKSWITCH_CLREX.
* src/atomic_ops/sysdeps/gcc/arm.h (AO_store): Update comment.
* src/atomic_ops/sysdeps/gcc/arm.h (AO_char_store, AO_short_store):
Implement using LDREXB/STREXB and LDREXH/STREXH, respectively, if
AO_BROKEN_TASKSWITCH_CLREX defined (only if AO_ARM_HAVE_LDREX).
* src/atomic_ops/sysdeps/gcc/arm.h (AO_char_fetch_and_add,
AO_short_fetch_and_add): Implement (based on using LDREXB/STREXB and
LDREXH/STREXH, respectively) if AO_ARM_HAVE_LDREX.
Ivan Maidanski [Sat, 2 Feb 2013 08:47:07 +0000 (12:47 +0400)]
Adjust type of 'flag' and 'tmp' local variables in gcc/arm.h
(code refactoring)
* src/atomic_ops/sysdeps/gcc/arm.h (AO_store,
AO_fetch_compare_and_swap): Change type of "flag" local variable from
AO_t to int (only if AO_BROKEN_TASKSWITCH_CLREX).
* src/atomic_ops/sysdeps/gcc/arm.h (AO_test_and_set, AO_fetch_and_add,
AO_fetch_and_add1, AO_fetch_and_sub1): Change type of "flag" local
variable from unsigned long to int.
* src/atomic_ops/sysdeps/gcc/arm.h (AO_fetch_and_add,
AO_fetch_and_add1, AO_fetch_and_sub1): Change type of "tmp" local
variable from unsigned long to AO_t.
Ivan Maidanski [Tue, 29 Jan 2013 22:33:22 +0000 (02:33 +0400)]
Implement char/short_store primitives at aligned addresses for ARM
* src/atomic_ops/sysdeps/gcc/arm.h: Include char_atomic_store.h and
short_atomic_store.h if AO_ARM_HAVE_LDREX (after
AO_ACCESS_x_CHECK_ALIGNED defined); add comment.
* src/atomic_ops/sysdeps/gcc/arm.h: Include
all_aligned_atomic_load_store.h instead of all_atomic_load_store.h
(only if not AO_ARM_HAVE_LDREX).
Ivan Maidanski [Sat, 26 Jan 2013 08:58:34 +0000 (12:58 +0400)]
Prevent load_acquire redefinition in ordered_loads_only.h
* src/atomic_ops/sysdeps/loadstore/ordered_loads_only.template
(AO_XSIZE_load_acquire, AO_HAVE_XSIZE_load_acquire): Do not define
if AO_HAVE_XSIZE_load_acquire already defined.
* src/atomic_ops/sysdeps/loadstore/ordered_loads_only.h: Regenerate.
Ivan Maidanski [Wed, 23 Jan 2013 21:36:12 +0000 (01:36 +0400)]
Fix AO_nop_full and AO_load_read for AArch64
* src/atomic_ops/sysdeps/gcc/aarch64.h: Place include of
read_ordered.h to the end of file (to be after AO_load definition).
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_nop_full): Force compiler
barrier for the uni-processor case.
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_load_acquire): Comment out
and add FIXME (due to read_ordered.h).
* src/atomic_ops/sysdeps/gcc/aarch64.h (AO_test_and_set,
AO_test_and_set_acquire, AO_test_and_set_release,
AO_test_and_set_full): Cast result to AO_TS_VAL_t (since
__atomic_test_and_set returns AO_TS_t value).
Ivan Maidanski [Sun, 20 Jan 2013 19:12:12 +0000 (23:12 +0400)]
Add internal header containing only char/short/int/AO_t atomic loads
(code refactoring)
* src/Makefile.am (nobase_private_HEADERS): Add all_atomic_only_load.h
entry.
* src/atomic_ops/sysdeps/all_aligned_atomic_load_store.h: Include
all_atomic_load_store.h instead of including X_atomic_load.h and
X_atomic_store.h directly; add comment for char type.
* src/atomic_ops/sysdeps/all_atomic_load_store.h: Include
all_atomic_only_load.h instead of including X_atomic_load.h directly.
* src/atomic_ops/sysdeps/all_atomic_only_load.h: New file (contains
only inclusion of atomic_load.h, char_atomic_load.h,
short_atomic_load.h and int_atomic_load.h files.
Ivan Maidanski [Mon, 14 Jan 2013 20:56:35 +0000 (00:56 +0400)]
Fix README regarding _acquire_read barrier
* doc/README.txt (_acquire_read): Add information about memory
barrier (similar as in atomic_ops.h).
* doc/README.txt (_release_read): Remove information about
non-existing barrier.
Ivan Maidanski [Sun, 13 Jan 2013 18:42:52 +0000 (22:42 +0400)]
Fix return type of AO_int_X primitives defined in ao_t_is_int header
* src/atomic_ops/sysdeps/ao_t_is_int.h
(AO_int_fetch_compare_and_swap_full,
AO_int_fetch_compare_and_swap_acquire,
AO_int_fetch_compare_and_swap_release,
AO_int_fetch_compare_and_swap_write,
AO_int_fetch_compare_and_swap_read, AO_int_fetch_compare_and_swap,
AO_int_load_acquire, AO_int_fetch_and_add_full,
AO_int_fetch_and_add1_acquire, AO_int_fetch_and_add1_release,
AO_int_fetch_and_sub1_acquire, AO_int_fetch_and_sub1_release): Cast
result to unsigned int instead of signed int.
Ivan Maidanski [Sun, 13 Jan 2013 16:19:51 +0000 (20:19 +0400)]
Fix ordered_except_wr header inclusion for s390
* src/atomic_ops/sysdeps/gcc/s390.h: Move include of
ordered_except_wr.h down to be after all_aligned_atomic_load_store.h
inclusion (since the latter defines AO_X_load/store primitives used by
the former header).