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6 years ago[llvm] [Support] Revert "Reimplement getMainExecutable() using sysctl on NetBSD"
Michal Gorny [Mon, 4 Mar 2019 04:53:50 +0000 (04:53 +0000)]
[llvm] [Support] Revert "Reimplement getMainExecutable() using sysctl on NetBSD"

This apparently does not work reliably after all (non-reentrant?)
and causes test failures such as:

http://lab.llvm.org:8011/builders/netbsd-amd64/builds/19254/steps/run%20unit%20tests/logs/FAIL%3A%20libc%2B%2B%3A%3Asize.pass.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355302 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] Mark debug values as unavailable after DCE.
Davide Italiano [Mon, 4 Mar 2019 04:38:58 +0000 (04:38 +0000)]
[InstCombine] Mark debug values as unavailable after DCE.

Fixes PR40838.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355301 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SubtargetFeatures] Add operator< for comparing SubtargetInfoKV objects. NFCI
Craig Topper [Mon, 4 Mar 2019 04:26:31 +0000 (04:26 +0000)]
[SubtargetFeatures] Add operator< for comparing SubtargetInfoKV objects. NFCI

Use instead of passing a lambda to std::is_sorted. This is more consistent with SubtargetFeatureKV.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355300 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SubtargetFeatures] Don't call ApplyFeatureFlag if the feature name is '+help'
Craig Topper [Mon, 4 Mar 2019 02:02:24 +0000 (02:02 +0000)]
[SubtargetFeatures] Don't call ApplyFeatureFlag if the feature name is '+help'

Just print the help and stop. Otherwise we'll print a message about it not being a real feature name after printing the help text.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355299 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SubtargetFeatuers] Simplify the code used to imply features from CPU name.
Craig Topper [Mon, 4 Mar 2019 02:02:22 +0000 (02:02 +0000)]
[SubtargetFeatuers] Simplify the code used to imply features from CPU name.

If we make SetImpliedBits OR features outside of its loop, we can reuse it for the first round of implying features for CPUs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355298 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Delete ThrowUnwindDest map from WasmEHFuncInfo
Heejin Ahn [Sun, 3 Mar 2019 22:35:56 +0000 (22:35 +0000)]
[WebAssembly] Delete ThrowUnwindDest map from WasmEHFuncInfo

Summary:
Before when we implemented the first EH proposal, 'catch <tag>'
instruction may not catch an exception so there were multiple EH pads an
exception can unwind to. That means a BB could have multiple EH pad
successors.

Now after we switched to the new proposal, every 'catch' instruction
catches an exception, and there is only one catchpad per catchswitch, so
we at most have one EH pad successor, making `ThrowUnwindDest` map in
`WasmEHInfo` unnecessary.

Keeping `ThrowUnwindDest` map in `WasmEHInfo` has its own problems,
because other optimization passes can split a BB that contains possibly
throwing calls (previously invokes), and we have to update the map every
time that happens, which is not easy for common CodeGen passes.

This also correctly updates successor info in LateEHPrepare when we add
a rethrow instruction.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58486

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355296 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Regenerate test to get the full FP operands printed. NFC
Craig Topper [Sun, 3 Mar 2019 20:28:52 +0000 (20:28 +0000)]
[X86] Regenerate test to get the full FP operands printed. NFC

Missed when I updated the printer to print implicit %st operand on binops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355295 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] remove stale FIXME comment from test; NFC
Sanjay Patel [Sun, 3 Mar 2019 19:08:54 +0000 (19:08 +0000)]
[InstCombine] remove stale FIXME comment from test; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355293 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ValueTracking] do not try to peek through bitcasts in computeKnownBitsFromAssume()
Sanjay Patel [Sun, 3 Mar 2019 18:59:33 +0000 (18:59 +0000)]
[ValueTracking] do not try to peek through bitcasts in computeKnownBitsFromAssume()

There are no tests for this case, and I'm not sure how it could ever work,
so I'm just removing this option from the matcher. This should fix PR40940:
https://bugs.llvm.org/show_bug.cgi?id=40940

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355292 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd extra ops in add to sub transform test in order to enforce proper operand orderin...
Amaury Sechet [Sun, 3 Mar 2019 15:11:13 +0000 (15:11 +0000)]
Add extra ops in add to sub transform test in order to enforce proper operand ordering. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355291 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DemandedBits] Remove some redundancy in the work list
Fangrui Song [Sun, 3 Mar 2019 14:50:01 +0000 (14:50 +0000)]
[DemandedBits] Remove some redundancy in the work list

InputIsKnownDead check is shared by all operands. Compute it once.

For non-integer instructions, use Visited.insert(I).second to replace a
find() and an insert().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355290 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove unused variable. NFCI.
Simon Pilgrim [Sun, 3 Mar 2019 14:23:07 +0000 (14:23 +0000)]
Remove unused variable. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355289 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] getShuffleScalarElt - peek through insert/extract subvector nodes.
Simon Pilgrim [Sun, 3 Mar 2019 14:11:05 +0000 (14:11 +0000)]
[X86] getShuffleScalarElt - peek through insert/extract subvector nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355288 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Pull out combineToConsecutiveLoads helper. NFCI.
Simon Pilgrim [Sun, 3 Mar 2019 13:53:27 +0000 (13:53 +0000)]
[X86] Pull out combineToConsecutiveLoads helper. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355287 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove large amount of empty lines mid-file. NFC
Kristina Brooks [Sun, 3 Mar 2019 13:21:38 +0000 (13:21 +0000)]
Remove large amount of empty lines mid-file. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355286 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DemandedBits] Optimize a find()+insert pattern with try_emplace and APInt::operator|=
Fangrui Song [Sun, 3 Mar 2019 11:12:57 +0000 (11:12 +0000)]
[DemandedBits] Optimize a find()+insert pattern with try_emplace and APInt::operator|=

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355284 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm] [Support] Reimplement getMainExecutable() using sysctl on NetBSD
Michal Gorny [Sun, 3 Mar 2019 10:06:40 +0000 (10:06 +0000)]
[llvm] [Support] Reimplement getMainExecutable() using sysctl on NetBSD

Use sysctl() to implement getMainExecutable() on NetBSD, rather than
trying to guess the correct path from argv[0].  This is one
of the fixes to recent clang-check-mac-libcxx-fixed-compilation-db.cpp
test failure on NetBSD.

This has been historically done on both FreeBSD and NetBSD in r303015,
and reverted in r303285 due to buggy implementation on FreeBSD.
However, FWIK the NetBSD implementation does not suffer from the same
bugs and is more reliable than playing with argv[0].

Differential Revision: https://reviews.llvm.org/D56975

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355283 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Prefer VPBLENDD for v2i64/v4i64 blends with AVX2.
Craig Topper [Sun, 3 Mar 2019 00:18:07 +0000 (00:18 +0000)]
[X86] Prefer VPBLENDD for v2i64/v4i64 blends with AVX2.

We were using VPBLENDW for v2i64 and VBLENDPD for v4i64. VPBLENDD has better throughput than VPBLENDW on some CPUs so it makes sense to use it when possible. VBLENDPD will probably become VBLENDD during execution domain fixing, but we might as well use integer in isel while we can.

This should work around some issues with the domain fixing pass prefering PBLENDW when we start with PBLENDW. There may still be some v8i16 cases that could use PBLENDD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355281 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd test case for add to sub transformation. NFC
Amaury Sechet [Sat, 2 Mar 2019 20:12:25 +0000 (20:12 +0000)]
Add test case for add to sub transformation. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355277 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agogn build: Add a cfi/sources target.
Nico Weber [Sat, 2 Mar 2019 18:29:56 +0000 (18:29 +0000)]
gn build: Add a cfi/sources target.

This build target is currently unused, but after r355144 the sync script
started complaining about cfi.cpp not being listed, and this makes the
script happy again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355275 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] move add after smin/smax
Sanjay Patel [Sat, 2 Mar 2019 16:45:10 +0000 (16:45 +0000)]
[InstCombine] move add after smin/smax

Follow-up to rL355221.
This isn't specifically called for within PR14613,
but we'll get there eventually if it's not already
requested in some other bug report.

https://rise4fun.com/Alive/5b0

  Name: smax
  Pre: WillNotOverflowSignedSub(C1,C0)
  %a = add nsw i8 %x, C0
  %cond = icmp sgt i8 %a, C1
  %r = select i1 %cond, i8 %a, i8 C1
  =>
  %c2 = icmp sgt i8 %x, C1-C0
  %u2 = select i1 %c2, i8 %x, i8 C1-C0
  %r = add nsw i8 %u2, C0

  Name: smin
  Pre: WillNotOverflowSignedSub(C1,C0)
  %a = add nsw i32 %x, C0
  %cond = icmp slt i32 %a, C1
  %r = select i1 %cond, i32 %a, i32 C1
  =>
  %c2 = icmp slt i32 %x, C1-C0
  %u2 = select i1 %c2, i32 %x, i32 C1-C0
  %r = add nsw i32 %u2, C0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355272 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] add tests for add+smin/smax; NFC
Sanjay Patel [Sat, 2 Mar 2019 16:45:05 +0000 (16:45 +0000)]
[InstCombine] add tests for add+smin/smax; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355271 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd test case for add to sub transformation. NFC
Amaury Sechet [Sat, 2 Mar 2019 14:28:59 +0000 (14:28 +0000)]
Add test case for add to sub transformation. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355269 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix update_mir_test_checks.py to run on python3
Simon Pilgrim [Sat, 2 Mar 2019 11:14:01 +0000 (11:14 +0000)]
Fix update_mir_test_checks.py to run on python3

Split off from D58817

Differential Revision: https://reviews.llvm.org/D58820

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355268 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUse SDValue::getConstantOperandAPInt helper where possible. NFCI.
Simon Pilgrim [Sat, 2 Mar 2019 11:11:22 +0000 (11:11 +0000)]
Use SDValue::getConstantOperandAPInt helper where possible. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355267 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Transforms] fix typo in test case. NFC.
Xing GUO [Sat, 2 Mar 2019 08:32:32 +0000 (08:32 +0000)]
[Transforms] fix typo in test case. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355265 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Codegen] fix typos in test case
Xing GUO [Sat, 2 Mar 2019 08:03:59 +0000 (08:03 +0000)]
[Codegen] fix typos in test case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355264 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-objdump] Should print unknown d_tag in hex format
Xing GUO [Sat, 2 Mar 2019 04:20:28 +0000 (04:20 +0000)]
[llvm-objdump] Should print unknown d_tag in hex format

Summary:
Currently, `llvm-objdump` prints "unknown" instead of d_tag value in hex format. Because getDynamicTagAsString returns "unknown" rather than empty
string.

Reviewers: grimar, jhenderson

Reviewed By: jhenderson

Subscribers: rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58763

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355262 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Expand operations not supported by SIMD
Thomas Lively [Sat, 2 Mar 2019 03:32:25 +0000 (03:32 +0000)]
[WebAssembly] Expand operations not supported by SIMD

Summary:
This prevents crashes in instruction selection when these operations
are used. The tests check that the scalar version of the instruction
is used where applicable, although some expansions do not use the
scalar version.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58859

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355261 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Improve use of SHLD/SHRD
Amaury Sechet [Sat, 2 Mar 2019 02:44:16 +0000 (02:44 +0000)]
[X86] Improve use of SHLD/SHRD

Summary:
This extends the variety of pattern that can generate a SHLD instead of using two shifts.

This fixes a regression that would be introduced by D57367 or D33587

Reviewers: RKSimon, craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D57389

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355260 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SCEV] Handle case where MaxBECount is less precise than ExactBECount for OR.
Florian Hahn [Sat, 2 Mar 2019 02:31:44 +0000 (02:31 +0000)]
[SCEV] Handle case where MaxBECount is less precise than ExactBECount for OR.

In some cases, MaxBECount can be less precise than ExactBECount for AND
and OR (the AND case was PR26207). In the OR test case, both ExactBECounts are
undef, but MaxBECount are different, so we hit the assertion below. This
patch uses the same solution the AND case already uses.

Assertion failed:
   ((isa<SCEVCouldNotCompute>(ExactNotTaken) || !isa<SCEVCouldNotCompute>(MaxNotTaken))
     && "Exact is not allowed to be less precise than Max"), function ExitLimit

This patch also consolidates test cases for both AND and OR in a single
test case.

Fixes https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=13245

Reviewers: sanjoy, efriedma, mkazantsev

Reviewed By: sanjoy

Differential Revision: https://reviews.llvm.org/D58853

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355259 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd test case for truncate funnel shifts. NFC
Amaury Sechet [Sat, 2 Mar 2019 02:24:36 +0000 (02:24 +0000)]
Add test case for truncate funnel shifts. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355258 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SCEV] Remove undef check for SCEVConstant (NFC)
Florian Hahn [Sat, 2 Mar 2019 01:57:28 +0000 (01:57 +0000)]
[SCEV] Remove undef check for SCEVConstant (NFC)

The value stored in SCEVConstant is of type ConstantInt*, which can
never be UndefValue. So we should never hit that code.

Reviewers: mkazantsev, sanjoy

Reviewed By: sanjoy

Differential Revision: https://reviews.llvm.org/D58851

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355257 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[DWARFFormValue] Cleanup DWARFFormValue interface. (2/2) (NFC)"
Vlad Tsyrklevich [Sat, 2 Mar 2019 01:10:00 +0000 (01:10 +0000)]
Revert "[DWARFFormValue] Cleanup DWARFFormValue interface. (2/2) (NFC)"

This reverts commit r355233, it was causing UBSan failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355255 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[WebAssembly][WIP] Expand operations not supported by SIMD"
Thomas Lively [Sat, 2 Mar 2019 00:55:16 +0000 (00:55 +0000)]
Revert "[WebAssembly][WIP] Expand operations not supported by SIMD"

This was accidentally committed without tests or review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355254 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ProfileData] Sort FuncData before iteration to remove non-determinism
Mandeep Singh Grang [Sat, 2 Mar 2019 00:47:43 +0000 (00:47 +0000)]
[ProfileData] Sort FuncData before iteration to remove non-determinism

Reviewers: rsmith, bogner, dblaikie

Reviewed By: dblaikie

Subscribers: Hahnfeld, jdoerfert, vsk, dblaikie, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D57986

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355252 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly][WIP] Expand operations not supported by SIMD
Thomas Lively [Sat, 2 Mar 2019 00:18:07 +0000 (00:18 +0000)]
[WebAssembly][WIP] Expand operations not supported by SIMD

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355247 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm] Fix typo: 's/analsyis/analysis/' [NFC]
Mandeep Singh Grang [Sat, 2 Mar 2019 00:14:10 +0000 (00:14 +0000)]
[llvm] Fix typo: 's/analsyis/analysis/' [NFC]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355246 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[tblgen] Track CodeInit origins when possible
Daniel Sanders [Sat, 2 Mar 2019 00:12:57 +0000 (00:12 +0000)]
[tblgen] Track CodeInit origins when possible

Summary:
Add an SMLoc to CodeInit that records the source line it originated from.
This allows tablegen to point precisely at portions of code when reporting
errors within the CodeInit. For example, in the upcoming GlobalISel
combiner, it can report undefined expansions and point at the instance of
the expansion. This is achieved using something like:
  SMLoc::getFromPointer(SMLoc::getPointer() +
                        (StringRef - CodeInit::getValue()))

The location is lost when producing a CodeInit by string concatenation so
a fallback SMLoc is required (e.g. the Record::getLoc()) but that's pretty
rare for CodeInits.

There's a reasonable case for extending tracking of a couple other Init
objects, for example StringInit's are often parsed and it would be good to
point inside the string when reporting errors about that. However, location
tracking also harms de-duplication. This is fine for CodeInit where there's
only a few hundred of them (~160 for X86) and it may be worth it for
StringInit (~86k up to ~1.9M for roughly 15MB increase for X86).
However the origin tracking would be a _terrible_ idea for IntInit, BitInit,
and UnsetInit. I haven't measured either of those three but BitInit would
most likely be on the order of increasing the current 2 BitInit values up
to billions.

Reviewers: volkan, aditya_nandakumar, bogner, paquette, aemerson

Reviewed By: paquette

Subscribers: javed.absar, kristof.beyls, dexonsmith, llvm-commits, kristina

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58141

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355245 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agollvm-dwarfdump: Add new variable, parameter and inlining statistics; also function...
Caroline Tice [Fri, 1 Mar 2019 23:51:54 +0000 (23:51 +0000)]
llvm-dwarfdump: Add new variable, parameter and inlining statistics; also function source location statistics.

Add statistics for abstract origins, function, variable and parameter
locations; break the 'variable' counts down into variables and
parameters. Also update call site counting to check for
DW_AT_call_{file,line} in addition to DW_TAG_call_site.

Differential revision: https://reviews.llvm.org/D58849

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355243 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTry to fix Windows bots after r355226.
Paul Robinson [Fri, 1 Mar 2019 22:28:13 +0000 (22:28 +0000)]
Try to fix Windows bots after r355226.

Windows has two path separator characters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355235 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DWARFFormValue] Cleanup DWARFFormValue interface. (2/2) (NFC)
Jonas Devlieghere [Fri, 1 Mar 2019 22:14:24 +0000 (22:14 +0000)]
[DWARFFormValue] Cleanup DWARFFormValue interface. (2/2) (NFC)

Continues the work started in r354941. Changes (all but one) uses of the
extractValue to static createFromData.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355233 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove IntrArgMemOnly from target specific gather/scatter intrinsics
Craig Topper [Fri, 1 Mar 2019 21:02:40 +0000 (21:02 +0000)]
[X86] Remove IntrArgMemOnly from target specific gather/scatter intrinsics

IntrArgMemOnly implies that only memory pointed to by pointer typed arguments will be accessed. But these intrinsics allow you to pass null to the pointer argument and put the full address into the index argument. Other passes won't be able to understand this.

A colleague found that ISPC was creating gathers like this and then dead store elimination removed some stores because it didn't understand what the gather was doing since the pointer argument was null.

Differential Revision: https://reviews.llvm.org/D58805

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355228 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add test case for D58805. NFC
Craig Topper [Fri, 1 Mar 2019 21:02:34 +0000 (21:02 +0000)]
[X86] Add test case for D58805. NFC

This demonstrates dead store elimination removing a store that may alias a gather that uses null as its base.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355227 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DWARF] Make -g with empty assembler source work better.
Paul Robinson [Fri, 1 Mar 2019 20:58:04 +0000 (20:58 +0000)]
[DWARF] Make -g with empty assembler source work better.

This was sometimes causing clang or llvm-mc to crash, and in other
cases could emit a bogus DWARF line-table header. I did an interim
patch in r352541; this patch should be a cleaner and more complete
fix, and retains the test.

Addresses PR40538.

Differential Revision: https://reviews.llvm.org/D58750

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355226 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TableGen][SelectionDAG][X86] Add specific isel matchers for immAllZerosV/immAllOnesV...
Craig Topper [Fri, 1 Mar 2019 20:18:38 +0000 (20:18 +0000)]
[TableGen][SelectionDAG][X86] Add specific isel matchers for immAllZerosV/immAllOnesV. Remove bitcasts from X86 patterns that are no longer necessary.

Previously we had build_vector PatFrags that called ISD::isBuildVectorAllZeros/Ones. Internally the ISD::isBuildVectorAllZeros/Ones look through bitcasts, but we aren't able to take advantage of that in isel. Instead of we have to canonicalize the types of the all zeros/ones build_vectors and insert bitcasts. Then we have to pattern match those exact bitcasts.

By emitting specific matchers for these 2 nodes, we can make isel look through any bitcasts without needing to explicitly match them. We should also be able to remove the canonicalization to vXi32 from lowering, but I've left that for a follow up.

This removes something like 40,000 bytes from the X86 isel table.

Differential Revision: https://reviews.llvm.org/D58595

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355224 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ValueTracking] Known bits support for unsigned saturating add/sub
Nikita Popov [Fri, 1 Mar 2019 20:07:04 +0000 (20:07 +0000)]
[ValueTracking] Known bits support for unsigned saturating add/sub

We have two sources of known bits:

1. For adds leading ones of either operand are preserved. For sub
leading zeros of LHS and leading ones of RHS become leading zeros in
the result.

2. The saturating math is a select between add/sub and an all-ones/
zero value. As such we can carry out the add/sub known bits
calculation, and only preseve the known one/zero bits respectively.

Differential Revision: https://reviews.llvm.org/D58329

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355223 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] Extend saturating idempotent atomicrmw transform to FP
Philip Reames [Fri, 1 Mar 2019 19:50:36 +0000 (19:50 +0000)]
[InstCombine] Extend saturating idempotent atomicrmw transform to FP

I'm assuming that the nan propogation logic for InstructonSimplify's handling of fadd and fsub is correct, and applying the same to atomicrmw.

Differential Revision: https://reviews.llvm.org/D58836

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355222 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] move add after umin/umax
Sanjay Patel [Fri, 1 Mar 2019 19:42:40 +0000 (19:42 +0000)]
[InstCombine] move add after umin/umax

In the motivating cases from PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
...moving the add enables us to narrow the
min/max which eliminates zext/trunc which
enables signficantly better vectorization.
But that bug is still not completely fixed.

https://rise4fun.com/Alive/5KQ

  Name: umax
  Pre: C1 u>= C0
  %a = add nuw i8 %x, C0
  %cond = icmp ugt i8 %a, C1
  %r = select i1 %cond, i8 %a, i8 C1
  =>
  %c2 = icmp ugt i8 %x, C1-C0
  %u2 = select i1 %c2, i8 %x, i8 C1-C0
  %r = add nuw i8 %u2, C0

  Name: umin
  Pre: C1 u>= C0
  %a = add nuw i32 %x, C0
  %cond = icmp ult i32 %a, C1
  %r = select i1 %cond, i32 %a, i32 C1
  =>
  %c2 = icmp ult i32 %x, C1-C0
  %u2 = select i1 %c2, i32 %x, i32 C1-C0
  %r = add nuw i32 %u2, C0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355221 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] add tests for umin/umax narrowing (PR14613); NFC
Sanjay Patel [Fri, 1 Mar 2019 19:42:34 +0000 (19:42 +0000)]
[InstCombine] add tests for umin/umax narrowing (PR14613); NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355220 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[MIPS GlobalISel] Fix mul operands"
Vlad Tsyrklevich [Fri, 1 Mar 2019 18:58:22 +0000 (18:58 +0000)]
Revert "[MIPS GlobalISel] Fix mul operands"

This reverts commit r355178, it is causing ASan failures on the
sanitizer bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355219 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoELF: Change FileSize back to a uint64_t.
Peter Collingbourne [Fri, 1 Mar 2019 18:53:41 +0000 (18:53 +0000)]
ELF: Change FileSize back to a uint64_t.

This lets us detect file size overflows when creating a 64-bit binary on
a 32-bit machine.

Differential Revision: https://reviews.llvm.org/D58840

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355218 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LICM] Infer proper alignment from loads during scalar promotion
Philip Reames [Fri, 1 Mar 2019 18:45:05 +0000 (18:45 +0000)]
[LICM] Infer proper alignment from loads during scalar promotion

This patch fixes an issue where we would compute an unnecessarily small alignment during scalar promotion when no store is not to be guaranteed to execute, but we've proven load speculation safety. Since speculating a load requires proving the existing alignment is valid at the new location (see Loads.cpp), we can use the alignment fact from the load.

For non-atomics, this is a performance problem. For atomics, this is a correctness issue, though an *incredibly* rare one to see in practice. For atomics, we might not be able to lower an improperly aligned load or store (i.e. i32 align 1). If such an instruction makes it all the way to codegen, we *may* fail to codegen the operation, or we may simply generate a slow call to a library function. The part that makes this super hard to see in practice is that the memory location actually *is* well aligned, and instcombine knows that. So, to see a failure, you have to have a) hit the bug in LICM, b) somehow hit a depth limit in InstCombine/ValueTracking to avoid fixing the alignment, and c) then have generated an instruction which fails codegen rather than simply emitting a slow libcall. All around, pretty hard to hit.

Differential Revision: https://reviews.llvm.org/D58809

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355217 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Remove the default parameter in ProfileSummary API. NFC
Rong Xu [Fri, 1 Mar 2019 18:36:24 +0000 (18:36 +0000)]
[PGO] Remove the default parameter in ProfileSummary API. NFC

Remove the default parameter in setProfileSummary() and getSummary().
This is a follow-up of r355131.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355216 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Tests] More missing atomicrmw combines
Philip Reames [Fri, 1 Mar 2019 18:24:05 +0000 (18:24 +0000)]
[Tests] More missing atomicrmw combines

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355215 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Tests] Add tests for missed optimizations of saturating and idempotent FP atomicrmws
Philip Reames [Fri, 1 Mar 2019 18:10:37 +0000 (18:10 +0000)]
[Tests] Add tests for missed optimizations of saturating and idempotent FP atomicrmws

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355212 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] Extend "idempotent" atomicrmw optimizations to floating point
Philip Reames [Fri, 1 Mar 2019 18:00:07 +0000 (18:00 +0000)]
[InstCombine] Extend "idempotent" atomicrmw optimizations to floating point

An idempotent atomicrmw is one that does not change memory in the process of execution.  We have already added handling for the various integer operations; this patch extends the same handling to floating point operations which were recently added to IR.

Note: At the moment, we canonicalize idempotent fsub to fadd when ordering requirements prevent us from using a load.  As discussed in the review, I will be replacing this with canonicalizing both floating point ops to integer ops in the near future.

Differential Revision: https://reviews.llvm.org/D58251

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355210 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[WebAssembly] Lower SIMD shifts since they are fixed in V8"
Thomas Lively [Fri, 1 Mar 2019 17:43:55 +0000 (17:43 +0000)]
Revert "[WebAssembly] Lower SIMD shifts since they are fixed in V8"

They weren't fixed in V8. Oops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355208 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-readobj] Display section names for STT_SECTION symbols.
Matt Davis [Fri, 1 Mar 2019 17:31:32 +0000 (17:31 +0000)]
[llvm-readobj] Display section names for STT_SECTION symbols.

Summary:
This patch will obtain the section name for symbols that refer to a section.  Prior to this patch the Name field for STT_SECTIONs was blank, now it is populated.

Before:
```
Symbol table '.symtab' contains 6 entries:
   Num:    Value          Size Type    Bind   Vis      Ndx Name
     0: 0000000000000000     0 NOTYPE  LOCAL  DEFAULT  UND
     1: 0000000000000000     0 SECTION LOCAL  DEFAULT    1
     2: 0000000000000000     0 SECTION LOCAL  DEFAULT    3
     3: 0000000000000000     0 SECTION LOCAL  DEFAULT    4
     4: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT  UND _GLOBAL_OFFSET_TABLE_
     5: 0000000000000000     0 TLS     GLOBAL DEFAULT  UND sym
```

With this patch:
```
Symbol table '.symtab' contains 6 entries:
   Num:    Value          Size Type    Bind   Vis      Ndx Name
     0: 0000000000000000     0 NOTYPE  LOCAL  DEFAULT  UND
     1: 0000000000000000     0 SECTION LOCAL  DEFAULT    1 .text
     2: 0000000000000000     0 SECTION LOCAL  DEFAULT    3 .data
     3: 0000000000000000     0 SECTION LOCAL  DEFAULT    4 .bss
     4: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT  UND _GLOBAL_OFFSET_TABLE_
     5: 0000000000000000     0 TLS     GLOBAL DEFAULT  UND sym
```

This fixes PR40788

Reviewers: jhenderson, rupprecht, espindola

Reviewed By: rupprecht

Subscribers: emaste, javed.absar, arichardson, MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58796

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355207 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] add tests for add+umin/umax canonicalization; NFC
Sanjay Patel [Fri, 1 Mar 2019 17:29:10 +0000 (17:29 +0000)]
[InstCombine] add tests for add+umin/umax canonicalization; NFC

Fixing this should solve the biggest part of the vector problems seen in:
https://bugs.llvm.org/show_bug.cgi?id=14613

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355206 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoHide two unused debugging methods, NFCI.
Jonas Hahnfeld [Fri, 1 Mar 2019 17:15:21 +0000 (17:15 +0000)]
Hide two unused debugging methods, NFCI.

GCC correctly moans that PlainCFGBuilder::isExternalDef(llvm::Value*) and
StackSafetyDataFlowAnalysis::verifyFixedPoint() are defined but not used
in Release builds. Hide them behind 'ifndef NDEBUG'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355205 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTry to fix NetBSD buildbot breakage introduced in D57463.
Manman Ren [Fri, 1 Mar 2019 15:25:24 +0000 (15:25 +0000)]
Try to fix NetBSD buildbot breakage introduced in D57463.

By including the header file in the source.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355202 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer
Oliver Stannard [Fri, 1 Mar 2019 14:20:28 +0000 (14:20 +0000)]
[ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer

The new addressing mode added for the v8.2A FP16 instructions uses bit 8 of the
immediate to encode the sign of the offset, like the other FP loads/stores, so
need to be treated the same way.

Differential revision: https://reviews.llvm.org/D58816

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355201 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] Consider undefined-on-NaN conditions in checkVSELConstraints
Oliver Stannard [Fri, 1 Mar 2019 13:58:25 +0000 (13:58 +0000)]
[ARM] Consider undefined-on-NaN conditions in checkVSELConstraints

This function was not checking for the condition code variants which are
undefined if either input is NaN, so we were missing selection of the VSEL
instruction in some cases when using -fno-honor-nans or -ffast-math.

Differential revision: https://reviews.llvm.org/D58812

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355199 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Regenerate legalize test files
Simon Pilgrim [Fri, 1 Mar 2019 13:13:40 +0000 (13:13 +0000)]
[X86] Regenerate legalize test files

Noticed while getting update_mir_test_checks.py to work on python3

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355198 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Thumb] Add some integer abs testcases for different typesizes.
Simon Pilgrim [Fri, 1 Mar 2019 12:08:50 +0000 (12:08 +0000)]
[Thumb] Add some integer abs testcases for different typesizes.

Committed on behalf of @ikulagin (Ivan Kulagin)

Differential Revision: https://reviews.llvm.org/D52138

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355197 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[yaml2obj] - Allow setting custom sh_info for RawContentSection sections.
George Rimar [Fri, 1 Mar 2019 10:18:16 +0000 (10:18 +0000)]
[yaml2obj] - Allow setting custom sh_info for RawContentSection sections.

This is for tweaking SHT_SYMTAB sections.
Their sh_info contains the (number of symbols + 1) usually.
But for creating invalid inputs for test cases it would be convenient
to allow explicitly override this field from YAML.

Differential revision: https://reviews.llvm.org/D58779

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355193 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago Attempt to fix buildbot after r354972 [#2]. NFCI.
Alexey Lapshin [Fri, 1 Mar 2019 10:15:18 +0000 (10:15 +0000)]
Attempt to fix buildbot after r354972 [#2]. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355192 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM GlobalISel] Support G_CTLZ for Thumb2
Diana Picus [Fri, 1 Mar 2019 10:12:28 +0000 (10:12 +0000)]
[ARM GlobalISel] Support G_CTLZ for Thumb2

Same as ARM mode but with different opcode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355191 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM GlobalISel] Check target flags in test. NFCI
Diana Picus [Fri, 1 Mar 2019 10:01:22 +0000 (10:01 +0000)]
[ARM GlobalISel] Check target flags in test. NFCI

There was a time when we couldn't dump target-specific flags such as
arm-sbrel etc, so the tests didn't check for them. We can now be more
specific in our tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355189 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Tablegen] Add support for the !mul operator.
Nicola Zaghen [Fri, 1 Mar 2019 09:46:29 +0000 (09:46 +0000)]
[Tablegen] Add support for the !mul operator.

This is a small addition to arithmetic operations that improves
expressiveness of the language.

Differential Revision: https://reviews.llvm.org/D58775

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355187 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] Add armv8a triple to test check updaters
Oliver Stannard [Fri, 1 Mar 2019 09:26:21 +0000 (09:26 +0000)]
[ARM] Add armv8a triple to test check updaters

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355186 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CommandLine] Allow grouping options which can have values.
Igor Kudrin [Fri, 1 Mar 2019 09:22:42 +0000 (09:22 +0000)]
[CommandLine] Allow grouping options which can have values.

This patch allows all forms of values for options to be used at the end
of a group. With the fix, it is possible to follow the way GNU binutils
tools handle grouping options better. For example, the -j option can be
used with objdump in any of the following ways:

$ objdump -d -j .text a.o
$ objdump -d -j.text a.o
$ objdump -dj .text a.o
$ objdump -dj.text a.o

Differential Revision: https://reviews.llvm.org/D58711

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355185 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CommandLine] Do not crash if an option has both ValueRequired and Grouping.
Igor Kudrin [Fri, 1 Mar 2019 09:20:56 +0000 (09:20 +0000)]
[CommandLine] Do not crash if an option has both ValueRequired and Grouping.

If an option, which requires a value, has a `cl::Grouping` formatting
modifier, it works well as far as it is used at the end of a group,
or as a separate argument. However, if the option appears accidentally
in the middle of a group, the program just crashes. This patch prints
an error message instead.

Differential Revision: https://reviews.llvm.org/D58499

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355184 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-readobj]Add test showing behaviour of thin archive member path printing
James Henderson [Fri, 1 Mar 2019 09:12:38 +0000 (09:12 +0000)]
[llvm-readobj]Add test showing behaviour of thin archive member path printing

This was a test requested in https://reviews.llvm.org/D58677.

Reviewed by: rupprecht, grimar, Higuoxing

Differential Revision: https://reviews.llvm.org/D5877

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355183 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] Mark ds instructions as meybeAtomic
Stanislav Mekhanoshin [Fri, 1 Mar 2019 07:59:17 +0000 (07:59 +0000)]
[AMDGPU] Mark ds instructions as meybeAtomic

These were not recognized as potential atomics by memory legalizer.
The test was working not because legalizer did a right thing, but
because it has skipped all these instructions. When I have fixed
DS desciption test started to fail because region address has
changed from 4 to 2 a while ago.

Differential Revision: https://reviews.llvm.org/D58802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355179 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MIPS GlobalISel] Fix mul operands
Petar Avramovic [Fri, 1 Mar 2019 07:35:57 +0000 (07:35 +0000)]
[MIPS GlobalISel] Fix mul operands

Unsigned mul high for MIPS32 is selected into two PseudoInstructions:
PseudoMULTu and PseudoMFHI that use accumulator register class ACC64 for
some of its operands. Registers in this class have appropriate hi and lo
register as subregisters: $lo0 and $hi0 are subregisters of $ac0 etc.
mul instruction implicit-defs $lo0 and $hi0 according to MipsInstrInfo.td.
In functions where mul and PseudoMULTu are present fastRegisterAllocator
will "run out of registers during register allocation" because
'calcSpillCost' for $ac0 will return spillImpossible because subregisters
$lo0 and $hi0 of $ac0 are reserved by mul instruction above. A solution is
to mark implicit-defs of $lo0 and $hi0 as dead in mul instruction.

Differential Revision: https://reviews.llvm.org/D58715

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355178 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MIPS GlobalISel] Select G_UMULH
Petar Avramovic [Fri, 1 Mar 2019 07:25:44 +0000 (07:25 +0000)]
[MIPS GlobalISel] Select G_UMULH

Legalize G_UMULO and select G_UMULH for MIPS32.

Differential Revision: https://reviews.llvm.org/D58714

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355177 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ConstantHoisting] Call cleanup() in ConstantHoistingPass::runImpl to avoid dangling...
Fangrui Song [Fri, 1 Mar 2019 05:27:01 +0000 (05:27 +0000)]
[ConstantHoisting] Call cleanup() in ConstantHoistingPass::runImpl to avoid dangling elements in ConstIntInfoVec for new PM

Summary:
ConstIntInfoVec contains elements extracted from the previous function.
In new PM, releaseMemory() is not called and the dangling elements can
cause segfault in findConstantInsertionPoint.

Rename releaseMemory() to cleanup() to deliver the idea that it is
mandatory and call cleanup() in ConstantHoistingPass::runImpl to fix
this.

Reviewers: ormris, zzheng, dmgreen, wmi

Reviewed By: ormris, wmi

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58589

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355174 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Subtarget] Remove static global constructor call from the tablegened subtarget featu...
Craig Topper [Fri, 1 Mar 2019 02:19:26 +0000 (02:19 +0000)]
[Subtarget] Remove static global constructor call from the tablegened subtarget feature tables

Subtarget features are stored in a std::bitset that has been subclassed. There is a special constructor to allow the tablegen files to provide a list of bits to initialize the std::bitset to. This constructor isn't constexpr and std::bitset doesn't support many constexpr operations either. This results in a static global constructor being used to initialize the feature bitsets in these files at startup.

To fix this I've introduced a new FeatureBitArray class that holds three 64-bit values representing the initial bit values and taught tablegen to emit hex constants for them based on the feature enum values. This makes the tablegen files less readable than they were before. I can add the list of features back as a comment if we think that's important.

I've added a method to convert from this class into the std::bitset subclass we had before. I considered making the new FeatureBitArray class just implement the std::bitset interface we need instead, but thought I'd see how others felts about that first.

I've simplified the interfaces to SetImpliedBits and ClearImpliedBits a little minimize the number of times we need to convert to the bitset.

This removes about 27K from my local release+asserts build of llc.

Differential Revision: https://reviews.llvm.org/D58520

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355167 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Lower SIMD shifts since they are fixed in V8
Thomas Lively [Fri, 1 Mar 2019 01:38:54 +0000 (01:38 +0000)]
[WebAssembly] Lower SIMD shifts since they are fixed in V8

Reviewers: sbc100

Subscribers: dschuff, jgravelle-google, hiraditya, aheejin, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58800

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355163 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU/GlobalISel: Implement select for G_INSERT
Tom Stellard [Fri, 1 Mar 2019 00:50:26 +0000 (00:50 +0000)]
AMDGPU/GlobalISel: Implement select for G_INSERT

Re-commit r344310.

Reviewers: arsenm

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D53116

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355159 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Fix crash when @llvm.global_dtors is external
Thomas Lively [Fri, 1 Mar 2019 00:12:13 +0000 (00:12 +0000)]
[WebAssembly] Fix crash when @llvm.global_dtors is external

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58799

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355157 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU/GlobalISel: Implement select for G_EXTRACT
Tom Stellard [Thu, 28 Feb 2019 23:37:48 +0000 (23:37 +0000)]
AMDGPU/GlobalISel: Implement select for G_EXTRACT

Reviewers: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D49714

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355156 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PPC] Secure PLT only has meaning for PIC
Joerg Sonnenberger [Thu, 28 Feb 2019 23:33:09 +0000 (23:33 +0000)]
[PPC] Secure PLT only has meaning for PIC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355154 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[sancov] Instrument reachable blocks that end in unreachable
Reid Kleckner [Thu, 28 Feb 2019 22:54:30 +0000 (22:54 +0000)]
[sancov] Instrument reachable blocks that end in unreachable

Summary:
These sorts of blocks often contain calls to noreturn functions, like
longjmp, throw, or trap. If they don't end the program, they are
"interesting" from the perspective of sanitizer coverage, so we should
instrument them. This was discussed in https://reviews.llvm.org/D57982.

Reviewers: kcc, vitalybuka

Subscribers: llvm-commits, craig.topper, efriedma, morehouse, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58740

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355152 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agollvm-readobj: Try the DWARF CFI dumper on all machines.
Peter Collingbourne [Thu, 28 Feb 2019 22:42:55 +0000 (22:42 +0000)]
llvm-readobj: Try the DWARF CFI dumper on all machines.

There's no reason to limit the DWARF CFI dumper to EM_386 and EM_X86_64;
ELF files could contain DWARF CFI on almost any platform (even 32-bit ARM;
NetBSD uses DWARF CFI on that platform). So start using the DWARF CFI dumper
unconditionally so that we can dump .eh_frame sections on the remaining ELF
platforms as well as in NetBSD binaries.

Differential Revision: https://reviews.llvm.org/D58761

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355151 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUpdate testcase since llvm-dwarfdump got more accurate in r355148.
Adrian Prantl [Thu, 28 Feb 2019 22:26:00 +0000 (22:26 +0000)]
Update testcase since llvm-dwarfdump got more accurate in r355148.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355150 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agodsymutil support for DW_OP_convert
Adrian Prantl [Thu, 28 Feb 2019 22:12:32 +0000 (22:12 +0000)]
dsymutil support for DW_OP_convert

Add support for cloning DWARF expressions that contain base type DIE
references in dsymutil.

<rdar://problem/48167812>

Differential Revision: https://reviews.llvm.org/D58534

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355148 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agogn build: Merge r355133.
Peter Collingbourne [Thu, 28 Feb 2019 22:12:09 +0000 (22:12 +0000)]
gn build: Merge r355133.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355147 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agogn build: Merge r355035
Nico Weber [Thu, 28 Feb 2019 22:08:18 +0000 (22:08 +0000)]
gn build: Merge r355035

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355146 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agogn build: Merge r355024
Nico Weber [Thu, 28 Feb 2019 22:07:37 +0000 (22:07 +0000)]
gn build: Merge r355024

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355145 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTrying to fix bot breakage due to symbols not defined for WINDOWS!
Manman Ren [Thu, 28 Feb 2019 20:48:19 +0000 (20:48 +0000)]
Trying to fix bot breakage due to symbols not defined for WINDOWS!

Follow up to r355133

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355139 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] [Windows] Don't skip constructing UnwindHelp.
Eli Friedman [Thu, 28 Feb 2019 20:38:45 +0000 (20:38 +0000)]
[AArch64] [Windows] Don't skip constructing UnwindHelp.

In certain cases, the first non-frame-setup instruction in a function is
a branch.  For example, it could be a cbz on an argument.  Make sure we
correctly allocate the UnwindHelp, and find an appropriate register to
use to initialize it.

Fixes https://bugs.llvm.org/show_bug.cgi?id=40184

Differential Revision: https://reviews.llvm.org/D58752

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355136 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] [Windows] Fix llvm-readobj -unwind output with many epilogs.
Eli Friedman [Thu, 28 Feb 2019 20:33:22 +0000 (20:33 +0000)]
[AArch64] [Windows] Fix llvm-readobj -unwind output with many epilogs.

The number of epilog scopes may not fit into a uint8_t.

Fixes https://bugs.llvm.org/show_bug.cgi?id=40855

Differential Revision: https://reviews.llvm.org/D58693

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355135 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Improve FP16 vector convert from short instructions.
Abderrazek Zaafrani [Thu, 28 Feb 2019 20:21:46 +0000 (20:21 +0000)]
[AArch64] Improve FP16 vector convert from short instructions.
https://reviews.llvm.org/D58563

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355134 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd a module pass for order file instrumentation
Manman Ren [Thu, 28 Feb 2019 20:13:38 +0000 (20:13 +0000)]
Add a module pass for order file instrumentation

The basic idea of the pass is to use a circular buffer to log the execution ordering of the functions. We only log the function when it is first executed. We use a 8-byte hash to log the function symbol name.

In this pass, we add three global variables:
(1) an order file buffer: a circular buffer at its own llvm section.
(2) a bitmap for each module: one byte for each function to say if the function is already executed.
(3) a global index to the order file buffer.

At the function prologue, if the function has not been executed (by checking the bitmap), log the function hash, then atomically increase the index.

Differential Revision:  https://reviews.llvm.org/D57463

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355133 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PGO] Context sensitive PGO (part 2)
Rong Xu [Thu, 28 Feb 2019 19:55:07 +0000 (19:55 +0000)]
[PGO] Context sensitive PGO (part 2)

Part 2 of CSPGO changes (mostly related to ProfileSummary).
Note that I use a default parameter in setProfileSummary() and getSummary().
This is to break the dependency in clang. I will make the parameter explicit
after changing clang in a separated patch.

Differential Revision: https://reviews.llvm.org/D54175

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355131 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86] scalarize extract element 0 of FP math
Sanjay Patel [Thu, 28 Feb 2019 19:47:04 +0000 (19:47 +0000)]
[x86] scalarize extract element 0 of FP math

This is another step towards ensuring that we produce the optimal code for reductions,
but there are other potential benefits as seen in the tests diffs:

  1. Memory loads may get scalarized resulting in more efficient code.
  2. Memory stores may get scalarized resulting in more efficient code.
  3. Complex ops like fdiv/sqrt get scalarized which may be faster instructions depending on uarch.
  4. Even simple ops like addss/subss/mulss/roundss may result in faster operation/less frequency throttling when scalarized depending on uarch.

The TODO comment suggests 1 or more follow-ups for opcodes that can currently result in regressions.

Differential Revision: https://reviews.llvm.org/D58282

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355130 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agobpf: disassembler support for XADD under sub-register mode
Jiong Wang [Thu, 28 Feb 2019 19:22:34 +0000 (19:22 +0000)]
bpf: disassembler support for XADD under sub-register mode

Like the other load/store instructions, "w" register is preferred when
disassembling BPF_STX | BPF_W | BPF_XADD.

v1 -> v2:
 - Updated testcase insn-unit.s (Yonghong)

Acked-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355127 91177308-0d34-0410-b5e6-96231b3b80d8