Chris Bieneman [Fri, 29 May 2015 18:34:41 +0000 (18:34 +0000)]
[CMake] Bug 23468 - LLVM_OPTIMIZED_TABLEGEN does not work with Visual Studio
Summary: Multi-configuration builds put their binaries into ${CMAKE_BINARY_DIR}/Release/bin/. The table-gen cross-compilation support needs to take that into account.
where simply removing the copies would have RCX undefined as in terms of
machine operands only the ECX part of it is defined. The machine
verifier would complain about this so 169060 changed such COPY
instructions into KILL instructions so some super-register imp-defs
would be preserved. In r199797 it was finally decided to always do this
regardless of super-register defs.
But this is wrong, consider:
R1 = COPY R0
...
R0 = COPY R1
getting changed to:
R1 = KILL R0
...
R0 = KILL R1
It now looks like R0 dies at the first KILL and won't be alive until the
second KILL, while in reality R0 is alive and must not change in this
part of the program.
As this only happens after register allocation there is not much code
still performing liveness queries so the issue was not noticed. In fact
I didn't manage to create a testcase for this, without unrelated changes
I am working on at the moment.
The fix is simple: As of r223896 the MachineVerifier allows reads from
partially defined registers, so the whole transforming COPY->KILL thing
is not necessary anymore. This patch also changes a similar (but more
benign case as the def and src are the same register) case in the
VirtRegRewriter.
Frederic Riss [Fri, 29 May 2015 17:56:28 +0000 (17:56 +0000)]
[YAMLIO] Make line-wrapping configurable and test it.
Summary:
We would wrap flow mappings and sequences when they go over a hardcoded 70
characters limit. Make the wrapping column configurable (and default to 70
co the change should be NFC for current users). Passing 0 allows to completely
suppress the wrapping which makes it easier to handle in tools like FileCheck.
Nemanja Ivanovic [Fri, 29 May 2015 17:13:25 +0000 (17:13 +0000)]
Add support for VSX FMA single-precision instructions to the PPC back end
This patch corresponds to review:
http://reviews.llvm.org/D9941
It adds the various FMA instructions introduced in the version 2.07 of
the ISA along with the testing for them. These are operations on single
precision scalar values in VSX registers.
Alex Lorenz [Fri, 29 May 2015 17:05:41 +0000 (17:05 +0000)]
MIR Serialization: use correct line and column numbers for LLVM IR errors.
This commit translates the line and column numbers for LLVM IR
errors from the numbers in the YAML block scalar to the numbers
in the MIR file so that the MIRParser users can report LLVM IR
errors with the correct line and column numbers.
Reid Kleckner [Fri, 29 May 2015 17:00:57 +0000 (17:00 +0000)]
[WinEH] Emit EH tables for __CxxFrameHandler3 on 32-bit x86
Small (really small!) C++ exception handling examples work on 32-bit x86
now.
This change disables the use of .seh_* directives in WinException when
CFI is not in use. It also uses absolute symbol references in the tables
instead of imagerel32 relocations.
Also fixes a cache invalidation bug in MMI personality classification.
Jingyue Wu [Fri, 29 May 2015 17:00:27 +0000 (17:00 +0000)]
[NVPTXFavorNonGenericAddrSpaces] recursively trace into GEP and BitCast
Summary:
This patch allows NVPTXFavorNonGenericAddrSpaces to remove addrspacecast
from longer chains consisting of GEPs and BitCasts. For example, it can
now optimize
%0 = addrspacecast [10 x float] addrspace(3)* @a to [10 x float]*
%1 = gep [10 x float]* %0, i64 0, i64 %i
%2 = bitcast float* %1 to i32*
%3 = load i32* %2 ; emits ld.u32
Jingyue Wu [Fri, 29 May 2015 16:58:08 +0000 (16:58 +0000)]
[DependenceAnalysis] Extend unifySubscriptType for handling coupled subscript groups.
Summary:
In continuation to an earlier commit to DependenceAnalysis.cpp by jingyue (r222100), the type for all subscripts in a coupled group need to be the same since constraints from one subscript may be propagated to another during testing. During testing, new SCEVs may be created and the operands for these need to be the same.
This patch extends unifySubscriptType() to work on lists of subscript pairs, ensuring a common extended type for all of them.
Test Plan:
Added a test case to NonCanonicalizedSubscript.ll which causes dependence analysis to crash without this fix.
Colin LeMahieu [Fri, 29 May 2015 14:44:13 +0000 (14:44 +0000)]
[Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch.
Matthias Braun [Fri, 29 May 2015 02:56:46 +0000 (02:56 +0000)]
CodeGen: Use mop_iterator instead of MIOperands/ConstMIOperands
MIOperands/ConstMIOperands are classes iterating over the MachineOperand
of a MachineInstr, however MachineInstr::mop_iterator does the same
thing.
I assume these two iterators exist to have a uniform interface to
iterate over the operands of a machine instruction bundle and a single
machine instruction. However in practice I find it more confusing to have 2
different iterator classes, so this patch transforms (nearly all) the
code to use mop_iterators.
The only exception being MIOperands::anlayzePhysReg() and
MIOperands::analyzeVirtReg() still needing an equivalent, I leave that
as an exercise for the next patch.
This version is slightly modified from the proposed revision in that it
introduces MachineInstr::getOperandNo to avoid the extra counting
variable in the few loops that previously used MIOperands::getOperandNo.
Ahmed Bougacha [Fri, 29 May 2015 01:03:37 +0000 (01:03 +0000)]
[TableGen][AsmMatcherEmitter] Only parse isolated tokens as registers.
Fixes PR23455, where, when TableGen generates the matcher from the
AsmString, it splits "cmp${cc}ss" into tokens, and the "ss" suffix
is recognized as the SS register.
I can't think of a situation where that's a feature, not a bug, hence:
when a token is "isolated", i.e., it is followed and preceded by
separators, it shouldn't be parsed as a register.
About pristine regsiters:
Pristine registers "hold a value that is useless to the current
function, but that must be preserved - they are callee saved registers
that have not been saved." This concept saves compile time as it frees
the prologue/epilogue inserter from adding every such register to every
basic blocks live-in list.
However the current code in getPristineRegs is formulated in a
complicated way: Inside the function prologue and epilogue all callee
saves are considered pristine, while in the rest of the code only the
non-saved ones are considered pristine. This requires logic to
differentiate between prologue/epilogue and the rest and in the presence
of shrink-wrapping this even becomes complicated/expensive. It's also
unnecessary because the prologue epilogue inserters already mark
callee-save registers that are saved/restores properly in the respective
blocks in the prologue/epilogue (see updateLiveness() in
PrologueEpilogueInserter.cpp). So only declaring non-saved/restored
callee saved registers as pristine just works.
Chandler Carruth [Thu, 28 May 2015 22:46:48 +0000 (22:46 +0000)]
[x86] Move the vector popcount tests into non-ISA files, and instead
organize them by the width of vector.
This makes it a lot easier to see that we're covering all of the vector
types but not doing so excessively. This also adds tests across the
spectrum of SSE versions in addition to the AVX versions.
If you're really tired of seeing the *massive* sprawl of scalarized code
for this, don't worry, I'm just about to land Bruno's patch that
dramatically improve the situation for SSSE3 and newer.
Alex Lorenz [Thu, 28 May 2015 22:41:12 +0000 (22:41 +0000)]
MIR Serialization: print and parse machine function names.
This commit introduces a serializable structure called
'llvm::yaml::MachineFunction' that stores the machine
function's name. This structure will mirror the machine
function's state in the future.
This commit prints machine functions as YAML documents
containing a YAML mapping that stores the state of a machine
function. This commit also parses the YAML documents
that contain the machine functions.
Reid Kleckner [Thu, 28 May 2015 22:00:24 +0000 (22:00 +0000)]
[WinEH] Start inserting state number stores for C++ EH
This moves all the state numbering code for C++ EH to WinEHPrepare so
that we can call it from the X86 state numbering IR pass that runs
before isel.
Now we just call the same state numbering machinery and insert a bunch
of stores. It also populates MachineModuleInfo with information about
the current function.
Wei Mi [Thu, 28 May 2015 21:49:07 +0000 (21:49 +0000)]
Enable exitValue rewrite only when the cost of expansion is low.
The patch evaluates the expansion cost of exitValue in indVarSimplify pass, and only does the rewriting when the expansion cost is low or loop can be deleted with the rewriting. It provides an option "-replexitval=" to control the default aggressiveness of the exitvalue rewriting. It also fixes some missing cases in SCEVExpander::isHighCostExpansionHelper to enhance the evaluation of SCEV expansion cost.
Chris Bieneman [Thu, 28 May 2015 21:31:22 +0000 (21:31 +0000)]
Re-landing "Refactoring cl::list_storage from "is a" to "has a" std::vector."
Originally landed r238485
MSVC resolves identifiers differently from Clang and GCC, this resulted in build bot failures. This pach re-lands r238485 and fixes the build failures.
Reid Kleckner [Thu, 28 May 2015 20:44:28 +0000 (20:44 +0000)]
Disable x86 tail call optimizations that jump through GOT
For x86 targets, do not do sibling call optimization when materializing
the callee's address would require a GOT relocation. We can still do
tail calls to internal functions, hidden functions, and protected
functions, because they do not require this kind of relocation. It is
still possible to get GOT relocations when the user explicitly asks for
it with musttail or -tailcallopt, both of which are supposed to
guarantee TCO.
Chris Bieneman [Thu, 28 May 2015 20:38:12 +0000 (20:38 +0000)]
Refactoring cl::list_storage from "is a" to "has a" std::vector.
Summary: This isn't necessarily an ideal change, and I want to at least reduce the API surface area, but for the new API we really shouldn't be relying on cl::list being a std::vector.
Daniel Sanders [Thu, 28 May 2015 20:30:32 +0000 (20:30 +0000)]
Revert r238427 - [mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only.
It caused a smaller number of failures than the previous attempt at committing but still caused a couple on the llvm-linux-mips builder. Reverting while I investigate the remainder.
Thumb2: Modify codegen for memcpy intrinsic to prefer LDM/STM.
We were previously codegen'ing these as regular load/store operations and
hoping that the register allocator would allocate registers in ascending order
so that we could apply an LDM/STM combine after register allocation. According
to the commit that first introduced this code (r37179), we planned to teach
the register allocator to allocate the registers in ascending order. This
never got implemented, and up to now we've been stuck with very poor codegen.
A much simpler approach for achiveing better codegen is to create LDM/STM
instructions with identical sets of virtual registers, let the register
allocator pick arbitrary registers and order register lists when printing an
MCInst. This approach also avoids the need to repeatedly calculate offsets
which ultimately ought to be eliminated pre-RA in order to decrease register
pressure.
This is implemented by lowering the memcpy intrinsic to a series of SD-only
MCOPY pseudo-instructions which performs a memory copy using a given number
of registers. During SD->MI lowering, we lower MCOPY to LDM/STM. This is a
little unusual, but it avoids the need to encode register lists in the SD,
and we can take advantage of SD use lists to decide whether to use the _UPD
variant of the instructions.
Pete Cooper [Thu, 28 May 2015 19:43:06 +0000 (19:43 +0000)]
Add BranchProbabilityInfo::releaseMemory to clear the Weights field.
BranchProbabilityInfo was leaking 3MB of memory when running 'opt -O2 verify-uselistorder.lto.bc'. This was due to the Weights member not being cleared once the pass is no longer needed.
This adds the releaseMemory override to clear that field. The other fields are cleared at the end of runOnFunction so can stay there.
Alexey Samsonov [Thu, 28 May 2015 18:35:18 +0000 (18:35 +0000)]
Add llvm-dwarfdump-fuzzer that uses LibFuzzer to fuzz llvm-dwarfdump tool.
The fuzzer is very simple, but not quite useful at the moment: it's unable
to discover "interesting" examples, as LLVMObject library is terrible at
error recovery, calling "report_fatal_error()" far too often.
AsmPrinter: Suppress warnings on GCC from r238362, NFC
GCC seems to have some overzealous warnings about strict aliasing.
Rafael reports that this patch suppresses them on GCC 4.9, and I'm
hoping this will work for GCC 4.7 as well. I'll watch [1] and iterate
if necessary.
Owen Anderson [Thu, 28 May 2015 18:03:07 +0000 (18:03 +0000)]
Expand the Flags field of MCInstrDesc to 64 bits, while simultaneously
shrinking the Size and NumDefs fields to offset the size growth, and
reordering the fields to preserve a good packing.
This is necessary in the short term for adding a convergent flag, and
simultaneously future-proofs us against more flags being added in the
future.
Ed Maste [Thu, 28 May 2015 15:38:17 +0000 (15:38 +0000)]
DebugInfo: .debug_line DWARF64 support
This adds support for the 64-bit DWARF format, but is still limited to
less than 4GB of debug data by the DataExtractor class. Some versions
of the GNU MIPS toolchain generate 64-Bit DWARF even though it isn't
actually necessary.
Rafael Espindola [Thu, 28 May 2015 15:20:00 +0000 (15:20 +0000)]
Don't create an unused _GLOBAL_OFFSET_TABLE_.
This was a bug for bug compatibility with gas that is completely unnecessary.
If a _GLOBAL_OFFSET_TABLE_ symbol is used, it will already be created by
the time we get to the ELF writer.
Daniel Sanders [Thu, 28 May 2015 14:52:15 +0000 (14:52 +0000)]
[mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only.
Summary:
Following on from r209907 which made personality encodings indirect, do the
same for TType encodings. This fixes the case where a try/catch block needs
to generate references to, for example, std::exception in the
.gcc_except_table.
Benjamin Kramer [Thu, 28 May 2015 12:55:43 +0000 (12:55 +0000)]
[AsmPrinter] Destroy allocated DIEAbbrevs on teardown.
DIEAbbrev contains a SmallVector that can leak for overly large abbrevs. They
used to be owned by the DIE, but after the recent refactoring DWARFFile
allocates its own abbrevs.
Canonicalizing 'x [+-] (-Constant * y)' is not a win if we don't *know*
we will open up CSE opportunities.
If the multiply was 'nsw', then negating 'y' requires us to clear the
'nsw' flag. If this is actually worth pursuing, it is probably more
appropriate to do so in GVN or EarlyCSE.
Chandler Carruth [Thu, 28 May 2015 02:40:15 +0000 (02:40 +0000)]
[x86] Refactor the tests for popcnt.
Extracted from the D6531 patch by Bruno Cardoso Lopes, and re-generated
to reflect the current state of the world. This should let Bruno's D6531
actually show the delta between the approaches by running the x86 test
case update script after re-building.
Change `DIE::addChild()` to return a reference to the just-added node,
and update consumers to use it directly. An upcoming commit will
abstract away (and eventually change) the underlying storage of
`DIE::Children`.
projects / llvm / log