Switch to a range-based for in IfConverter::PredicateBlock and take
MachineInstr& in MaySpeculate to avoid an implicit conversion from
MachineBasicBlock::iterator to MachineInstr*.
This is a mechanical change to make TargetLowering API take MachineInstr&
(instead of MachineInstr*), since the argument is expected to be a valid
MachineInstr. In one case, changed a parameter from MachineInstr* to
MachineBasicBlock::iterator, since it was used as an insertion point.
As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.
Mike Aizatsky [Thu, 30 Jun 2016 20:43:06 +0000 (20:43 +0000)]
[libFuzzer] Let user specify extra stats file.
Summary: If AFL_DRIVER_EXTRA_STATS_FILENAME is set and valid, write to it peak_rss_mb and slowest_unit_time_sec. These are both stats that libFuzzer can print but afl cannot.
Vassil Vassilev [Thu, 30 Jun 2016 20:35:56 +0000 (20:35 +0000)]
[CMake] Module builds depend on target intrinsics_gen to be built first.
When compiling with modules, header A and B can be in the same module M.
B depends on intrinsics_gen and A doesn't. Compiling a source file #include-ing
header A, we implicitly request module M to be built. It puts header A and B in
the same TU and tries to build them. Since B depends on intrinsics_gen (which
might not be built yet) we run into build failures.
Chandler Carruth [Thu, 30 Jun 2016 20:27:54 +0000 (20:27 +0000)]
Introduce a *draft* of a code of conduct for the LLVM community and the
associated reporting guide.
I want to emphasize that at this point these are just drafts!
This is the result of very extended discussion on the mailing lists on
several different threads:
http://lists.llvm.org/pipermail/llvm-dev/2015-October/091218.html
http://lists.llvm.org/pipermail/llvm-dev/2016-May/099120.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151019/307070.html
The reporting guide in particular I anticipate will be shaped somewhat
by the advisory committee when they are selected. But hopefully this
serves as a good starting point and good guidance while the advisory
committee is being sorted out.
I'd like to thank all the folks who contributed to this. Many, *many*
people worked to help with drafting, wording, suggestions, and edits.
Also, this is based on widely used existing codes of coduct as mentioned
in the text, and the original authors of those deserve many thanks as
well.
Wei Mi [Thu, 30 Jun 2016 18:42:56 +0000 (18:42 +0000)]
Refine the set of UniformAfterVectorization instructions.
Except the seed uniform instructions (conditional branch and consecutive ptr
instructions), dependencies to be added into uniform set should only be used
by existing uniform instructions or intructions outside of current loop.
Lang Hames [Thu, 30 Jun 2016 17:43:06 +0000 (17:43 +0000)]
[Support] Fix a bug in ErrorList::join / joinErrors.
When concatenating two error lists the ErrorList::join method (which is called
by joinErrors) was failing to set the checked bit on the second error, leading
to a 'failure to check error' assertion.
Zachary Turner [Thu, 30 Jun 2016 17:43:00 +0000 (17:43 +0000)]
[pdb] Re-add code to write PDB files.
Somehow all the functionality to write PDB files got removed,
probably accidentally when uploading the patch perhaps the wrong
one got uploaded. This re-adds all the code, as well as the
corresponding test.
Adrian Prantl [Thu, 30 Jun 2016 17:15:44 +0000 (17:15 +0000)]
[CMake] Add an LLVM_ENABLE_MODULE_DEBUGGING flag for building with -gmodules.
This flag is only effective in builds with debug info and modules.
The default is On for Darwin only.
This removes a hack that was added for the benefit of x86 codegen.
It prevented shrinking the switch condition even to smaller legal (DataLayout) types.
We have a safety mechanism in CGP after:
http://reviews.llvm.org/rL251857
...so we're free to use the optimal (smallest) IR type now.
David Majnemer [Thu, 30 Jun 2016 03:00:20 +0000 (03:00 +0000)]
[CodeView] Implement support for bitfields in LLVM
CodeView need to know the offset of the storage allocation for a
bitfield. Encode this via the "extraData" field in DIDerivedType and
introduced a new flag, DIFlagBitField, to indicate whether or not a
member is a bitfield.
Chandler Carruth [Thu, 30 Jun 2016 02:32:20 +0000 (02:32 +0000)]
[ADT] Add a new data structure for managing a priority worklist where
re-insertion of entries into the worklist moves them to the end.
This is fairly similar to a SetVector, but helps in the case where in
addition to not inserting duplicates you want to adjust the sequence of
a pop-off-the-back worklist.
I'm not at all attached to the name of this data structure if others
have better suggestions, but this is one that David Majnemer brought up
in IRC discussions that seems plausible.
I've trimmed the interface down somewhat from SetVector's interface
because several things make less sense here IMO: iteration primarily.
I'd prefer to add these back as we have users that need them. My use
case doesn't even need all of what is provided here. =]
I've also included a basic unittest to make sure this functions
reasonably.
This patch makes CFLAA answer some ModRef queries. Because we don't
distinguish between reading/writing when making StratifiedSets, we're
unable to offer any of the readonly-related answers.
Adrian Prantl [Thu, 30 Jun 2016 01:46:49 +0000 (01:46 +0000)]
[CMake] Introduce a LLVM_ENABLE_LOCAL_SUBMODULE_VISIBILITY flag.
On Darwin it is currently impossible to build LLVM with modules
because the Darwin system module map is not compatible with
-fmodules-local-submodule-visibility at this point in time. This
patch makes the flag optional and off by default on Darwin so it
becomes possible to build LLVM with modules again.
Matthias Braun [Thu, 30 Jun 2016 00:23:54 +0000 (00:23 +0000)]
RegisterScavenging: Code cleanup; NFC
- Use range based for loops
- No need for some !Reg checks: isPhysicalRegister() reports false for
NoRegister anyway
- Do not repeat function name in documentation comment.
- Do not repeat documentation comment in implementation when we already
have one at the declaration.
- Factor some common subexpressions out.
- Change file comments to use doxygen syntax.
CodeGen: Add an explicit BuildMI overload for MachineInstr&
Add an explicit overload to BuildMI for MachineInstr& to deal with
insertions inside of instruction bundles.
- Use it to re-implement MachineInstr* to give it coverage.
- Document how the overload for MachineBasicBlock::instr_iterator
differs from that for MachineBasicBlock::iterator (the previous
(implicit) overload for MachineInstr&).
- Add a comment explaining why the MachineInstr& and MachineInstr*
overloads don't universally forward to the
MachineBasicBlock::instr_iterator overload.
Thanks to Justin for noticing the API quirk. While this doesn't fix any
known bugs -- all uses of BuildMI with a MachineInstr& were previously
using MachineBasicBlock::iterator -- it protects against future bugs.
CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
This is mostly a mechanical change to make TargetInstrInfo API take
MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator)
when the argument is expected to be a valid MachineInstr. This is a
general API improvement.
Although it would be possible to do this one function at a time, that
would demand a quadratic amount of churn since many of these functions
call each other. Instead I've done everything as a block and just
updated what was necessary.
This is mostly mechanical fixes: adding and removing `*` and `&`
operators. The only non-mechanical change is to split
ARMBaseInstrInfo::getOperandLatencyImpl out from
ARMBaseInstrInfo::getOperandLatency. Previously, the latter took a
`MachineInstr*` which it updated to the instruction bundle leader; now,
the latter calls the former either with the same `MachineInstr&` or the
bundle leader.
As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.
Note: I updated WebAssembly, Lanai, and AVR (despite being
off-by-default) since it turned out to be easy. I couldn't run tests
for AVR since llc doesn't link with it turned on.
Object: Replace NewArchiveIterator with a simpler NewArchiveMember class. NFCI.
The NewArchiveIterator class has a problem: it requires too much context. Any
memory buffers added to the archive must be stored within an Archive::Member,
which must have an associated Archive. This makes it harder than necessary
to create new archive members (or new archives entirely) from scratch using
memory buffers.
This patch replaces NewArchiveIterator with a NewArchiveMember class that
stores just the memory buffer and the information that goes into the archive
member header.
Where command1 and command2 contain completely different sets of
valid options. This is backwards compatible with previous uses
of llvm cl which did not support subcommands, as any option
which specifies no optional subcommand (e.g. all existing
code) goes into a special "top level" subcommand that expects
dashed options to appear immediately after the program name.
For example, code which is subcommand unaware would generate
a command line such as the following, where no subcommand
is specified:
llvm-foo.exe -q1 -q2
The top level subcommand can co-exist with actual subcommands,
as it is implemented as an actual subcommand which is searched
if no explicit subcommand is specified. So llvm-foo.exe as
specified above could be written so as to support all three
aforementioned command lines simultaneously.
There is one additional "special" subcommand called AllSubCommands,
which can be used to inject an option into every subcommand.
This is useful to support things like help, so that commands
such as:
All work and display the help for the selected subcommand
without having to explicitly go and write code to handle each
one separately.
This patch is submitted without an example of anything actually
using subcommands, but a followup patch will convert the
llvm-pdbdump tool to use subcommands.
Evgeniy Stepanov [Wed, 29 Jun 2016 20:37:43 +0000 (20:37 +0000)]
StackColoring for SafeStack.
This is a fix for PR27842.
An IR-level implementation of stack coloring tailored to work with
SafeStack. It is a bit weaker than the MI implementation in that it
does not the "lifetime start at first access" logic. This can be
improved in the future.
This patch also replaces the naive implementation of stack frame
layout with a greedy algorithm that can split existing stack slots
and even fit small objects inside the alignment padding of other
objects.
Tim Shen [Wed, 29 Jun 2016 20:10:17 +0000 (20:10 +0000)]
[InstCombine] Simplify and correct folding fcmps with the same children
Summary: Take advantage of FCmpInst::Predicate's bit pattern and handle (fcmp *, x, y) | (fcmp *, x, y) and (fcmp *, x, y) & (fcmp *, x, y) more consistently. Also fold more FCmpInst::FCMP_FALSE and FCmpInst::FCMP_TRUE to constants.
Currently InstCombine wrongly folds (fcmp ogt, x, y) | (fcmp ord, x, y) to (fcmp ogt, x, y); this patch also fixes that.
Nirav Dave [Wed, 29 Jun 2016 19:54:27 +0000 (19:54 +0000)]
Permit memory operands in ins/outs instructions
[x86] (PR15455) While (ins|outs)[bwld] instructions do not take %dx as a
memory operand, various unofficial references do and objdump
disassembles to this format. Extend special treatment of
similar (in|out)[bwld] operations.
Rafael Espindola [Wed, 29 Jun 2016 18:31:48 +0000 (18:31 +0000)]
Don't verify inputs to the Linker if ODR merging.
This fixes pr28072.
The point, as Duncan pointed out, is that the file is already
partially linked by just reading it.
Long term I think the solution is to make metadata owned by the module
and then the linker will lazily read it and be in charge of all the
linking. Running a verifier in each input will defeat the lazy
loading, but will be legal.
Right now we are at the unfortunate position that to support odr
merging we cannot verify the inputs, which mildly annoying (see test
update).
Vedant Kumar [Wed, 29 Jun 2016 17:47:08 +0000 (17:47 +0000)]
[llvm-cov] Change some FileCheck prefixes to make tests reusable (NFC)
I'm planning on extending these two tests with checks that validate
html coverage reports. Make it easier to extend them by not using a
prefix called "CHECK".
Vedant Kumar [Wed, 29 Jun 2016 16:22:12 +0000 (16:22 +0000)]
[llvm-cov] Do not allow ".." to escape the coverage sub-directory
In -output-dir mode, file reports are placed into a "coverage"
directory. If filenames in the coverage mapping contain "..", they might
escape out of this directory.
Fix the problem by removing ".." from source filenames (expand the path
component).
Benjamin Kramer [Wed, 29 Jun 2016 15:04:07 +0000 (15:04 +0000)]
[ManagedStatic] Reimplement double-checked locking with std::atomic.
This gets rid of the memory fence in the hot path (dereferencing the
ManagedStatic), trading for an extra mutex lock in the cold path (when
the ManagedStatic was uninitialized). Since this only happens on the
first accesses it shouldn't matter much. On strict architectures like
x86 this removes any atomic instructions from the hot path.
Also remove the tsan annotations, tsan knows how standard atomics work
so they should be unnecessary now.
Craig Topper [Wed, 29 Jun 2016 04:57:00 +0000 (04:57 +0000)]
Revert "[ValueTracking] Teach computeKnownBits for PHI nodes to compute sign bit for a recurrence with a NSW addition."
This is breaking an optimizaton remark test in clang. I've identified a couple fixes for that, but want to understand it better before I commit to anything.
Adam Nemet [Wed, 29 Jun 2016 04:55:19 +0000 (04:55 +0000)]
[Diag] Add getter shouldAlwaysPrint. NFC
For the new hotness attribute, the API will take the pass rather than
the pass name so we can no longer play the trick of AlwaysPrint being a
special pass name. This adds a getter to help the transition.
Craig Topper [Wed, 29 Jun 2016 03:46:47 +0000 (03:46 +0000)]
[ValueTracking] Teach computeKnownBits for PHI nodes to compute sign bit for a recurrence with a NSW addition.
If a operation for a recurrence is an addition with no signed wrap and both input sign bits are 0, then the result sign bit must also be 0. Similar for the negative case.
I found this deficiency while playing around with a loop in the x86 backend that contained a signed division that could be optimized into an unsigned division if we could prove both inputs were positive. One of them being the loop induction variable. With this patch we can perform the conversion for this case. One of the test cases here is a contrived variation of the loop I was looking at.
Craig Topper [Wed, 29 Jun 2016 03:29:12 +0000 (03:29 +0000)]
[DAGCombine] Teach DAG combine to handle ORs of shuffles involving zero vectors where the zero vector is the first operand to the shuffle instead of the second.
Craig Topper [Wed, 29 Jun 2016 03:29:09 +0000 (03:29 +0000)]
[DAGCombine] Add test cases to show that DAG combining an OR of two shuffles with zero vectors doesn't work if the zero vector is the first operand of the shuffle. Fix coming in a follow up patch.
Eric Christopher [Wed, 29 Jun 2016 03:05:58 +0000 (03:05 +0000)]
Revert "[InstCombine] Avoid combining the bitcast of a var that is used as both address and result of load instructions"
Revert "[InstCombine] Combine A->B->A BitCast"
as this appears to cause PR27996 and as discussed in http://reviews.llvm.org/D20847
projects / llvm / log