From: Dinar Temirbulatov Date: Thu, 13 Jun 2019 00:19:50 +0000 (+0000) Subject: [SLP] Update propagate_ir_flags.ll test to check that we do retain the common subset... X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=ffe57b5e41b4027157dc01e8f9626b2e4be28eae;p=llvm [SLP] Update propagate_ir_flags.ll test to check that we do retain the common subset, NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363218 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll b/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll index 380f58fe5dc..cacc1dcb256 100644 --- a/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll +++ b/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll @@ -224,6 +224,42 @@ define void @not_nuw(i32* %x) { ret void } +define void @not_nsw_but_nuw(i32* %x) { +; CHECK-LABEL: @not_nsw_but_nuw( +; CHECK-NEXT: [[IDX1:%.*]] = getelementptr inbounds i32, i32* [[X:%.*]], i64 0 +; CHECK-NEXT: [[IDX2:%.*]] = getelementptr inbounds i32, i32* [[X]], i64 1 +; CHECK-NEXT: [[IDX3:%.*]] = getelementptr inbounds i32, i32* [[X]], i64 2 +; CHECK-NEXT: [[IDX4:%.*]] = getelementptr inbounds i32, i32* [[X]], i64 3 +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[IDX1]] to <4 x i32>* +; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = add nuw <4 x i32> [[TMP2]], +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[IDX1]] to <4 x i32>* +; CHECK-NEXT: store <4 x i32> [[TMP3]], <4 x i32>* [[TMP4]], align 4 +; CHECK-NEXT: ret void +; + %idx1 = getelementptr inbounds i32, i32* %x, i64 0 + %idx2 = getelementptr inbounds i32, i32* %x, i64 1 + %idx3 = getelementptr inbounds i32, i32* %x, i64 2 + %idx4 = getelementptr inbounds i32, i32* %x, i64 3 + + %load1 = load i32, i32* %idx1, align 4 + %load2 = load i32, i32* %idx2, align 4 + %load3 = load i32, i32* %idx3, align 4 + %load4 = load i32, i32* %idx4, align 4 + + %op1 = add nuw i32 %load1, 1 + %op2 = add nuw nsw i32 %load2, 1 + %op3 = add nuw nsw i32 %load3, 1 + %op4 = add nuw i32 %load4, 1 + + store i32 %op1, i32* %idx1, align 4 + store i32 %op2, i32* %idx2, align 4 + store i32 %op3, i32* %idx3, align 4 + store i32 %op4, i32* %idx4, align 4 + + ret void +} + define void @nnan(float* %x) { ; CHECK-LABEL: @nnan( ; CHECK-NEXT: [[IDX1:%.*]] = getelementptr inbounds float, float* [[X:%.*]], i64 0