From: Adrian Prantl Date: Thu, 16 Mar 2017 17:42:45 +0000 (+0000) Subject: Rename methods in DwarfExpression to adhere to the LLVM coding guidelines. X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=fd1658777359d5fc2c10e06cd3774f861cf3b6b9;p=llvm Rename methods in DwarfExpression to adhere to the LLVM coding guidelines. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297966 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp b/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp index 35f9515d835..c69a975d583 100644 --- a/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp @@ -201,7 +201,7 @@ DIE *DwarfCompileUnit::getOrCreateGlobalVariableDIE( } if (Expr) { DwarfExpr->addFragmentOffset(Expr); - DwarfExpr->AddExpression(Expr); + DwarfExpr->addExpression(Expr); } } } @@ -520,8 +520,8 @@ DIE *DwarfCompileUnit::constructVariableDIEImpl(const DbgVariable &DV, DIEDwarfExpression DwarfExpr(*Asm, *this, *Loc); // If there is an expression, emit raw unsigned bytes. DwarfExpr.addFragmentOffset(Expr); - DwarfExpr.AddUnsignedConstant(DVInsn->getOperand(0).getImm()); - DwarfExpr.AddExpression(Expr); + DwarfExpr.addUnsignedConstant(DVInsn->getOperand(0).getImm()); + DwarfExpr.addExpression(Expr); addBlock(*VariableDie, dwarf::DW_AT_location, DwarfExpr.finalize()); } else addConstantValue(*VariableDie, DVInsn->getOperand(0), DV.getType()); @@ -545,9 +545,9 @@ DIE *DwarfCompileUnit::constructVariableDIEImpl(const DbgVariable &DV, const TargetFrameLowering *TFI = Asm->MF->getSubtarget().getFrameLowering(); int Offset = TFI->getFrameIndexReference(*Asm->MF, Fragment.FI, FrameReg); DwarfExpr.addFragmentOffset(Fragment.Expr); - DwarfExpr.AddMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(), + DwarfExpr.addMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(), FrameReg, Offset); - DwarfExpr.AddExpression(Fragment.Expr); + DwarfExpr.addExpression(Fragment.Expr); } addBlock(*VariableDie, dwarf::DW_AT_location, DwarfExpr.finalize()); @@ -771,11 +771,11 @@ void DwarfCompileUnit::addAddress(DIE &Die, dwarf::Attribute Attribute, bool validReg; if (Location.isReg()) - validReg = Expr.AddMachineReg(*Asm->MF->getSubtarget().getRegisterInfo(), + validReg = Expr.addMachineReg(*Asm->MF->getSubtarget().getRegisterInfo(), Location.getReg()); else validReg = - Expr.AddMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(), + Expr.addMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(), Location.getReg(), Location.getOffset()); if (!validReg) @@ -801,13 +801,13 @@ void DwarfCompileUnit::addComplexAddress(const DbgVariable &DV, DIE &Die, DwarfExpr.addFragmentOffset(Expr); bool ValidReg = Location.getOffset() - ? DwarfExpr.AddMachineRegIndirect(TRI, Reg, Location.getOffset()) - : DwarfExpr.AddMachineRegExpression(TRI, ExprCursor, Reg); + ? DwarfExpr.addMachineRegIndirect(TRI, Reg, Location.getOffset()) + : DwarfExpr.addMachineRegExpression(TRI, ExprCursor, Reg); if (!ValidReg) return; - DwarfExpr.AddExpression(std::move(ExprCursor)); + DwarfExpr.addExpression(std::move(ExprCursor)); // Now attach the location information to the DIE. addBlock(Die, Attribute, Loc); diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index 416f3afc070..19d8dfe1c4f 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -127,17 +127,17 @@ static const char *const DWARFGroupDescription = "DWARF Emission"; static const char *const DbgTimerName = "writer"; static const char *const DbgTimerDescription = "DWARF Debug Writer"; -void DebugLocDwarfExpression::EmitOp(uint8_t Op, const char *Comment) { +void DebugLocDwarfExpression::emitOp(uint8_t Op, const char *Comment) { BS.EmitInt8( Op, Comment ? Twine(Comment) + " " + dwarf::OperationEncodingString(Op) : dwarf::OperationEncodingString(Op)); } -void DebugLocDwarfExpression::EmitSigned(int64_t Value) { +void DebugLocDwarfExpression::emitSigned(int64_t Value) { BS.EmitSLEB128(Value, Twine(Value)); } -void DebugLocDwarfExpression::EmitUnsigned(uint64_t Value) { +void DebugLocDwarfExpression::emitUnsigned(uint64_t Value) { BS.EmitULEB128(Value, Twine(Value)); } @@ -1499,21 +1499,21 @@ static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT, if (Value.isInt()) { if (BT && (BT->getEncoding() == dwarf::DW_ATE_signed || BT->getEncoding() == dwarf::DW_ATE_signed_char)) - DwarfExpr.AddSignedConstant(Value.getInt()); + DwarfExpr.addSignedConstant(Value.getInt()); else - DwarfExpr.AddUnsignedConstant(Value.getInt()); + DwarfExpr.addUnsignedConstant(Value.getInt()); } else if (Value.isLocation()) { MachineLocation Loc = Value.getLoc(); const TargetRegisterInfo &TRI = *AP.MF->getSubtarget().getRegisterInfo(); if (Loc.getOffset()) - DwarfExpr.AddMachineRegIndirect(TRI, Loc.getReg(), Loc.getOffset()); + DwarfExpr.addMachineRegIndirect(TRI, Loc.getReg(), Loc.getOffset()); else - DwarfExpr.AddMachineRegExpression(TRI, ExprCursor, Loc.getReg()); + DwarfExpr.addMachineRegExpression(TRI, ExprCursor, Loc.getReg()); } else if (Value.isConstantFP()) { APInt RawBytes = Value.getConstantFP()->getValueAPF().bitcastToAPInt(); - DwarfExpr.AddUnsignedConstant(RawBytes); + DwarfExpr.addUnsignedConstant(RawBytes); } - DwarfExpr.AddExpression(std::move(ExprCursor)); + DwarfExpr.addExpression(std::move(ExprCursor)); } void DebugLocEntry::finalize(const AsmPrinter &AP, diff --git a/lib/CodeGen/AsmPrinter/DwarfExpression.cpp b/lib/CodeGen/AsmPrinter/DwarfExpression.cpp index caf0bc0f258..6a43f4a05c1 100644 --- a/lib/CodeGen/AsmPrinter/DwarfExpression.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfExpression.cpp @@ -22,62 +22,62 @@ using namespace llvm; -void DwarfExpression::AddReg(int DwarfReg, const char *Comment) { +void DwarfExpression::addReg(int DwarfReg, const char *Comment) { assert(DwarfReg >= 0 && "invalid negative dwarf register number"); if (DwarfReg < 32) { - EmitOp(dwarf::DW_OP_reg0 + DwarfReg, Comment); + emitOp(dwarf::DW_OP_reg0 + DwarfReg, Comment); } else { - EmitOp(dwarf::DW_OP_regx, Comment); - EmitUnsigned(DwarfReg); + emitOp(dwarf::DW_OP_regx, Comment); + emitUnsigned(DwarfReg); } } -void DwarfExpression::AddRegIndirect(int DwarfReg, int Offset) { +void DwarfExpression::addRegIndirect(int DwarfReg, int Offset) { assert(DwarfReg >= 0 && "invalid negative dwarf register number"); if (DwarfReg < 32) { - EmitOp(dwarf::DW_OP_breg0 + DwarfReg); + emitOp(dwarf::DW_OP_breg0 + DwarfReg); } else { - EmitOp(dwarf::DW_OP_bregx); - EmitUnsigned(DwarfReg); + emitOp(dwarf::DW_OP_bregx); + emitUnsigned(DwarfReg); } - EmitSigned(Offset); + emitSigned(Offset); } -void DwarfExpression::AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits) { +void DwarfExpression::addOpPiece(unsigned SizeInBits, unsigned OffsetInBits) { if (!SizeInBits) return; const unsigned SizeOfByte = 8; if (OffsetInBits > 0 || SizeInBits % SizeOfByte) { - EmitOp(dwarf::DW_OP_bit_piece); - EmitUnsigned(SizeInBits); - EmitUnsigned(OffsetInBits); + emitOp(dwarf::DW_OP_bit_piece); + emitUnsigned(SizeInBits); + emitUnsigned(OffsetInBits); } else { - EmitOp(dwarf::DW_OP_piece); + emitOp(dwarf::DW_OP_piece); unsigned ByteSize = SizeInBits / SizeOfByte; - EmitUnsigned(ByteSize); + emitUnsigned(ByteSize); } this->OffsetInBits += SizeInBits; } -void DwarfExpression::AddShr(unsigned ShiftBy) { - EmitOp(dwarf::DW_OP_constu); - EmitUnsigned(ShiftBy); - EmitOp(dwarf::DW_OP_shr); +void DwarfExpression::addShr(unsigned ShiftBy) { + emitOp(dwarf::DW_OP_constu); + emitUnsigned(ShiftBy); + emitOp(dwarf::DW_OP_shr); } -void DwarfExpression::AddAnd(unsigned Mask) { - EmitOp(dwarf::DW_OP_constu); - EmitUnsigned(Mask); - EmitOp(dwarf::DW_OP_and); +void DwarfExpression::addAnd(unsigned Mask) { + emitOp(dwarf::DW_OP_constu); + emitUnsigned(Mask); + emitOp(dwarf::DW_OP_and); } -bool DwarfExpression::AddMachineRegIndirect(const TargetRegisterInfo &TRI, +bool DwarfExpression::addMachineRegIndirect(const TargetRegisterInfo &TRI, unsigned MachineReg, int Offset) { if (isFrameRegister(TRI, MachineReg)) { // If variable offset is based in frame register then use fbreg. - EmitOp(dwarf::DW_OP_fbreg); - EmitSigned(Offset); + emitOp(dwarf::DW_OP_fbreg); + emitSigned(Offset); return true; } @@ -85,11 +85,11 @@ bool DwarfExpression::AddMachineRegIndirect(const TargetRegisterInfo &TRI, if (DwarfReg < 0) return false; - AddRegIndirect(DwarfReg, Offset); + addRegIndirect(DwarfReg, Offset); return true; } -bool DwarfExpression::AddMachineReg(const TargetRegisterInfo &TRI, +bool DwarfExpression::addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg, unsigned MaxSize) { if (!TRI.isPhysicalRegister(MachineReg)) return false; @@ -98,7 +98,7 @@ bool DwarfExpression::AddMachineReg(const TargetRegisterInfo &TRI, // If this is a valid register number, emit it. if (Reg >= 0) { - AddReg(Reg); + addReg(Reg); return true; } @@ -110,7 +110,7 @@ bool DwarfExpression::AddMachineReg(const TargetRegisterInfo &TRI, unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg); unsigned Size = TRI.getSubRegIdxSize(Idx); unsigned RegOffset = TRI.getSubRegIdxOffset(Idx); - AddReg(Reg, "super-register"); + addReg(Reg, "super-register"); // Use a DW_OP_bit_piece to describe the sub-register. setSubRegisterPiece(Size, RegOffset); return true; @@ -140,13 +140,13 @@ bool DwarfExpression::AddMachineReg(const TargetRegisterInfo &TRI, // If this sub-register has a DWARF number and we haven't covered // its range, emit a DWARF piece for it. if (Reg >= 0 && Intersection.any()) { - AddReg(Reg, "sub-register"); + addReg(Reg, "sub-register"); if (Offset >= MaxSize) break; - // Emit a piece for the any gap in the coverage. + // emit a piece for the any gap in the coverage. if (Offset > CurPos) - AddOpPiece(Offset - CurPos); - AddOpPiece(std::min(Size, MaxSize - Offset)); + addOpPiece(Offset - CurPos); + addOpPiece(std::min(Size, MaxSize - Offset)); CurPos = Offset + Size; // Mark it as emitted. @@ -157,45 +157,45 @@ bool DwarfExpression::AddMachineReg(const TargetRegisterInfo &TRI, return CurPos; } -void DwarfExpression::AddStackValue() { +void DwarfExpression::addStackValue() { if (DwarfVersion >= 4) - EmitOp(dwarf::DW_OP_stack_value); + emitOp(dwarf::DW_OP_stack_value); } -void DwarfExpression::AddSignedConstant(int64_t Value) { - EmitOp(dwarf::DW_OP_consts); - EmitSigned(Value); - AddStackValue(); +void DwarfExpression::addSignedConstant(int64_t Value) { + emitOp(dwarf::DW_OP_consts); + emitSigned(Value); + addStackValue(); } -void DwarfExpression::AddUnsignedConstant(uint64_t Value) { - EmitOp(dwarf::DW_OP_constu); - EmitUnsigned(Value); - AddStackValue(); +void DwarfExpression::addUnsignedConstant(uint64_t Value) { + emitOp(dwarf::DW_OP_constu); + emitUnsigned(Value); + addStackValue(); } -void DwarfExpression::AddUnsignedConstant(const APInt &Value) { +void DwarfExpression::addUnsignedConstant(const APInt &Value) { unsigned Size = Value.getBitWidth(); const uint64_t *Data = Value.getRawData(); // Chop it up into 64-bit pieces, because that's the maximum that - // AddUnsignedConstant takes. + // addUnsignedConstant takes. unsigned Offset = 0; while (Offset < Size) { - AddUnsignedConstant(*Data++); + addUnsignedConstant(*Data++); if (Offset == 0 && Size <= 64) break; - AddOpPiece(std::min(Size-Offset, 64u), Offset); + addOpPiece(std::min(Size-Offset, 64u), Offset); Offset += 64; } } -bool DwarfExpression::AddMachineRegExpression(const TargetRegisterInfo &TRI, +bool DwarfExpression::addMachineRegExpression(const TargetRegisterInfo &TRI, DIExpressionCursor &ExprCursor, unsigned MachineReg, unsigned FragmentOffsetInBits) { if (!ExprCursor) - return AddMachineReg(TRI, MachineReg); + return addMachineReg(TRI, MachineReg); // Pattern-match combinations for which more efficient representations exist // first. @@ -204,7 +204,7 @@ bool DwarfExpression::AddMachineRegExpression(const TargetRegisterInfo &TRI, switch (Op->getOp()) { default: { auto Fragment = ExprCursor.getFragmentInfo(); - ValidReg = AddMachineReg(TRI, MachineReg, + ValidReg = addMachineReg(TRI, MachineReg, Fragment ? Fragment->SizeInBits : ~1U); break; } @@ -215,16 +215,16 @@ bool DwarfExpression::AddMachineRegExpression(const TargetRegisterInfo &TRI, auto N = ExprCursor.peekNext(); if (N && N->getOp() == dwarf::DW_OP_deref) { unsigned Offset = Op->getArg(0); - ValidReg = AddMachineRegIndirect( + ValidReg = addMachineRegIndirect( TRI, MachineReg, Op->getOp() == dwarf::DW_OP_plus ? Offset : -Offset); ExprCursor.consume(2); } else - ValidReg = AddMachineReg(TRI, MachineReg); + ValidReg = addMachineReg(TRI, MachineReg); break; } case dwarf::DW_OP_deref: // [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg]. - ValidReg = AddMachineRegIndirect(TRI, MachineReg); + ValidReg = addMachineRegIndirect(TRI, MachineReg); ExprCursor.take(); break; } @@ -232,7 +232,7 @@ bool DwarfExpression::AddMachineRegExpression(const TargetRegisterInfo &TRI, return ValidReg; } -void DwarfExpression::AddExpression(DIExpressionCursor &&ExprCursor, +void DwarfExpression::addExpression(DIExpressionCursor &&ExprCursor, unsigned FragmentOffsetInBits) { while (ExprCursor) { auto Op = ExprCursor.take(); @@ -251,45 +251,45 @@ void DwarfExpression::AddExpression(DIExpressionCursor &&ExprCursor, // location. assert(OffsetInBits >= FragmentOffset && "fragment offset not added?"); - // If \a AddMachineReg already emitted DW_OP_piece operations to represent + // If \a addMachineReg already emitted DW_OP_piece operations to represent // a super-register by splicing together sub-registers, subtract the size // of the pieces that was already emitted. SizeInBits -= OffsetInBits - FragmentOffset; - // If \a AddMachineReg requested a DW_OP_bit_piece to stencil out a + // If \a addMachineReg requested a DW_OP_bit_piece to stencil out a // sub-register that is smaller than the current fragment's size, use it. if (SubRegisterSizeInBits) SizeInBits = std::min(SizeInBits, SubRegisterSizeInBits); - AddOpPiece(SizeInBits, SubRegisterOffsetInBits); + addOpPiece(SizeInBits, SubRegisterOffsetInBits); setSubRegisterPiece(0, 0); break; } case dwarf::DW_OP_plus: - EmitOp(dwarf::DW_OP_plus_uconst); - EmitUnsigned(Op->getArg(0)); + emitOp(dwarf::DW_OP_plus_uconst); + emitUnsigned(Op->getArg(0)); break; case dwarf::DW_OP_minus: // There is no OP_minus_uconst. - EmitOp(dwarf::DW_OP_constu); - EmitUnsigned(Op->getArg(0)); - EmitOp(dwarf::DW_OP_minus); + emitOp(dwarf::DW_OP_constu); + emitUnsigned(Op->getArg(0)); + emitOp(dwarf::DW_OP_minus); break; case dwarf::DW_OP_deref: - EmitOp(dwarf::DW_OP_deref); + emitOp(dwarf::DW_OP_deref); break; case dwarf::DW_OP_constu: - EmitOp(dwarf::DW_OP_constu); - EmitUnsigned(Op->getArg(0)); + emitOp(dwarf::DW_OP_constu); + emitUnsigned(Op->getArg(0)); break; case dwarf::DW_OP_stack_value: - AddStackValue(); + addStackValue(); break; case dwarf::DW_OP_swap: - EmitOp(dwarf::DW_OP_swap); + emitOp(dwarf::DW_OP_swap); break; case dwarf::DW_OP_xderef: - EmitOp(dwarf::DW_OP_xderef); + emitOp(dwarf::DW_OP_xderef); break; default: llvm_unreachable("unhandled opcode found in expression"); @@ -297,13 +297,13 @@ void DwarfExpression::AddExpression(DIExpressionCursor &&ExprCursor, } } -/// Add masking operations to stencil out a subregister. +/// add masking operations to stencil out a subregister. void DwarfExpression::maskSubRegister() { assert(SubRegisterSizeInBits && "no subregister was registered"); if (SubRegisterOffsetInBits > 0) - AddShr(SubRegisterOffsetInBits); + addShr(SubRegisterOffsetInBits); uint64_t Mask = (1UL << SubRegisterSizeInBits) - 1; - AddAnd(Mask); + addAnd(Mask); } @@ -314,7 +314,7 @@ void DwarfExpression::finalize() { // Don't emit a DW_OP_piece for a subregister at offset 0. if (SubRegisterOffsetInBits == 0) return; - AddOpPiece(SubRegisterSizeInBits, SubRegisterOffsetInBits); + addOpPiece(SubRegisterSizeInBits, SubRegisterOffsetInBits); } void DwarfExpression::addFragmentOffset(const DIExpression *Expr) { @@ -325,6 +325,6 @@ void DwarfExpression::addFragmentOffset(const DIExpression *Expr) { assert(FragmentOffset >= OffsetInBits && "overlapping or duplicate fragments"); if (FragmentOffset > OffsetInBits) - AddOpPiece(FragmentOffset - OffsetInBits); + addOpPiece(FragmentOffset - OffsetInBits); OffsetInBits = FragmentOffset; } diff --git a/lib/CodeGen/AsmPrinter/DwarfExpression.h b/lib/CodeGen/AsmPrinter/DwarfExpression.h index 2f5a701499d..6b16afa7e9e 100644 --- a/lib/CodeGen/AsmPrinter/DwarfExpression.h +++ b/lib/CodeGen/AsmPrinter/DwarfExpression.h @@ -110,29 +110,29 @@ public: void finalize(); /// Output a dwarf operand and an optional assembler comment. - virtual void EmitOp(uint8_t Op, const char *Comment = nullptr) = 0; + virtual void emitOp(uint8_t Op, const char *Comment = nullptr) = 0; /// Emit a raw signed value. - virtual void EmitSigned(int64_t Value) = 0; + virtual void emitSigned(int64_t Value) = 0; /// Emit a raw unsigned value. - virtual void EmitUnsigned(uint64_t Value) = 0; + virtual void emitUnsigned(uint64_t Value) = 0; /// Return whether the given machine register is the frame register in the /// current function. virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0; /// Emit a dwarf register operation. - void AddReg(int DwarfReg, const char *Comment = nullptr); + void addReg(int DwarfReg, const char *Comment = nullptr); /// Emit an (double-)indirect dwarf register operation. - void AddRegIndirect(int DwarfReg, int Offset); + void addRegIndirect(int DwarfReg, int Offset); /// Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment. /// \param OffsetInBits This is an optional offset into the location that /// is at the top of the DWARF stack. - void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0); + void addOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0); /// Emit a shift-right dwarf operation. - void AddShr(unsigned ShiftBy); + void addShr(unsigned ShiftBy); /// Emit a bitwise and dwarf operation. - void AddAnd(unsigned Mask); + void addAnd(unsigned Mask); /// Emit a DW_OP_stack_value, if supported. /// @@ -145,11 +145,11 @@ public: /// constant value, so the producers and consumers started to rely on /// heuristics to disambiguate the value vs. location status of the /// expression. See PR21176 for more details. - void AddStackValue(); + void addStackValue(); /// Emit an indirect dwarf register operation for the given machine register. /// \return false if no DWARF register exists for MachineReg. - bool AddMachineRegIndirect(const TargetRegisterInfo &TRI, unsigned MachineReg, + bool addMachineRegIndirect(const TargetRegisterInfo &TRI, unsigned MachineReg, int Offset = 0); /// Emit a partial DWARF register operation. @@ -167,15 +167,15 @@ public: /// multiple subregisters that alias the register. /// /// \return false if no DWARF register exists for MachineReg. - bool AddMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg, + bool addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg, unsigned MaxSize = ~1U); /// Emit a signed constant. - void AddSignedConstant(int64_t Value); + void addSignedConstant(int64_t Value); /// Emit an unsigned constant. - void AddUnsignedConstant(uint64_t Value); + void addUnsignedConstant(uint64_t Value); /// Emit an unsigned constant. - void AddUnsignedConstant(const APInt &Value); + void addUnsignedConstant(const APInt &Value); /// Emit a machine register location. As an optimization this may also consume /// the prefix of a DwarfExpression if a more efficient representation for @@ -186,7 +186,7 @@ public: /// fragment inside the entire variable. /// \return false if no DWARF register exists /// for MachineReg. - bool AddMachineRegExpression(const TargetRegisterInfo &TRI, + bool addMachineRegExpression(const TargetRegisterInfo &TRI, DIExpressionCursor &Expr, unsigned MachineReg, unsigned FragmentOffsetInBits = 0); /// Emit all remaining operations in the DIExpressionCursor. @@ -194,7 +194,7 @@ public: /// \param FragmentOffsetInBits If this is one fragment out of multiple /// locations, this is the offset of the /// fragment inside the entire variable. - void AddExpression(DIExpressionCursor &&Expr, + void addExpression(DIExpressionCursor &&Expr, unsigned FragmentOffsetInBits = 0); /// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to @@ -210,9 +210,9 @@ public: DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS) : DwarfExpression(DwarfVersion), BS(BS) {} - void EmitOp(uint8_t Op, const char *Comment = nullptr) override; - void EmitSigned(int64_t Value) override; - void EmitUnsigned(uint64_t Value) override; + void emitOp(uint8_t Op, const char *Comment = nullptr) override; + void emitSigned(int64_t Value) override; + void emitUnsigned(uint64_t Value) override; bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) override; }; @@ -225,9 +225,9 @@ const AsmPrinter &AP; public: DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE); - void EmitOp(uint8_t Op, const char *Comment = nullptr) override; - void EmitSigned(int64_t Value) override; - void EmitUnsigned(uint64_t Value) override; + void emitOp(uint8_t Op, const char *Comment = nullptr) override; + void emitSigned(int64_t Value) override; + void emitUnsigned(uint64_t Value) override; bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) override; DIELoc *finalize() { diff --git a/lib/CodeGen/AsmPrinter/DwarfUnit.cpp b/lib/CodeGen/AsmPrinter/DwarfUnit.cpp index a7be770df63..18a5d9a5fac 100644 --- a/lib/CodeGen/AsmPrinter/DwarfUnit.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfUnit.cpp @@ -54,15 +54,15 @@ DIEDwarfExpression::DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, : DwarfExpression(AP.getDwarfVersion()), AP(AP), DU(DU), DIE(DIE) {} -void DIEDwarfExpression::EmitOp(uint8_t Op, const char* Comment) { +void DIEDwarfExpression::emitOp(uint8_t Op, const char* Comment) { DU.addUInt(DIE, dwarf::DW_FORM_data1, Op); } -void DIEDwarfExpression::EmitSigned(int64_t Value) { +void DIEDwarfExpression::emitSigned(int64_t Value) { DU.addSInt(DIE, dwarf::DW_FORM_sdata, Value); } -void DIEDwarfExpression::EmitUnsigned(uint64_t Value) { +void DIEDwarfExpression::emitUnsigned(uint64_t Value) { DU.addUInt(DIE, dwarf::DW_FORM_udata, Value); } @@ -475,11 +475,11 @@ void DwarfUnit::addBlockByrefAddress(const DbgVariable &DV, DIE &Die, bool validReg; if (Location.isReg()) - validReg = Expr.AddMachineReg(*Asm->MF->getSubtarget().getRegisterInfo(), + validReg = Expr.addMachineReg(*Asm->MF->getSubtarget().getRegisterInfo(), Location.getReg()); else validReg = - Expr.AddMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(), + Expr.addMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(), Location.getReg(), Location.getOffset()); if (!validReg) @@ -509,7 +509,7 @@ void DwarfUnit::addBlockByrefAddress(const DbgVariable &DV, DIE &Die, DIExpr.push_back(dwarf::DW_OP_plus); DIExpr.push_back(varFieldOffset); } - Expr.AddExpression(makeArrayRef(DIExpr)); + Expr.addExpression(makeArrayRef(DIExpr)); Expr.finalize(); // Now attach the location information to the DIE.