From: Ivan Maidanski <ivmai@mail.ru>
Date: Wed, 13 Mar 2013 18:41:58 +0000 (+0400)
Subject: Fix asm constraint of fetch_and_add, test_and_set, fetch_CAS for MIPS (gcc)
X-Git-Tag: libatomic_ops-7_4_0~37
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=fc0db46e8679904365df8a464061c144d515160d;p=libatomic_ops

Fix asm constraint of fetch_and_add, test_and_set, fetch_CAS for MIPS (gcc)

* src/atomic_ops/sysdeps/gcc/mips.h (AO_fetch_and_add,
AO_test_and_set, AO_fetch_compare_and_swap): Use "+m" asm constraint
for *addr instead of "=m" (because the value pointed by addr is read
and written by the code).
---

diff --git a/src/atomic_ops/sysdeps/gcc/mips.h b/src/atomic_ops/sysdeps/gcc/mips.h
index bf14a38..a891de6 100644
--- a/src/atomic_ops/sysdeps/gcc/mips.h
+++ b/src/atomic_ops/sysdeps/gcc/mips.h
@@ -59,7 +59,6 @@ AO_fetch_and_add(volatile AO_t *addr, AO_t incr)
   register int temp;
 
   __asm__ __volatile__(
-
       "       .set push\n"
       "       .set mips2\n"
       "       .set noreorder\n"
@@ -71,7 +70,7 @@ AO_fetch_and_add(volatile AO_t *addr, AO_t incr)
       "       beqz %1, 1b\n"
       "       nop\n"
       "       .set pop "
-      : "=&r" (result), "=&r" (temp), "=m" (*addr)
+      : "=&r" (result), "=&r" (temp), "+m" (*addr)
       : "Ir" (incr)
       : "memory");
   return (AO_t)result;
@@ -96,7 +95,7 @@ AO_test_and_set(volatile AO_TS_t *addr)
       "       beqz %1, 1b\n"
       "       nop\n"
       "       .set pop "
-      : "=&r" (oldval), "=&r" (temp), "=m" (*addr)
+      : "=&r" (oldval), "=&r" (temp), "+m" (*addr)
       : "r" (1)
       : "memory");
   return (AO_TS_VAL_t)oldval;
@@ -155,7 +154,7 @@ AO_fetch_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val)
       "       nop\n"
       "       .set pop\n"
       "2:"
-      : "=&r" (fetched_val), "=&r" (temp), "=m" (*addr)
+      : "=&r" (fetched_val), "=&r" (temp), "+m" (*addr)
       : "r" (new_val), "Jr" (old)
       : "memory");
   return (AO_t)fetched_val;