From: Vittorio Giovara <vittorio.giovara@gmail.com>
Date: Fri, 27 Jan 2017 17:06:39 +0000 (+0100)
Subject: x86: Adjust cache64_ssse3 function suffixes
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=fb3f97833cbe3305eb613633e604f424d6d2d096;p=libx264

x86: Adjust cache64_ssse3 function suffixes

Makes those function names more consistent with other similar functions.
---

diff --git a/common/x86/mc-a.asm b/common/x86/mc-a.asm
index f16f9585..92029ade 100644
--- a/common/x86/mc-a.asm
+++ b/common/x86/mc-a.asm
@@ -2125,7 +2125,7 @@ INIT_XMM sse2
 MC_CHROMA
 INIT_XMM ssse3
 MC_CHROMA_SSSE3
-INIT_XMM ssse3, cache64
+INIT_XMM cache64, ssse3
 MC_CHROMA_SSSE3
 INIT_XMM avx
 MC_CHROMA_SSSE3 ; No known AVX CPU will trigger CPU_CACHELINE_64
diff --git a/common/x86/mc-c.c b/common/x86/mc-c.c
index 32583812..f5e8be2c 100644
--- a/common/x86/mc-c.c
+++ b/common/x86/mc-c.c
@@ -179,7 +179,7 @@ void x264_mc_chroma_##cpu( pixel *dstu, pixel *dstv, intptr_t i_dst, pixel *src,
 MC_CHROMA(mmx2)
 MC_CHROMA(sse2)
 MC_CHROMA(ssse3)
-MC_CHROMA(ssse3_cache64)
+MC_CHROMA(cache64_ssse3)
 MC_CHROMA(avx)
 MC_CHROMA(avx2)
 
@@ -779,7 +779,7 @@ void x264_mc_init_mmx( int cpu, x264_mc_functions_t *pf )
     if( cpu&X264_CPU_CACHELINE_64 )
     {
         if( !(cpu&X264_CPU_STACK_MOD4) )
-            pf->mc_chroma = x264_mc_chroma_ssse3_cache64;
+            pf->mc_chroma = x264_mc_chroma_cache64_ssse3;
         pf->mc_luma = mc_luma_cache64_ssse3;
         pf->get_ref = get_ref_cache64_ssse3;
         if( cpu&X264_CPU_SLOW_ATOM )
diff --git a/common/x86/predict-a.asm b/common/x86/predict-a.asm
index efc0f5a2..527d9ece 100644
--- a/common/x86/predict-a.asm
+++ b/common/x86/predict-a.asm
@@ -468,7 +468,7 @@ PREDICT_4x4 w, wd, dq, qdq
 INIT_MMX mmx2
 PREDICT_4x4 b, bw, wd, dq
 INIT_MMX ssse3
-%define predict_4x4_vr_ssse3 predict_4x4_vr_ssse3_cache64
+%define predict_4x4_vr_ssse3 predict_4x4_vr_cache64_ssse3
 PREDICT_4x4 b, bw, wd, dq
 %endif
 
@@ -940,7 +940,7 @@ INIT_XMM sse2
 PREDICT_8x8_DDLR
 INIT_XMM ssse3
 PREDICT_8x8_DDLR
-INIT_XMM ssse3, cache64
+INIT_XMM cache64, ssse3
 PREDICT_8x8_DDLR
 %elif ARCH_X86_64 == 0
 INIT_MMX mmx2
diff --git a/common/x86/predict-c.c b/common/x86/predict-c.c
index fcf84131..27da63a2 100644
--- a/common/x86/predict-c.c
+++ b/common/x86/predict-c.c
@@ -511,8 +511,8 @@ void x264_predict_8x8_init_mmx( int cpu, x264_predict8x8_t pf[12], x264_predict_
     *predict_8x8_filter   = x264_predict_8x8_filter_ssse3;
     if( cpu&X264_CPU_CACHELINE_64 )
     {
-        pf[I_PRED_8x8_DDL]= x264_predict_8x8_ddl_ssse3_cache64;
-        pf[I_PRED_8x8_DDR]= x264_predict_8x8_ddr_ssse3_cache64;
+        pf[I_PRED_8x8_DDL]= x264_predict_8x8_ddl_cache64_ssse3;
+        pf[I_PRED_8x8_DDR]= x264_predict_8x8_ddr_cache64_ssse3;
     }
     if( !(cpu&X264_CPU_AVX) )
         return;
@@ -604,6 +604,6 @@ void x264_predict_4x4_init_mmx( int cpu, x264_predict_t pf[12] )
     pf[I_PRED_4x4_VR]  = x264_predict_4x4_vr_ssse3;
     pf[I_PRED_4x4_HD]  = x264_predict_4x4_hd_ssse3;
     if( cpu&X264_CPU_CACHELINE_64 )
-        pf[I_PRED_4x4_VR] = x264_predict_4x4_vr_ssse3_cache64;
+        pf[I_PRED_4x4_VR] = x264_predict_4x4_vr_cache64_ssse3;
 #endif // HIGH_BIT_DEPTH
 }
diff --git a/common/x86/predict.h b/common/x86/predict.h
index ddc7de66..9f9052c2 100644
--- a/common/x86/predict.h
+++ b/common/x86/predict.h
@@ -93,12 +93,12 @@ void x264_predict_8x8_dc_left_sse2( uint16_t *src, uint16_t edge[36] );
 void x264_predict_8x8_ddl_mmx2( uint8_t *src, uint8_t edge[36] );
 void x264_predict_8x8_ddl_sse2( pixel *src, pixel edge[36] );
 void x264_predict_8x8_ddl_ssse3( pixel *src, pixel edge[36] );
-void x264_predict_8x8_ddl_ssse3_cache64( pixel *src, pixel edge[36] );
+void x264_predict_8x8_ddl_cache64_ssse3( pixel *src, pixel edge[36] );
 void x264_predict_8x8_ddl_avx( pixel *src, pixel edge[36] );
 void x264_predict_8x8_ddr_mmx2( uint8_t *src, uint8_t edge[36] );
 void x264_predict_8x8_ddr_sse2( pixel *src, pixel edge[36] );
 void x264_predict_8x8_ddr_ssse3( pixel *src, pixel edge[36] );
-void x264_predict_8x8_ddr_ssse3_cache64( pixel *src, pixel edge[36] );
+void x264_predict_8x8_ddr_cache64_ssse3( pixel *src, pixel edge[36] );
 void x264_predict_8x8_ddr_avx( pixel *src, pixel edge[36] );
 void x264_predict_8x8_vl_sse2( pixel *src, pixel edge[36] );
 void x264_predict_8x8_vl_ssse3( pixel *src, pixel edge[36] );
@@ -129,7 +129,7 @@ void x264_predict_4x4_vl_avx( uint16_t *src );
 void x264_predict_4x4_vr_mmx2( uint8_t *src );
 void x264_predict_4x4_vr_sse2( uint16_t *src );
 void x264_predict_4x4_vr_ssse3( pixel *src );
-void x264_predict_4x4_vr_ssse3_cache64( uint8_t *src );
+void x264_predict_4x4_vr_cache64_ssse3( uint8_t *src );
 void x264_predict_4x4_vr_avx( uint16_t *src );
 void x264_predict_4x4_hd_mmx2( pixel *src );
 void x264_predict_4x4_hd_sse2( uint16_t *src );