From: Puyan Lotfi <puyan@puyan.org>
Date: Thu, 30 May 2019 18:06:28 +0000 (+0000)
Subject: [MIR-Canon] Add support for rewriting VRegs that are typed but don't have an RC.
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=faddd4770cbe150f475df84218e375a6d71e32c6;p=llvm

[MIR-Canon] Add support for rewriting VRegs that are typed but don't have an RC.

There were crashes (addrspace-memoperands.mir was only one of them) in MIR that
had operands that came from before register classes were set. With these
operands, creating a replacement vreg (for MIR-Canon's renaming) needs to use
the vreg type rather than the RegisterClass which is not present.

Differential Revision: https://reviews.llvm.org/D62543


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362122 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/MIRCanonicalizerPass.cpp b/lib/CodeGen/MIRCanonicalizerPass.cpp
index e7db863e1f9..e8a6e409fb5 100644
--- a/lib/CodeGen/MIRCanonicalizerPass.cpp
+++ b/lib/CodeGen/MIRCanonicalizerPass.cpp
@@ -500,14 +500,15 @@ public:
     return virtualVRegNumber;
   }
 
-  unsigned createVirtualRegister(const TargetRegisterClass *RC) {
+  unsigned createVirtualRegister(unsigned VReg) {
     std::string S;
     raw_string_ostream OS(S);
     OS << "namedVReg" << (virtualVRegNumber & ~0x80000000);
     OS.flush();
     virtualVRegNumber++;
-
-    return MRI.createVirtualRegister(RC, OS.str());
+    if (auto RC = MRI.getRegClassOrNull(VReg))
+      return MRI.createVirtualRegister(RC, OS.str());
+    return MRI.createGenericVirtualRegister(MRI.getType(VReg), OS.str());
   }
 };
 } // namespace
@@ -557,7 +558,7 @@ GetVRegRenameMap(const std::vector<TypedVReg> &VRegs,
       continue;
     }
 
-    auto Rename = NVC.createVirtualRegister(MRI.getRegClass(Reg));
+    auto Rename = NVC.createVirtualRegister(Reg);
 
     if (VRegRenameMap.find(Reg) == VRegRenameMap.end()) {
       LLVM_DEBUG(dbgs() << "Mapping vreg ";);
@@ -741,7 +742,7 @@ static bool runOnBasicBlock(MachineBasicBlock *MBB,
     MachineInstr &MI = *MII++;
     Changed = true;
     unsigned vRegToRename = MI.getOperand(0).getReg();
-    auto Rename = NVC.createVirtualRegister(MRI.getRegClass(vRegToRename));
+    auto Rename = NVC.createVirtualRegister(vRegToRename);
 
     std::vector<MachineOperand *> RenameMOs;
     for (auto &MO : MRI.reg_operands(vRegToRename)) {
diff --git a/test/CodeGen/MIR/AArch64/addrspace-memoperands.mir b/test/CodeGen/MIR/AArch64/addrspace-memoperands.mir
index c33e48b882f..bc5c06d7f67 100644
--- a/test/CodeGen/MIR/AArch64/addrspace-memoperands.mir
+++ b/test/CodeGen/MIR/AArch64/addrspace-memoperands.mir
@@ -1,4 +1,5 @@
 # RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass mir-canonicalizer -o - %s
 
 --- |