From: Craig Topper <craig.topper@intel.com>
Date: Tue, 5 Dec 2017 01:28:04 +0000 (+0000)
Subject: [X86] Use getZeroVector and remove an unnecessary creation of an APInt before calling... 
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=fadb00b655d5d6128685f0f7a553936d62a8263d;p=llvm

[X86] Use getZeroVector and remove an unnecessary creation of an APInt before calling getConstant. NFCI

The getConstant function can take care of creating the APInt internally.

getZeroVector will take care of using the correct type for the build vector to avoid re-lowering.

The test change here is because execution domain constraints apparently pass through undef inputs of a zeroing xor. So the different ordering of register allocation here caused the dependency to change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319725 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 8acdb9de793..ee8351c81ce 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -16142,10 +16142,8 @@ static  SDValue LowerZERO_EXTEND_AVX512(SDValue Op,
   if (!VT.is512BitVector() && !Subtarget.hasVLX())
     ExtVT = MVT::getVectorVT(MVT::getIntegerVT(512/NumElts), NumElts);
 
-  SDValue One =
-   DAG.getConstant(APInt(ExtVT.getScalarSizeInBits(), 1), DL, ExtVT);
-  SDValue Zero =
-   DAG.getConstant(APInt::getNullValue(ExtVT.getScalarSizeInBits()), DL, ExtVT);
+  SDValue One = DAG.getConstant(1, DL, ExtVT);
+  SDValue Zero = getZeroVector(ExtVT, Subtarget, DAG, DL);
 
   SDValue SelectedVal = DAG.getSelect(DL, ExtVT, In, One, Zero);
   if (VT == ExtVT)
diff --git a/test/CodeGen/X86/pr34605.ll b/test/CodeGen/X86/pr34605.ll
index 8c25b068ecf..19fed5db5bc 100644
--- a/test/CodeGen/X86/pr34605.ll
+++ b/test/CodeGen/X86/pr34605.ll
@@ -19,15 +19,15 @@ define void @pr34605(i8* nocapture %s, i32 %p) {
 ; CHECK-NEXT:    kunpckdq %k2, %k1, %k1
 ; CHECK-NEXT:    kandq %k1, %k0, %k1
 ; CHECK-NEXT:    vmovdqu8 {{\.LCPI.*}}, %zmm0 {%k1} {z}
+; CHECK-NEXT:    vxorps %xmm1, %xmm1, %xmm1
 ; CHECK-NEXT:    vmovdqu32 %zmm0, (%eax)
-; CHECK-NEXT:    vpxor %xmm0, %xmm0, %xmm0
-; CHECK-NEXT:    vmovdqu32 %zmm0, 64(%eax)
-; CHECK-NEXT:    vmovdqu32 %zmm0, 128(%eax)
-; CHECK-NEXT:    vmovdqu32 %zmm0, 192(%eax)
-; CHECK-NEXT:    vmovdqu32 %zmm0, 256(%eax)
-; CHECK-NEXT:    vmovdqu32 %zmm0, 320(%eax)
-; CHECK-NEXT:    vmovdqu32 %zmm0, 384(%eax)
-; CHECK-NEXT:    vmovdqu32 %zmm0, 448(%eax)
+; CHECK-NEXT:    vmovups %zmm1, 64(%eax)
+; CHECK-NEXT:    vmovups %zmm1, 128(%eax)
+; CHECK-NEXT:    vmovups %zmm1, 192(%eax)
+; CHECK-NEXT:    vmovups %zmm1, 256(%eax)
+; CHECK-NEXT:    vmovups %zmm1, 320(%eax)
+; CHECK-NEXT:    vmovups %zmm1, 384(%eax)
+; CHECK-NEXT:    vmovups %zmm1, 448(%eax)
 ; CHECK-NEXT:    vzeroupper
 ; CHECK-NEXT:    retl
 entry: