From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Fri, 3 Mar 2017 14:37:57 +0000 (+0000)
Subject: Use APInt::getHighBitsSet instead of APInt::getBitsSet for upper bit mask creation
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=fab9b0e698b6cf2bf93f8413caf8968d4113967f;p=llvm

Use APInt::getHighBitsSet instead of APInt::getBitsSet for upper bit mask creation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296874 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 65d5ad3f242..4770327a69d 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -7498,7 +7498,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
     // a constant pool load than it is to do a movd + shuffle.
     if (ExtVT == MVT::i64 && !Subtarget.is64Bit() &&
         (!IsAllConstants || Idx == 0)) {
-      if (DAG.MaskedValueIsZero(Item, APInt::getBitsSet(64, 32, 64))) {
+      if (DAG.MaskedValueIsZero(Item, APInt::getHighBitsSet(64, 32))) {
         // Handle SSE only.
         assert(VT == MVT::v2i64 && "Expected an SSE value type!");
         MVT VecVT = MVT::v4i32;