From: Mark Searles <m.c.searles@gmail.com>
Date: Thu, 7 Dec 2017 21:24:27 +0000 (+0000)
Subject: [AMDGPU] Fix typo in Kernel Descriptor for GFX6-GFX9
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=f534f4a24f765d802b68b1ff32066ce668a2c566;p=llvm

[AMDGPU] Fix typo in Kernel Descriptor for GFX6-GFX9

Differential Revision: https://reviews.llvm.org/D40981

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320087 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/docs/AMDGPUUsage.rst b/docs/AMDGPUUsage.rst
index ecb0c11dbcb..7d42685bb25 100644
--- a/docs/AMDGPUUsage.rst
+++ b/docs/AMDGPUUsage.rst
@@ -1549,7 +1549,7 @@ CP microcode requires the Kernel descritor to be allocated on 64 byte alignment.
                                                      must be executed with the
                                                      specified work-group size
                                                      for Z.
-     383:271 14                                      Reserved, must be 0.
+     383:272 14                                      Reserved, must be 0.
              bytes
      415:384 4 bytes ComputePgmRsrc1                 Compute Shader (CS)
                                                      program settings used by