From: Sachin Parekh <sachin.parekh@espressif.com>
Date: Mon, 25 Mar 2019 10:39:21 +0000 (+0530)
Subject: crosscore_init: port*_CRITICAL vanilla FreeRTOS compliance
X-Git-Tag: v4.0-beta1~336^2~4
X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=f3db0b5a4a9b3e76845d28af9d90cb809dd14cae;p=esp-idf

crosscore_init: port*_CRITICAL vanilla FreeRTOS compliance

Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
---

diff --git a/components/esp32/crosscore_int.c b/components/esp32/crosscore_int.c
index 3802a5600e..986deb2845 100644
--- a/components/esp32/crosscore_int.c
+++ b/components/esp32/crosscore_int.c
@@ -96,9 +96,9 @@ void esp_crosscore_int_init() {
 static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask) {
     assert(core_id<portNUM_PROCESSORS);
     //Mark the reason we interrupt the other CPU
-    portENTER_CRITICAL(&reason_spinlock);
+    portENTER_CRITICAL_ISR(&reason_spinlock);
     reason[core_id] |= reason_mask;
-    portEXIT_CRITICAL(&reason_spinlock);
+    portEXIT_CRITICAL_ISR(&reason_spinlock);
     //Poke the other CPU.
     if (core_id==0) {
         DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, DPORT_CPU_INTR_FROM_CPU_0);