From: Simon Pilgrim Date: Tue, 22 Jan 2019 16:39:28 +0000 (+0000) Subject: [llvm-mca][X86] Add missing CLWB/CLZERO/FSGSBASE/LWP/MWAITX/RDPID/SHA tests X-Git-Url: https://granicus.if.org/sourcecode?a=commitdiff_plain;h=f26bb9e4e3d83a409f909fe41b159175b6d86b29;p=llvm [llvm-mca][X86] Add missing CLWB/CLZERO/FSGSBASE/LWP/MWAITX/RDPID/SHA tests We're getting pretty close to matching/exceeding test coverage of the test\CodeGen\X86\*-schedule.ll files, which should allow us to get rid of -print-schedule and fix PR37160 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351836 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/tools/llvm-mca/X86/BdVer2/resources-lwp.s b/test/tools/llvm-mca/X86/BdVer2/resources-lwp.s new file mode 100644 index 00000000000..b14a72d3204 --- /dev/null +++ b/test/tools/llvm-mca/X86/BdVer2/resources-lwp.s @@ -0,0 +1,86 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -instruction-tables < %s | FileCheck %s + +llwpcb %edi +llwpcb %rdi + +lwpins $-1985229329, %esi, %edi +lwpins $-1985229329, (%rsi), %edi + +lwpins $-1985229329, %esi, %rdi +lwpins $-1985229329, (%rsi), %rdi + +lwpval $-1985229329, %esi, %edi +lwpval $-1985229329, (%rsi), %edi + +lwpval $-1985229329, %esi, %rdi +lwpval $-1985229329, (%rsi), %rdi + +slwpcb %edi +slwpcb %rdi + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.50 * * U llwpcb %edi +# CHECK-NEXT: 1 100 0.50 * * U llwpcb %rdi +# CHECK-NEXT: 1 100 0.50 * * U lwpins $-1985229329, %esi, %edi +# CHECK-NEXT: 1 100 0.50 * * U lwpins $-1985229329, (%rsi), %edi +# CHECK-NEXT: 1 100 0.50 * * U lwpins $-1985229329, %esi, %rdi +# CHECK-NEXT: 1 100 0.50 * * U lwpins $-1985229329, (%rsi), %rdi +# CHECK-NEXT: 1 100 0.50 * * U lwpval $-1985229329, %esi, %edi +# CHECK-NEXT: 1 100 0.50 * * U lwpval $-1985229329, (%rsi), %edi +# CHECK-NEXT: 1 100 0.50 * * U lwpval $-1985229329, %esi, %rdi +# CHECK-NEXT: 1 100 0.50 * * U lwpval $-1985229329, (%rsi), %rdi +# CHECK-NEXT: 1 100 0.50 * * U slwpcb %edi +# CHECK-NEXT: 1 100 0.50 * * U slwpcb %rdi + +# CHECK: Resources: +# CHECK-NEXT: [0.0] - PdAGLU01 +# CHECK-NEXT: [0.1] - PdAGLU01 +# CHECK-NEXT: [1] - PdBranch +# CHECK-NEXT: [2] - PdCount +# CHECK-NEXT: [3] - PdDiv +# CHECK-NEXT: [4] - PdEX0 +# CHECK-NEXT: [5] - PdEX1 +# CHECK-NEXT: [6] - PdFPCVT +# CHECK-NEXT: [7.0] - PdFPFMA +# CHECK-NEXT: [7.1] - PdFPFMA +# CHECK-NEXT: [8.0] - PdFPMAL +# CHECK-NEXT: [8.1] - PdFPMAL +# CHECK-NEXT: [9] - PdFPMMA +# CHECK-NEXT: [10] - PdFPSTO +# CHECK-NEXT: [11] - PdFPU0 +# CHECK-NEXT: [12] - PdFPU1 +# CHECK-NEXT: [13] - PdFPU2 +# CHECK-NEXT: [14] - PdFPU3 +# CHECK-NEXT: [15] - PdFPXBR +# CHECK-NEXT: [16.0] - PdLoad +# CHECK-NEXT: [16.1] - PdLoad +# CHECK-NEXT: [17] - PdMul +# CHECK-NEXT: [18] - PdStore + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] +# CHECK-NEXT: - - - - - 6.00 6.00 - - - - - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions: +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - llwpcb %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - llwpcb %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - lwpins $-1985229329, %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - lwpins $-1985229329, (%rsi), %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - lwpins $-1985229329, %esi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - lwpins $-1985229329, (%rsi), %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - lwpval $-1985229329, %esi, %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - lwpval $-1985229329, (%rsi), %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - lwpval $-1985229329, %esi, %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - lwpval $-1985229329, (%rsi), %rdi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - slwpcb %edi +# CHECK-NEXT: - - - - - 0.50 0.50 - - - - - - - - - - - - - - - - slwpcb %rdi diff --git a/test/tools/llvm-mca/X86/Broadwell/resources-fsgsbase.s b/test/tools/llvm-mca/X86/Broadwell/resources-fsgsbase.s new file mode 100644 index 00000000000..a6dd21a2ebf --- /dev/null +++ b/test/tools/llvm-mca/X86/Broadwell/resources-fsgsbase.s @@ -0,0 +1,59 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -instruction-tables < %s | FileCheck %s + +rdfsbase %eax +rdfsbase %rax + +rdgsbase %eax +rdgsbase %rax + +wrfsbase %edi +wrfsbase %rdi + +wrgsbase %edi +wrgsbase %rdi + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 * * U rdfsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdfsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U wrfsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrfsbaseq %rdi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbaseq %rdi + +# CHECK: Resources: +# CHECK-NEXT: [0] - BWDivider +# CHECK-NEXT: [1] - BWFPDivider +# CHECK-NEXT: [2] - BWPort0 +# CHECK-NEXT: [3] - BWPort1 +# CHECK-NEXT: [4] - BWPort2 +# CHECK-NEXT: [5] - BWPort3 +# CHECK-NEXT: [6] - BWPort4 +# CHECK-NEXT: [7] - BWPort5 +# CHECK-NEXT: [8] - BWPort6 +# CHECK-NEXT: [9] - BWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 2.00 2.00 - - - 2.00 2.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdfsbasel %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdfsbaseq %rax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdgsbasel %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdgsbaseq %rax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrfsbasel %edi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrfsbaseq %rdi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrgsbasel %edi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrgsbaseq %rdi diff --git a/test/tools/llvm-mca/X86/Generic/resources-clwb.s b/test/tools/llvm-mca/X86/Generic/resources-clwb.s new file mode 100644 index 00000000000..099edcda15a --- /dev/null +++ b/test/tools/llvm-mca/X86/Generic/resources-clwb.s @@ -0,0 +1,33 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s + +clwb (%rax) + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 5 0.50 * * U clwb (%rax) + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - - - - - 0.50 0.50 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - - - - - 0.50 0.50 clwb (%rax) diff --git a/test/tools/llvm-mca/X86/Generic/resources-clzero.s b/test/tools/llvm-mca/X86/Generic/resources-clzero.s new file mode 100644 index 00000000000..a13c25300b3 --- /dev/null +++ b/test/tools/llvm-mca/X86/Generic/resources-clzero.s @@ -0,0 +1,33 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s + +clzero + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.33 U clzero + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - clzero diff --git a/test/tools/llvm-mca/X86/Generic/resources-fsgsbase.s b/test/tools/llvm-mca/X86/Generic/resources-fsgsbase.s new file mode 100644 index 00000000000..7b0642214ba --- /dev/null +++ b/test/tools/llvm-mca/X86/Generic/resources-fsgsbase.s @@ -0,0 +1,57 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s + +rdfsbase %eax +rdfsbase %rax + +rdgsbase %eax +rdgsbase %rax + +wrfsbase %edi +wrfsbase %rdi + +wrgsbase %edi +wrgsbase %rdi + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.33 * * U rdfsbasel %eax +# CHECK-NEXT: 1 100 0.33 * * U rdfsbaseq %rax +# CHECK-NEXT: 1 100 0.33 * * U rdgsbasel %eax +# CHECK-NEXT: 1 100 0.33 * * U rdgsbaseq %rax +# CHECK-NEXT: 1 100 0.33 * * U wrfsbasel %edi +# CHECK-NEXT: 1 100 0.33 * * U wrfsbaseq %rdi +# CHECK-NEXT: 1 100 0.33 * * U wrgsbasel %edi +# CHECK-NEXT: 1 100 0.33 * * U wrgsbaseq %rdi + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - 2.67 2.67 - 2.67 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdfsbasel %eax +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdfsbaseq %rax +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdgsbasel %eax +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdgsbaseq %rax +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - wrfsbasel %edi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - wrfsbaseq %rdi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - wrgsbasel %edi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - wrgsbaseq %rdi diff --git a/test/tools/llvm-mca/X86/Generic/resources-lwp.s b/test/tools/llvm-mca/X86/Generic/resources-lwp.s new file mode 100644 index 00000000000..0de376544a4 --- /dev/null +++ b/test/tools/llvm-mca/X86/Generic/resources-lwp.s @@ -0,0 +1,71 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s + +llwpcb %edi +llwpcb %rdi + +lwpins $-1985229329, %esi, %edi +lwpins $-1985229329, (%rsi), %edi + +lwpins $-1985229329, %esi, %rdi +lwpins $-1985229329, (%rsi), %rdi + +lwpval $-1985229329, %esi, %edi +lwpval $-1985229329, (%rsi), %edi + +lwpval $-1985229329, %esi, %rdi +lwpval $-1985229329, (%rsi), %rdi + +slwpcb %edi +slwpcb %rdi + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.33 * * U llwpcb %edi +# CHECK-NEXT: 1 100 0.33 * * U llwpcb %rdi +# CHECK-NEXT: 1 100 0.33 * * U lwpins $-1985229329, %esi, %edi +# CHECK-NEXT: 1 100 0.33 * * U lwpins $-1985229329, (%rsi), %edi +# CHECK-NEXT: 1 100 0.33 * * U lwpins $-1985229329, %esi, %rdi +# CHECK-NEXT: 1 100 0.33 * * U lwpins $-1985229329, (%rsi), %rdi +# CHECK-NEXT: 1 100 0.33 * * U lwpval $-1985229329, %esi, %edi +# CHECK-NEXT: 1 100 0.33 * * U lwpval $-1985229329, (%rsi), %edi +# CHECK-NEXT: 1 100 0.33 * * U lwpval $-1985229329, %esi, %rdi +# CHECK-NEXT: 1 100 0.33 * * U lwpval $-1985229329, (%rsi), %rdi +# CHECK-NEXT: 1 100 0.33 * * U slwpcb %edi +# CHECK-NEXT: 1 100 0.33 * * U slwpcb %rdi + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - 4.00 4.00 - 4.00 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - llwpcb %edi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - llwpcb %rdi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - lwpins $-1985229329, %esi, %edi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - lwpins $-1985229329, (%rsi), %edi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - lwpins $-1985229329, %esi, %rdi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - lwpins $-1985229329, (%rsi), %rdi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - lwpval $-1985229329, %esi, %edi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - lwpval $-1985229329, (%rsi), %edi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - lwpval $-1985229329, %esi, %rdi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - lwpval $-1985229329, (%rsi), %rdi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - slwpcb %edi +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - slwpcb %rdi diff --git a/test/tools/llvm-mca/X86/Generic/resources-mwaitx.s b/test/tools/llvm-mca/X86/Generic/resources-mwaitx.s new file mode 100644 index 00000000000..517b283dafa --- /dev/null +++ b/test/tools/llvm-mca/X86/Generic/resources-mwaitx.s @@ -0,0 +1,36 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s + +monitorx +mwaitx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.33 U monitorx +# CHECK-NEXT: 1 100 0.33 * * U mwaitx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - 0.67 0.67 - 0.67 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - monitorx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - mwaitx diff --git a/test/tools/llvm-mca/X86/Generic/resources-rdpid.s b/test/tools/llvm-mca/X86/Generic/resources-rdpid.s new file mode 100644 index 00000000000..ee7021dd213 --- /dev/null +++ b/test/tools/llvm-mca/X86/Generic/resources-rdpid.s @@ -0,0 +1,33 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s + +rdpid %rax + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.33 U rdpid %rax + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdpid %rax diff --git a/test/tools/llvm-mca/X86/Generic/resources-sha.s b/test/tools/llvm-mca/X86/Generic/resources-sha.s new file mode 100644 index 00000000000..71b37298fd6 --- /dev/null +++ b/test/tools/llvm-mca/X86/Generic/resources-sha.s @@ -0,0 +1,78 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s + +sha1msg1 %xmm0, %xmm2 +sha1msg1 (%rax), %xmm2 + +sha1msg2 %xmm0, %xmm2 +sha1msg2 (%rax), %xmm2 + +sha1nexte %xmm0, %xmm2 +sha1nexte (%rax), %xmm2 + +sha1rnds4 $3, %xmm0, %xmm2 +sha1rnds4 $3, (%rax), %xmm2 + +sha256msg1 %xmm0, %xmm2 +sha256msg1 (%rax), %xmm2 + +sha256msg2 %xmm0, %xmm2 +sha256msg2 (%rax), %xmm2 + +sha256rnds2 %xmm0, %xmm2 +sha256rnds2 (%rax), %xmm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 5 1.00 sha1msg1 %xmm0, %xmm2 +# CHECK-NEXT: 2 11 1.00 * sha1msg1 (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 sha1msg2 %xmm0, %xmm2 +# CHECK-NEXT: 2 11 1.00 * sha1msg2 (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 sha1nexte %xmm0, %xmm2 +# CHECK-NEXT: 2 11 1.00 * sha1nexte (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 sha1rnds4 $3, %xmm0, %xmm2 +# CHECK-NEXT: 2 11 1.00 * sha1rnds4 $3, (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 sha256msg1 %xmm0, %xmm2 +# CHECK-NEXT: 2 11 1.00 * sha256msg1 (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 sha256msg2 %xmm0, %xmm2 +# CHECK-NEXT: 2 11 1.00 * sha256msg2 (%rax), %xmm2 +# CHECK-NEXT: 1 5 1.00 sha256rnds2 %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 2 11 1.00 * sha256rnds2 %xmm0, (%rax), %xmm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - 14.00 - - - 3.50 3.50 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - 1.00 - - - - - sha1msg1 %xmm0, %xmm2 +# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 sha1msg1 (%rax), %xmm2 +# CHECK-NEXT: - - 1.00 - - - - - sha1msg2 %xmm0, %xmm2 +# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 sha1msg2 (%rax), %xmm2 +# CHECK-NEXT: - - 1.00 - - - - - sha1nexte %xmm0, %xmm2 +# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 sha1nexte (%rax), %xmm2 +# CHECK-NEXT: - - 1.00 - - - - - sha1rnds4 $3, %xmm0, %xmm2 +# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 sha1rnds4 $3, (%rax), %xmm2 +# CHECK-NEXT: - - 1.00 - - - - - sha256msg1 %xmm0, %xmm2 +# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 sha256msg1 (%rax), %xmm2 +# CHECK-NEXT: - - 1.00 - - - - - sha256msg2 %xmm0, %xmm2 +# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 sha256msg2 (%rax), %xmm2 +# CHECK-NEXT: - - 1.00 - - - - - sha256rnds2 %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: - - 1.00 - - - 0.50 0.50 sha256rnds2 %xmm0, (%rax), %xmm2 diff --git a/test/tools/llvm-mca/X86/Haswell/resources-fsgsbase.s b/test/tools/llvm-mca/X86/Haswell/resources-fsgsbase.s new file mode 100644 index 00000000000..9c19a6869a0 --- /dev/null +++ b/test/tools/llvm-mca/X86/Haswell/resources-fsgsbase.s @@ -0,0 +1,59 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -instruction-tables < %s | FileCheck %s + +rdfsbase %eax +rdfsbase %rax + +rdgsbase %eax +rdgsbase %rax + +wrfsbase %edi +wrfsbase %rdi + +wrgsbase %edi +wrgsbase %rdi + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 * * U rdfsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdfsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U wrfsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrfsbaseq %rdi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbaseq %rdi + +# CHECK: Resources: +# CHECK-NEXT: [0] - HWDivider +# CHECK-NEXT: [1] - HWFPDivider +# CHECK-NEXT: [2] - HWPort0 +# CHECK-NEXT: [3] - HWPort1 +# CHECK-NEXT: [4] - HWPort2 +# CHECK-NEXT: [5] - HWPort3 +# CHECK-NEXT: [6] - HWPort4 +# CHECK-NEXT: [7] - HWPort5 +# CHECK-NEXT: [8] - HWPort6 +# CHECK-NEXT: [9] - HWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 2.00 2.00 - - - 2.00 2.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdfsbasel %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdfsbaseq %rax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdgsbasel %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdgsbaseq %rax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrfsbasel %edi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrfsbaseq %rdi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrgsbasel %edi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrgsbaseq %rdi diff --git a/test/tools/llvm-mca/X86/SkylakeClient/resources-fsgsbase.s b/test/tools/llvm-mca/X86/SkylakeClient/resources-fsgsbase.s new file mode 100644 index 00000000000..97819bafdc5 --- /dev/null +++ b/test/tools/llvm-mca/X86/SkylakeClient/resources-fsgsbase.s @@ -0,0 +1,59 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -instruction-tables < %s | FileCheck %s + +rdfsbase %eax +rdfsbase %rax + +rdgsbase %eax +rdgsbase %rax + +wrfsbase %edi +wrfsbase %rdi + +wrgsbase %edi +wrgsbase %rdi + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 * * U rdfsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdfsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U wrfsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrfsbaseq %rdi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbaseq %rdi + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKLDivider +# CHECK-NEXT: [1] - SKLFPDivider +# CHECK-NEXT: [2] - SKLPort0 +# CHECK-NEXT: [3] - SKLPort1 +# CHECK-NEXT: [4] - SKLPort2 +# CHECK-NEXT: [5] - SKLPort3 +# CHECK-NEXT: [6] - SKLPort4 +# CHECK-NEXT: [7] - SKLPort5 +# CHECK-NEXT: [8] - SKLPort6 +# CHECK-NEXT: [9] - SKLPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 2.00 2.00 - - - 2.00 2.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdfsbasel %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdfsbaseq %rax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdgsbasel %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdgsbaseq %rax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrfsbasel %edi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrfsbaseq %rdi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrgsbasel %edi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrgsbaseq %rdi diff --git a/test/tools/llvm-mca/X86/SkylakeServer/resources-clwb.s b/test/tools/llvm-mca/X86/SkylakeServer/resources-clwb.s new file mode 100644 index 00000000000..3c4b5dc3f44 --- /dev/null +++ b/test/tools/llvm-mca/X86/SkylakeServer/resources-clwb.s @@ -0,0 +1,35 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -instruction-tables < %s | FileCheck %s + +clwb (%rax) + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 5 0.50 * * U clwb (%rax) + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKXDivider +# CHECK-NEXT: [1] - SKXFPDivider +# CHECK-NEXT: [2] - SKXPort0 +# CHECK-NEXT: [3] - SKXPort1 +# CHECK-NEXT: [4] - SKXPort2 +# CHECK-NEXT: [5] - SKXPort3 +# CHECK-NEXT: [6] - SKXPort4 +# CHECK-NEXT: [7] - SKXPort5 +# CHECK-NEXT: [8] - SKXPort6 +# CHECK-NEXT: [9] - SKXPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - - - 0.50 0.50 - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - - 0.50 0.50 - - - - clwb (%rax) diff --git a/test/tools/llvm-mca/X86/SkylakeServer/resources-fsgsbase.s b/test/tools/llvm-mca/X86/SkylakeServer/resources-fsgsbase.s new file mode 100644 index 00000000000..1d7d49a3189 --- /dev/null +++ b/test/tools/llvm-mca/X86/SkylakeServer/resources-fsgsbase.s @@ -0,0 +1,59 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -instruction-tables < %s | FileCheck %s + +rdfsbase %eax +rdfsbase %rax + +rdgsbase %eax +rdgsbase %rax + +wrfsbase %edi +wrfsbase %rdi + +wrgsbase %edi +wrgsbase %rdi + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 * * U rdfsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdfsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U wrfsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrfsbaseq %rdi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbaseq %rdi + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKXDivider +# CHECK-NEXT: [1] - SKXFPDivider +# CHECK-NEXT: [2] - SKXPort0 +# CHECK-NEXT: [3] - SKXPort1 +# CHECK-NEXT: [4] - SKXPort2 +# CHECK-NEXT: [5] - SKXPort3 +# CHECK-NEXT: [6] - SKXPort4 +# CHECK-NEXT: [7] - SKXPort5 +# CHECK-NEXT: [8] - SKXPort6 +# CHECK-NEXT: [9] - SKXPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 2.00 2.00 - - - 2.00 2.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdfsbasel %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdfsbaseq %rax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdgsbasel %eax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - rdgsbaseq %rax +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrfsbasel %edi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrfsbaseq %rdi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrgsbasel %edi +# CHECK-NEXT: - - 0.25 0.25 - - - 0.25 0.25 - wrgsbaseq %rdi diff --git a/test/tools/llvm-mca/X86/Znver1/resources-clzero.s b/test/tools/llvm-mca/X86/Znver1/resources-clzero.s new file mode 100644 index 00000000000..29f04f18aee --- /dev/null +++ b/test/tools/llvm-mca/X86/Znver1/resources-clzero.s @@ -0,0 +1,37 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -instruction-tables < %s | FileCheck %s + +clzero + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U clzero + +# CHECK: Resources: +# CHECK-NEXT: [0] - ZnAGU0 +# CHECK-NEXT: [1] - ZnAGU1 +# CHECK-NEXT: [2] - ZnALU0 +# CHECK-NEXT: [3] - ZnALU1 +# CHECK-NEXT: [4] - ZnALU2 +# CHECK-NEXT: [5] - ZnALU3 +# CHECK-NEXT: [6] - ZnDivider +# CHECK-NEXT: [7] - ZnFPU0 +# CHECK-NEXT: [8] - ZnFPU1 +# CHECK-NEXT: [9] - ZnFPU2 +# CHECK-NEXT: [10] - ZnFPU3 +# CHECK-NEXT: [11] - ZnMultiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] +# CHECK-NEXT: - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - clzero diff --git a/test/tools/llvm-mca/X86/Znver1/resources-fsgsbase.s b/test/tools/llvm-mca/X86/Znver1/resources-fsgsbase.s new file mode 100644 index 00000000000..88bcd37b2d0 --- /dev/null +++ b/test/tools/llvm-mca/X86/Znver1/resources-fsgsbase.s @@ -0,0 +1,61 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -instruction-tables < %s | FileCheck %s + +rdfsbase %eax +rdfsbase %rax + +rdgsbase %eax +rdgsbase %rax + +wrfsbase %edi +wrfsbase %rdi + +wrgsbase %edi +wrgsbase %rdi + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 * * U rdfsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdfsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbasel %eax +# CHECK-NEXT: 1 100 0.25 * * U rdgsbaseq %rax +# CHECK-NEXT: 1 100 0.25 * * U wrfsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrfsbaseq %rdi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbasel %edi +# CHECK-NEXT: 1 100 0.25 * * U wrgsbaseq %rdi + +# CHECK: Resources: +# CHECK-NEXT: [0] - ZnAGU0 +# CHECK-NEXT: [1] - ZnAGU1 +# CHECK-NEXT: [2] - ZnALU0 +# CHECK-NEXT: [3] - ZnALU1 +# CHECK-NEXT: [4] - ZnALU2 +# CHECK-NEXT: [5] - ZnALU3 +# CHECK-NEXT: [6] - ZnDivider +# CHECK-NEXT: [7] - ZnFPU0 +# CHECK-NEXT: [8] - ZnFPU1 +# CHECK-NEXT: [9] - ZnFPU2 +# CHECK-NEXT: [10] - ZnFPU3 +# CHECK-NEXT: [11] - ZnMultiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] +# CHECK-NEXT: - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - rdfsbasel %eax +# CHECK-NEXT: - - - - - - - - - - - - rdfsbaseq %rax +# CHECK-NEXT: - - - - - - - - - - - - rdgsbasel %eax +# CHECK-NEXT: - - - - - - - - - - - - rdgsbaseq %rax +# CHECK-NEXT: - - - - - - - - - - - - wrfsbasel %edi +# CHECK-NEXT: - - - - - - - - - - - - wrfsbaseq %rdi +# CHECK-NEXT: - - - - - - - - - - - - wrgsbasel %edi +# CHECK-NEXT: - - - - - - - - - - - - wrgsbaseq %rdi diff --git a/test/tools/llvm-mca/X86/Znver1/resources-mwaitx.s b/test/tools/llvm-mca/X86/Znver1/resources-mwaitx.s new file mode 100644 index 00000000000..c296b21d754 --- /dev/null +++ b/test/tools/llvm-mca/X86/Znver1/resources-mwaitx.s @@ -0,0 +1,40 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -instruction-tables < %s | FileCheck %s + +monitorx +mwaitx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 100 0.25 U monitorx +# CHECK-NEXT: 1 100 0.25 * * U mwaitx + +# CHECK: Resources: +# CHECK-NEXT: [0] - ZnAGU0 +# CHECK-NEXT: [1] - ZnAGU1 +# CHECK-NEXT: [2] - ZnALU0 +# CHECK-NEXT: [3] - ZnALU1 +# CHECK-NEXT: [4] - ZnALU2 +# CHECK-NEXT: [5] - ZnALU3 +# CHECK-NEXT: [6] - ZnDivider +# CHECK-NEXT: [7] - ZnFPU0 +# CHECK-NEXT: [8] - ZnFPU1 +# CHECK-NEXT: [9] - ZnFPU2 +# CHECK-NEXT: [10] - ZnFPU3 +# CHECK-NEXT: [11] - ZnMultiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] +# CHECK-NEXT: - - - - - - - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: +# CHECK-NEXT: - - - - - - - - - - - - monitorx +# CHECK-NEXT: - - - - - - - - - - - - mwaitx diff --git a/test/tools/llvm-mca/X86/Znver1/resources-sha.s b/test/tools/llvm-mca/X86/Znver1/resources-sha.s new file mode 100644 index 00000000000..57839d03348 --- /dev/null +++ b/test/tools/llvm-mca/X86/Znver1/resources-sha.s @@ -0,0 +1,82 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -instruction-tables < %s | FileCheck %s + +sha1msg1 %xmm0, %xmm2 +sha1msg1 (%rax), %xmm2 + +sha1msg2 %xmm0, %xmm2 +sha1msg2 (%rax), %xmm2 + +sha1nexte %xmm0, %xmm2 +sha1nexte (%rax), %xmm2 + +sha1rnds4 $3, %xmm0, %xmm2 +sha1rnds4 $3, (%rax), %xmm2 + +sha256msg1 %xmm0, %xmm2 +sha256msg1 (%rax), %xmm2 + +sha256msg2 %xmm0, %xmm2 +sha256msg2 (%rax), %xmm2 + +sha256rnds2 %xmm0, %xmm2 +sha256rnds2 (%rax), %xmm2 + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects (U) + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 2 1.00 sha1msg1 %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * sha1msg1 (%rax), %xmm2 +# CHECK-NEXT: 1 1 0.50 sha1msg2 %xmm0, %xmm2 +# CHECK-NEXT: 1 8 0.50 * sha1msg2 (%rax), %xmm2 +# CHECK-NEXT: 1 1 1.00 sha1nexte %xmm0, %xmm2 +# CHECK-NEXT: 1 8 1.00 * sha1nexte (%rax), %xmm2 +# CHECK-NEXT: 1 6 1.00 sha1rnds4 $3, %xmm0, %xmm2 +# CHECK-NEXT: 1 13 1.00 * sha1rnds4 $3, (%rax), %xmm2 +# CHECK-NEXT: 1 2 1.00 sha256msg1 %xmm0, %xmm2 +# CHECK-NEXT: 1 9 1.00 * sha256msg1 (%rax), %xmm2 +# CHECK-NEXT: 1 100 0.25 sha256msg2 %xmm0, %xmm2 +# CHECK-NEXT: 1 100 0.25 * sha256msg2 (%rax), %xmm2 +# CHECK-NEXT: 1 4 1.00 sha256rnds2 %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 1 11 1.00 * sha256rnds2 %xmm0, (%rax), %xmm2 + +# CHECK: Resources: +# CHECK-NEXT: [0] - ZnAGU0 +# CHECK-NEXT: [1] - ZnAGU1 +# CHECK-NEXT: [2] - ZnALU0 +# CHECK-NEXT: [3] - ZnALU1 +# CHECK-NEXT: [4] - ZnALU2 +# CHECK-NEXT: [5] - ZnALU3 +# CHECK-NEXT: [6] - ZnDivider +# CHECK-NEXT: [7] - ZnFPU0 +# CHECK-NEXT: [8] - ZnFPU1 +# CHECK-NEXT: [9] - ZnFPU2 +# CHECK-NEXT: [10] - ZnFPU3 +# CHECK-NEXT: [11] - ZnMultiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] +# CHECK-NEXT: 3.00 3.00 - - - - - - 11.00 5.00 - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - sha1msg1 %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 1.00 1.00 - - sha1msg1 (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 0.50 0.50 - - sha1msg2 %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 0.50 0.50 - - sha1msg2 (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - sha1nexte %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 1.00 - - - sha1nexte (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - sha1rnds4 $3, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 1.00 - - - sha1rnds4 $3, (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 1.00 - - sha256msg1 %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 1.00 1.00 - - sha256msg1 (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - sha256msg2 %xmm0, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - sha256msg2 (%rax), %xmm2 +# CHECK-NEXT: - - - - - - - - 1.00 - - - sha256rnds2 %xmm0, %xmm0, %xmm2 +# CHECK-NEXT: 0.50 0.50 - - - - - - 1.00 - - - sha256rnds2 %xmm0, (%rax), %xmm2